uboot/drivers/mmc/mmc_spi.c
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   1/*
   2 * generic mmc spi driver
   3 *
   4 * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
   5 * Licensed under the GPL-2 or later.
   6 */
   7#include <common.h>
   8#include <malloc.h>
   9#include <part.h>
  10#include <mmc.h>
  11#include <spi.h>
  12#include <crc.h>
  13#include <linux/crc7.h>
  14#include <linux/byteorder/swab.h>
  15
  16/* MMC/SD in SPI mode reports R1 status always */
  17#define R1_SPI_IDLE             (1 << 0)
  18#define R1_SPI_ERASE_RESET      (1 << 1)
  19#define R1_SPI_ILLEGAL_COMMAND  (1 << 2)
  20#define R1_SPI_COM_CRC          (1 << 3)
  21#define R1_SPI_ERASE_SEQ        (1 << 4)
  22#define R1_SPI_ADDRESS          (1 << 5)
  23#define R1_SPI_PARAMETER        (1 << 6)
  24/* R1 bit 7 is always zero, reuse this bit for error */
  25#define R1_SPI_ERROR            (1 << 7)
  26
  27/* Response tokens used to ack each block written: */
  28#define SPI_MMC_RESPONSE_CODE(x)        ((x) & 0x1f)
  29#define SPI_RESPONSE_ACCEPTED           ((2 << 1)|1)
  30#define SPI_RESPONSE_CRC_ERR            ((5 << 1)|1)
  31#define SPI_RESPONSE_WRITE_ERR          ((6 << 1)|1)
  32
  33/* Read and write blocks start with these tokens and end with crc;
  34 * on error, read tokens act like a subset of R2_SPI_* values.
  35 */
  36#define SPI_TOKEN_SINGLE        0xfe    /* single block r/w, multiblock read */
  37#define SPI_TOKEN_MULTI_WRITE   0xfc    /* multiblock write */
  38#define SPI_TOKEN_STOP_TRAN     0xfd    /* terminate multiblock write */
  39
  40/* MMC SPI commands start with a start bit "0" and a transmit bit "1" */
  41#define MMC_SPI_CMD(x) (0x40 | (x & 0x3f))
  42
  43/* bus capability */
  44#define MMC_SPI_VOLTAGE (MMC_VDD_32_33 | MMC_VDD_33_34)
  45#define MMC_SPI_MIN_CLOCK 400000 /* 400KHz to meet MMC spec */
  46
  47/* timeout value */
  48#define CTOUT 8
  49#define RTOUT 3000000 /* 1 sec */
  50#define WTOUT 3000000 /* 1 sec */
  51
  52static uint mmc_spi_sendcmd(struct mmc *mmc, ushort cmdidx, u32 cmdarg)
  53{
  54        struct spi_slave *spi = mmc->priv;
  55        u8 cmdo[7];
  56        u8 r1;
  57        int i;
  58        cmdo[0] = 0xff;
  59        cmdo[1] = MMC_SPI_CMD(cmdidx);
  60        cmdo[2] = cmdarg >> 24;
  61        cmdo[3] = cmdarg >> 16;
  62        cmdo[4] = cmdarg >> 8;
  63        cmdo[5] = cmdarg;
  64        cmdo[6] = (crc7(0, &cmdo[1], 5) << 1) | 0x01;
  65        spi_xfer(spi, sizeof(cmdo) * 8, cmdo, NULL, 0);
  66        for (i = 0; i < CTOUT; i++) {
  67                spi_xfer(spi, 1 * 8, NULL, &r1, 0);
  68                if (i && (r1 & 0x80) == 0) /* r1 response */
  69                        break;
  70        }
  71        debug("%s:cmd%d resp%d %x\n", __func__, cmdidx, i, r1);
  72        return r1;
  73}
  74
  75static uint mmc_spi_readdata(struct mmc *mmc, void *xbuf,
  76                                u32 bcnt, u32 bsize)
  77{
  78        struct spi_slave *spi = mmc->priv;
  79        u8 *buf = xbuf;
  80        u8 r1;
  81        u16 crc;
  82        int i;
  83        while (bcnt--) {
  84                for (i = 0; i < RTOUT; i++) {
  85                        spi_xfer(spi, 1 * 8, NULL, &r1, 0);
  86                        if (r1 != 0xff) /* data token */
  87                                break;
  88                }
  89                debug("%s:tok%d %x\n", __func__, i, r1);
  90                if (r1 == SPI_TOKEN_SINGLE) {
  91                        spi_xfer(spi, bsize * 8, NULL, buf, 0);
  92                        spi_xfer(spi, 2 * 8, NULL, &crc, 0);
  93#ifdef CONFIG_MMC_SPI_CRC_ON
  94                        if (swab16(cyg_crc16(buf, bsize)) != crc) {
  95                                debug("%s: CRC error\n", mmc->name);
  96                                r1 = R1_SPI_COM_CRC;
  97                                break;
  98                        }
  99#endif
 100                        r1 = 0;
 101                } else {
 102                        r1 = R1_SPI_ERROR;
 103                        break;
 104                }
 105                buf += bsize;
 106        }
 107        return r1;
 108}
 109
 110static uint mmc_spi_writedata(struct mmc *mmc, const void *xbuf,
 111                              u32 bcnt, u32 bsize, int multi)
 112{
 113        struct spi_slave *spi = mmc->priv;
 114        const u8 *buf = xbuf;
 115        u8 r1;
 116        u16 crc;
 117        u8 tok[2];
 118        int i;
 119        tok[0] = 0xff;
 120        tok[1] = multi ? SPI_TOKEN_MULTI_WRITE : SPI_TOKEN_SINGLE;
 121        while (bcnt--) {
 122#ifdef CONFIG_MMC_SPI_CRC_ON
 123                crc = swab16(cyg_crc16((u8 *)buf, bsize));
 124#endif
 125                spi_xfer(spi, 2 * 8, tok, NULL, 0);
 126                spi_xfer(spi, bsize * 8, buf, NULL, 0);
 127                spi_xfer(spi, 2 * 8, &crc, NULL, 0);
 128                for (i = 0; i < CTOUT; i++) {
 129                        spi_xfer(spi, 1 * 8, NULL, &r1, 0);
 130                        if ((r1 & 0x10) == 0) /* response token */
 131                                break;
 132                }
 133                debug("%s:tok%d %x\n", __func__, i, r1);
 134                if (SPI_MMC_RESPONSE_CODE(r1) == SPI_RESPONSE_ACCEPTED) {
 135                        for (i = 0; i < WTOUT; i++) { /* wait busy */
 136                                spi_xfer(spi, 1 * 8, NULL, &r1, 0);
 137                                if (i && r1 == 0xff) {
 138                                        r1 = 0;
 139                                        break;
 140                                }
 141                        }
 142                        if (i == WTOUT) {
 143                                debug("%s:wtout %x\n", __func__, r1);
 144                                r1 = R1_SPI_ERROR;
 145                                break;
 146                        }
 147                } else {
 148                        debug("%s: err %x\n", __func__, r1);
 149                        r1 = R1_SPI_COM_CRC;
 150                        break;
 151                }
 152                buf += bsize;
 153        }
 154        if (multi && bcnt == -1) { /* stop multi write */
 155                tok[1] = SPI_TOKEN_STOP_TRAN;
 156                spi_xfer(spi, 2 * 8, tok, NULL, 0);
 157                for (i = 0; i < WTOUT; i++) { /* wait busy */
 158                        spi_xfer(spi, 1 * 8, NULL, &r1, 0);
 159                        if (i && r1 == 0xff) {
 160                                r1 = 0;
 161                                break;
 162                        }
 163                }
 164                if (i == WTOUT) {
 165                        debug("%s:wstop %x\n", __func__, r1);
 166                        r1 = R1_SPI_ERROR;
 167                }
 168        }
 169        return r1;
 170}
 171
 172static int mmc_spi_request(struct mmc *mmc, struct mmc_cmd *cmd,
 173                struct mmc_data *data)
 174{
 175        struct spi_slave *spi = mmc->priv;
 176        u8 r1;
 177        int i;
 178        int ret = 0;
 179        debug("%s:cmd%d %x %x\n", __func__,
 180              cmd->cmdidx, cmd->resp_type, cmd->cmdarg);
 181        spi_claim_bus(spi);
 182        spi_cs_activate(spi);
 183        r1 = mmc_spi_sendcmd(mmc, cmd->cmdidx, cmd->cmdarg);
 184        if (r1 == 0xff) { /* no response */
 185                ret = NO_CARD_ERR;
 186                goto done;
 187        } else if (r1 & R1_SPI_COM_CRC) {
 188                ret = COMM_ERR;
 189                goto done;
 190        } else if (r1 & ~R1_SPI_IDLE) { /* other errors */
 191                ret = TIMEOUT;
 192                goto done;
 193        } else if (cmd->resp_type == MMC_RSP_R2) {
 194                r1 = mmc_spi_readdata(mmc, cmd->response, 1, 16);
 195                for (i = 0; i < 4; i++)
 196                        cmd->response[i] = swab32(cmd->response[i]);
 197                debug("r128 %x %x %x %x\n", cmd->response[0], cmd->response[1],
 198                      cmd->response[2], cmd->response[3]);
 199        } else if (!data) {
 200                switch (cmd->cmdidx) {
 201                case SD_CMD_APP_SEND_OP_COND:
 202                case MMC_CMD_SEND_OP_COND:
 203                        cmd->response[0] = (r1 & R1_SPI_IDLE) ? 0 : OCR_BUSY;
 204                        break;
 205                case SD_CMD_SEND_IF_COND:
 206                case MMC_CMD_SPI_READ_OCR:
 207                        spi_xfer(spi, 4 * 8, NULL, cmd->response, 0);
 208                        cmd->response[0] = swab32(cmd->response[0]);
 209                        debug("r32 %x\n", cmd->response[0]);
 210                        break;
 211                case MMC_CMD_SEND_STATUS:
 212                        spi_xfer(spi, 1 * 8, NULL, cmd->response, 0);
 213                        cmd->response[0] = (cmd->response[0] & 0xff) ?
 214                                MMC_STATUS_ERROR : MMC_STATUS_RDY_FOR_DATA;
 215                        break;
 216                }
 217        } else {
 218                debug("%s:data %x %x %x\n", __func__,
 219                      data->flags, data->blocks, data->blocksize);
 220                if (data->flags == MMC_DATA_READ)
 221                        r1 = mmc_spi_readdata(mmc, data->dest,
 222                                data->blocks, data->blocksize);
 223                else if  (data->flags == MMC_DATA_WRITE)
 224                        r1 = mmc_spi_writedata(mmc, data->src,
 225                                data->blocks, data->blocksize,
 226                                (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK));
 227                if (r1 & R1_SPI_COM_CRC)
 228                        ret = COMM_ERR;
 229                else if (r1) /* other errors */
 230                        ret = TIMEOUT;
 231        }
 232done:
 233        spi_cs_deactivate(spi);
 234        spi_release_bus(spi);
 235        return ret;
 236}
 237
 238static void mmc_spi_set_ios(struct mmc *mmc)
 239{
 240        struct spi_slave *spi = mmc->priv;
 241        debug("%s: clock %u\n", __func__, mmc->clock);
 242        if (mmc->clock)
 243                spi_set_speed(spi, mmc->clock);
 244}
 245
 246static int mmc_spi_init_p(struct mmc *mmc)
 247{
 248        struct spi_slave *spi = mmc->priv;
 249        mmc->clock = 0;
 250        spi_set_speed(spi, MMC_SPI_MIN_CLOCK);
 251        spi_claim_bus(spi);
 252        /* cs deactivated for 100+ clock */
 253        spi_xfer(spi, 18 * 8, NULL, NULL, 0);
 254        spi_release_bus(spi);
 255        return 0;
 256}
 257
 258struct mmc *mmc_spi_init(uint bus, uint cs, uint speed, uint mode)
 259{
 260        struct mmc *mmc;
 261
 262        mmc = malloc(sizeof(*mmc));
 263        if (!mmc)
 264                return NULL;
 265        memset(mmc, 0, sizeof(*mmc));
 266        mmc->priv = spi_setup_slave(bus, cs, speed, mode);
 267        if (!mmc->priv) {
 268                free(mmc);
 269                return NULL;
 270        }
 271        sprintf(mmc->name, "MMC_SPI");
 272        mmc->send_cmd = mmc_spi_request;
 273        mmc->set_ios = mmc_spi_set_ios;
 274        mmc->init = mmc_spi_init_p;
 275        mmc->getcd = NULL;
 276        mmc->host_caps = MMC_MODE_SPI;
 277
 278        mmc->voltages = MMC_SPI_VOLTAGE;
 279        mmc->f_max = speed;
 280        mmc->f_min = MMC_SPI_MIN_CLOCK;
 281        mmc->block_dev.part_type = PART_TYPE_DOS;
 282
 283        mmc_register(mmc);
 284
 285        return mmc;
 286}
 287