LXR uboot/drivers/usb/musb-new/musb

   1/*
   2 * MUSB OTG driver defines
   3 *
   4 * Copyright 2005 Mentor Graphics Corporation
   5 * Copyright (C) 2005-2006 by Texas Instruments
   6 * Copyright (C) 2006-2007 Nokia Corporation
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License
  10 * version 2 as published by the Free Software Foundation.
  11 *
  12 * This program is distributed in the hope that it will be useful, but
  13 * WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15 * General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20 * 02110-1301 USA
  21 *
  22 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  25 * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32 *
  33 */
  34
  35#ifndef __MUSB_CORE_H__
  36#define __MUSB_CORE_H__
  37
  38#ifndef __UBOOT__
  39#include <linux/slab.h>
  40#include <linux/list.h>
  41#include <linux/interrupt.h>
  42#include <linux/errno.h>
  43#include <linux/timer.h>
  44#include <linux/device.h>
  45#include <linux/usb.h>
  46#include <linux/usb/otg.h>
  47#else
  48#include <asm/errno.h>
  49#endif
  50#include <linux/usb/ch9.h>
  51#include <linux/usb/gadget.h>
  52#include <linux/usb/musb.h>
  53
  54struct musb;
  55struct musb_hw_ep;
  56struct musb_ep;
  57
  58/* Helper defines for struct musb->hwvers */
  59#define MUSB_HWVERS_MAJOR(x)    ((x >> 10) & 0x1f)
  60#define MUSB_HWVERS_MINOR(x)    (x & 0x3ff)
  61#define MUSB_HWVERS_RC          0x8000
  62#define MUSB_HWVERS_1300        0x52C
  63#define MUSB_HWVERS_1400        0x590
  64#define MUSB_HWVERS_1800        0x720
  65#define MUSB_HWVERS_1900        0x784
  66#define MUSB_HWVERS_2000        0x800
  67
  68#include "musb_debug.h"
  69#include "musb_dma.h"
  70
  71#include "musb_io.h"
  72#include "musb_regs.h"
  73
  74#include "musb_gadget.h"
  75#ifndef __UBOOT__
  76#include <linux/usb/hcd.h>
  77#endif
  78#include "musb_host.h"
  79
  80#define is_peripheral_enabled(musb)     ((musb)->board_mode != MUSB_HOST)
  81#define is_host_enabled(musb)           ((musb)->board_mode != MUSB_PERIPHERAL)
  82#define is_otg_enabled(musb)            ((musb)->board_mode == MUSB_OTG)
  83
  84/* NOTE:  otg and peripheral-only state machines start at B_IDLE.
  85 * OTG or host-only go to A_IDLE when ID is sensed.
  86 */
  87#define is_peripheral_active(m)         (!(m)->is_host)
  88#define is_host_active(m)               ((m)->is_host)
  89
  90#ifdef CONFIG_PROC_FS
  91#include <linux/fs.h>
  92#define MUSB_CONFIG_PROC_FS
  93#endif
  94
  95/****************************** PERIPHERAL ROLE *****************************/
  96
  97#ifndef __UBOOT__
  98#define is_peripheral_capable() (1)
  99#else
 100#ifdef CONFIG_MUSB_GADGET
 101#define is_peripheral_capable() (1)
 102#else
 103#define is_peripheral_capable() (0)
 104#endif
 105#endif
 106
 107extern irqreturn_t musb_g_ep0_irq(struct musb *);
 108extern void musb_g_tx(struct musb *, u8);
 109extern void musb_g_rx(struct musb *, u8);
 110extern void musb_g_reset(struct musb *);
 111extern void musb_g_suspend(struct musb *);
 112extern void musb_g_resume(struct musb *);
 113extern void musb_g_wakeup(struct musb *);
 114extern void musb_g_disconnect(struct musb *);
 115
 116/****************************** HOST ROLE ***********************************/
 117
 118#ifndef __UBOOT__
 119#define is_host_capable()       (1)
 120#else
 121#ifdef CONFIG_MUSB_HOST
 122#define is_host_capable()       (1)
 123#else
 124#define is_host_capable()       (0)
 125#endif
 126#endif
 127
 128extern irqreturn_t musb_h_ep0_irq(struct musb *);
 129extern void musb_host_tx(struct musb *, u8);
 130extern void musb_host_rx(struct musb *, u8);
 131
 132/****************************** CONSTANTS ********************************/
 133
 134#ifndef MUSB_C_NUM_EPS
 135#define MUSB_C_NUM_EPS ((u8)16)
 136#endif
 137
 138#ifndef MUSB_MAX_END0_PACKET
 139#define MUSB_MAX_END0_PACKET ((u16)MUSB_EP0_FIFOSIZE)
 140#endif
 141
 142/* host side ep0 states */
 143enum musb_h_ep0_state {
 144        MUSB_EP0_IDLE,
 145        MUSB_EP0_START,                 /* expect ack of setup */
 146        MUSB_EP0_IN,                    /* expect IN DATA */
 147        MUSB_EP0_OUT,                   /* expect ack of OUT DATA */
 148        MUSB_EP0_STATUS,                /* expect ack of STATUS */
 149} __attribute__ ((packed));
 150
 151/* peripheral side ep0 states */
 152enum musb_g_ep0_state {
 153        MUSB_EP0_STAGE_IDLE,            /* idle, waiting for SETUP */
 154        MUSB_EP0_STAGE_SETUP,           /* received SETUP */
 155        MUSB_EP0_STAGE_TX,              /* IN data */
 156        MUSB_EP0_STAGE_RX,              /* OUT data */
 157        MUSB_EP0_STAGE_STATUSIN,        /* (after OUT data) */
 158        MUSB_EP0_STAGE_STATUSOUT,       /* (after IN data) */
 159        MUSB_EP0_STAGE_ACKWAIT,         /* after zlp, before statusin */
 160} __attribute__ ((packed));
 161
 162/*
 163 * OTG protocol constants.  See USB OTG 1.3 spec,
 164 * sections 5.5 "Device Timings" and 6.6.5 "Timers".
 165 */
 166#define OTG_TIME_A_WAIT_VRISE   100             /* msec (max) */
 167#define OTG_TIME_A_WAIT_BCON    1100            /* min 1 second */
 168#define OTG_TIME_A_AIDL_BDIS    200             /* min 200 msec */
 169#define OTG_TIME_B_ASE0_BRST    100             /* min 3.125 ms */
 170
 171
 172/*************************** REGISTER ACCESS ********************************/
 173
 174/* Endpoint registers (other than dynfifo setup) can be accessed either
 175 * directly with the "flat" model, or after setting up an index register.
 176 */
 177
 178#if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \
 179                || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \
 180                || defined(CONFIG_ARCH_OMAP4)
 181/* REVISIT indexed access seemed to
 182 * misbehave (on DaVinci) for at least peripheral IN ...
 183 */
 184#define MUSB_FLAT_REG
 185#endif
 186
 187/* TUSB mapping: "flat" plus ep0 special cases */
 188#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 189        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 190#define musb_ep_select(_mbase, _epnum) \
 191        musb_writeb((_mbase), MUSB_INDEX, (_epnum))
 192#define MUSB_EP_OFFSET                  MUSB_TUSB_OFFSET
 193
 194/* "flat" mapping: each endpoint has its own i/o address */
 195#elif   defined(MUSB_FLAT_REG)
 196#define musb_ep_select(_mbase, _epnum)  (((void)(_mbase)), ((void)(_epnum)))
 197#define MUSB_EP_OFFSET                  MUSB_FLAT_OFFSET
 198
 199/* "indexed" mapping: INDEX register controls register bank select */
 200#else
 201#define musb_ep_select(_mbase, _epnum) \
 202        musb_writeb((_mbase), MUSB_INDEX, (_epnum))
 203#define MUSB_EP_OFFSET                  MUSB_INDEXED_OFFSET
 204#endif
 205
 206/****************************** FUNCTIONS ********************************/
 207
 208#define MUSB_HST_MODE(_musb)\
 209        { (_musb)->is_host = true; }
 210#define MUSB_DEV_MODE(_musb) \
 211        { (_musb)->is_host = false; }
 212
 213#define test_devctl_hst_mode(_x) \
 214        (musb_readb((_x)->mregs, MUSB_DEVCTL)&MUSB_DEVCTL_HM)
 215
 216#define MUSB_MODE(musb) ((musb)->is_host ? "Host" : "Peripheral")
 217
 218/******************************** TYPES *************************************/
 219
 220/**
 221 * struct musb_platform_ops - Operations passed to musb_core by HW glue layer
 222 * @init:       turns on clocks, sets up platform-specific registers, etc
 223 * @exit:       undoes @init
 224 * @set_mode:   forcefully changes operating mode
 225 * @try_ilde:   tries to idle the IP
 226 * @vbus_status: returns vbus status if possible
 227 * @set_vbus:   forces vbus status
 228 * @adjust_channel_params: pre check for standard dma channel_program func
 229 */
 230struct musb_platform_ops {
 231        int     (*init)(struct musb *musb);
 232        int     (*exit)(struct musb *musb);
 233
 234        void    (*enable)(struct musb *musb);
 235        void    (*disable)(struct musb *musb);
 236
 237        int     (*set_mode)(struct musb *musb, u8 mode);
 238        void    (*try_idle)(struct musb *musb, unsigned long timeout);
 239
 240        int     (*vbus_status)(struct musb *musb);
 241        void    (*set_vbus)(struct musb *musb, int on);
 242
 243        int     (*adjust_channel_params)(struct dma_channel *channel,
 244                                u16 packet_sz, u8 *mode,
 245                                dma_addr_t *dma_addr, u32 *len);
 246};
 247
 248/*
 249 * struct musb_hw_ep - endpoint hardware (bidirectional)
 250 *
 251 * Ordered slightly for better cacheline locality.
 252 */
 253struct musb_hw_ep {
 254        struct musb             *musb;
 255        void __iomem            *fifo;
 256        void __iomem            *regs;
 257
 258#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 259        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 260        void __iomem            *conf;
 261#endif
 262
 263        /* index in musb->endpoints[]  */
 264        u8                      epnum;
 265
 266        /* hardware configuration, possibly dynamic */
 267        bool                    is_shared_fifo;
 268        bool                    tx_double_buffered;
 269        bool                    rx_double_buffered;
 270        u16                     max_packet_sz_tx;
 271        u16                     max_packet_sz_rx;
 272
 273        struct dma_channel      *tx_channel;
 274        struct dma_channel      *rx_channel;
 275
 276#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 277        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 278        /* TUSB has "asynchronous" and "synchronous" dma modes */
 279        dma_addr_t              fifo_async;
 280        dma_addr_t              fifo_sync;
 281        void __iomem            *fifo_sync_va;
 282#endif
 283
 284        void __iomem            *target_regs;
 285
 286        /* currently scheduled peripheral endpoint */
 287        struct musb_qh          *in_qh;
 288        struct musb_qh          *out_qh;
 289
 290        u8                      rx_reinit;
 291        u8                      tx_reinit;
 292
 293        /* peripheral side */
 294        struct musb_ep          ep_in;                  /* TX */
 295        struct musb_ep          ep_out;                 /* RX */
 296};
 297
 298static inline struct musb_request *next_in_request(struct musb_hw_ep *hw_ep)
 299{
 300        return next_request(&hw_ep->ep_in);
 301}
 302
 303static inline struct musb_request *next_out_request(struct musb_hw_ep *hw_ep)
 304{
 305        return next_request(&hw_ep->ep_out);
 306}
 307
 308struct musb_csr_regs {
 309        /* FIFO registers */
 310        u16 txmaxp, txcsr, rxmaxp, rxcsr;
 311        u16 rxfifoadd, txfifoadd;
 312        u8 txtype, txinterval, rxtype, rxinterval;
 313        u8 rxfifosz, txfifosz;
 314        u8 txfunaddr, txhubaddr, txhubport;
 315        u8 rxfunaddr, rxhubaddr, rxhubport;
 316};
 317
 318struct musb_context_registers {
 319
 320        u8 power;
 321        u16 intrtxe, intrrxe;
 322        u8 intrusbe;
 323        u16 frame;
 324        u8 index, testmode;
 325
 326        u8 devctl, busctl, misc;
 327        u32 otg_interfsel;
 328
 329        struct musb_csr_regs index_regs[MUSB_C_NUM_EPS];
 330};
 331
 332/*
 333 * struct musb - Driver instance data.
 334 */
 335struct musb {
 336        /* device lock */
 337        spinlock_t              lock;
 338
 339        const struct musb_platform_ops *ops;
 340        struct musb_context_registers context;
 341
 342        irqreturn_t             (*isr)(int, void *);
 343        struct work_struct      irq_work;
 344        u16                     hwvers;
 345
 346/* this hub status bit is reserved by USB 2.0 and not seen by usbcore */
 347#define MUSB_PORT_STAT_RESUME   (1 << 31)
 348
 349        u32                     port1_status;
 350
 351        unsigned long           rh_timer;
 352
 353        enum musb_h_ep0_state   ep0_stage;
 354
 355        /* bulk traffic normally dedicates endpoint hardware, and each
 356         * direction has its own ring of host side endpoints.
 357         * we try to progress the transfer at the head of each endpoint's
 358         * queue until it completes or NAKs too much; then we try the next
 359         * endpoint.
 360         */
 361        struct musb_hw_ep       *bulk_ep;
 362
 363        struct list_head        control;        /* of musb_qh */
 364        struct list_head        in_bulk;        /* of musb_qh */
 365        struct list_head        out_bulk;       /* of musb_qh */
 366
 367        struct timer_list       otg_timer;
 368        struct notifier_block   nb;
 369
 370        struct dma_controller   *dma_controller;
 371
 372        struct device           *controller;
 373        void __iomem            *ctrl_base;
 374        void __iomem            *mregs;
 375
 376#if defined(CONFIG_USB_MUSB_TUSB6010) || \
 377        defined(CONFIG_USB_MUSB_TUSB6010_MODULE)
 378        dma_addr_t              async;
 379        dma_addr_t              sync;
 380        void __iomem            *sync_va;
 381#endif
 382
 383        /* passed down from chip/board specific irq handlers */
 384        u8                      int_usb;
 385        u16                     int_rx;
 386        u16                     int_tx;
 387
 388        struct usb_phy          *xceiv;
 389
 390        int nIrq;
 391        unsigned                irq_wake:1;
 392
 393        struct musb_hw_ep        endpoints[MUSB_C_NUM_EPS];
 394#define control_ep              endpoints
 395
 396#define VBUSERR_RETRY_COUNT     3
 397        u16                     vbuserr_retry;
 398        u16 epmask;
 399        u8 nr_endpoints;
 400
 401        u8 board_mode;          /* enum musb_mode */
 402        int                     (*board_set_power)(int state);
 403
 404        u8                      min_power;      /* vbus for periph, in mA/2 */
 405
 406        bool                    is_host;
 407
 408        int                     a_wait_bcon;    /* VBUS timeout in msecs */
 409        unsigned long           idle_timeout;   /* Next timeout in jiffies */
 410
 411        /* active means connected and not suspended */
 412        unsigned                is_active:1;
 413
 414        unsigned is_multipoint:1;
 415        unsigned ignore_disconnect:1;   /* during bus resets */
 416
 417        unsigned                hb_iso_rx:1;    /* high bandwidth iso rx? */
 418        unsigned                hb_iso_tx:1;    /* high bandwidth iso tx? */
 419        unsigned                dyn_fifo:1;     /* dynamic FIFO supported? */
 420
 421        unsigned                bulk_split:1;
 422#define can_bulk_split(musb,type) \
 423        (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_split)
 424
 425        unsigned                bulk_combine:1;
 426#define can_bulk_combine(musb,type) \
 427        (((type) == USB_ENDPOINT_XFER_BULK) && (musb)->bulk_combine)
 428
 429        /* is_suspended means USB B_PERIPHERAL suspend */
 430        unsigned                is_suspended:1;
 431
 432        /* may_wakeup means remote wakeup is enabled */
 433        unsigned                may_wakeup:1;
 434
 435        /* is_self_powered is reported in device status and the
 436         * config descriptor.  is_bus_powered means B_PERIPHERAL
 437         * draws some VBUS current; both can be true.
 438         */
 439        unsigned                is_self_powered:1;
 440        unsigned                is_bus_powered:1;
 441
 442        unsigned                set_address:1;
 443        unsigned                test_mode:1;
 444        unsigned                softconnect:1;
 445
 446        u8                      address;
 447        u8                      test_mode_nr;
 448        u16                     ackpend;                /* ep0 */
 449        enum musb_g_ep0_state   ep0_state;
 450        struct usb_gadget       g;                      /* the gadget */
 451        struct usb_gadget_driver *gadget_driver;        /* its driver */
 452
 453        /*
 454         * FIXME: Remove this flag.
 455         *
 456         * This is only added to allow Blackfin to work
 457         * with current driver. For some unknown reason
 458         * Blackfin doesn't work with double buffering
 459         * and that's enabled by default.
 460         *
 461         * We added this flag to forcefully disable double
 462         * buffering until we get it working.
 463         */
 464        unsigned                double_buffer_not_ok:1;
 465
 466        struct musb_hdrc_config *config;
 467
 468#ifdef MUSB_CONFIG_PROC_FS
 469        struct proc_dir_entry *proc_entry;
 470#endif
 471};
 472
 473static inline struct musb *gadget_to_musb(struct usb_gadget *g)
 474{
 475        return container_of(g, struct musb, g);
 476}
 477
 478#ifdef CONFIG_BLACKFIN
 479static inline int musb_read_fifosize(struct musb *musb,
 480                struct musb_hw_ep *hw_ep, u8 epnum)
 481{
 482        musb->nr_endpoints++;
 483        musb->epmask |= (1 << epnum);
 484
 485        if (epnum < 5) {
 486                hw_ep->max_packet_sz_tx = 128;
 487                hw_ep->max_packet_sz_rx = 128;
 488        } else {
 489                hw_ep->max_packet_sz_tx = 1024;
 490                hw_ep->max_packet_sz_rx = 1024;
 491        }
 492        hw_ep->is_shared_fifo = false;
 493
 494        return 0;
 495}
 496
 497static inline void musb_configure_ep0(struct musb *musb)
 498{
 499        musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
 500        musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
 501        musb->endpoints[0].is_shared_fifo = true;
 502}
 503
 504#else
 505
 506static inline int musb_read_fifosize(struct musb *musb,
 507                struct musb_hw_ep *hw_ep, u8 epnum)
 508{
 509        void *mbase = musb->mregs;
 510        u8 reg = 0;
 511
 512        /* read from core using indexed model */
 513        reg = musb_readb(mbase, MUSB_EP_OFFSET(epnum, MUSB_FIFOSIZE));
 514        /* 0's returned when no more endpoints */
 515        if (!reg)
 516                return -ENODEV;
 517
 518        musb->nr_endpoints++;
 519        musb->epmask |= (1 << epnum);
 520
 521        hw_ep->max_packet_sz_tx = 1 << (reg & 0x0f);
 522
 523        /* shared TX/RX FIFO? */
 524        if ((reg & 0xf0) == 0xf0) {
 525                hw_ep->max_packet_sz_rx = hw_ep->max_packet_sz_tx;
 526                hw_ep->is_shared_fifo = true;
 527                return 0;
 528        } else {
 529                hw_ep->max_packet_sz_rx = 1 << ((reg & 0xf0) >> 4);
 530                hw_ep->is_shared_fifo = false;
 531        }
 532
 533        return 0;
 534}
 535
 536static inline void musb_configure_ep0(struct musb *musb)
 537{
 538        musb->endpoints[0].max_packet_sz_tx = MUSB_EP0_FIFOSIZE;
 539        musb->endpoints[0].max_packet_sz_rx = MUSB_EP0_FIFOSIZE;
 540        musb->endpoints[0].is_shared_fifo = true;
 541}
 542#endif /* CONFIG_BLACKFIN */
 543
 544
 545/***************************** Glue it together *****************************/
 546
 547extern const char musb_driver_name[];
 548
 549extern void musb_start(struct musb *musb);
 550extern void musb_stop(struct musb *musb);
 551
 552extern void musb_write_fifo(struct musb_hw_ep *ep, u16 len, const u8 *src);
 553extern void musb_read_fifo(struct musb_hw_ep *ep, u16 len, u8 *dst);
 554
 555extern void musb_load_testpacket(struct musb *);
 556
 557extern irqreturn_t musb_interrupt(struct musb *);
 558
 559extern void musb_hnp_stop(struct musb *musb);
 560
 561static inline void musb_platform_set_vbus(struct musb *musb, int is_on)
 562{
 563        if (musb->ops->set_vbus)
 564                musb->ops->set_vbus(musb, is_on);
 565}
 566
 567static inline void musb_platform_enable(struct musb *musb)
 568{
 569        if (musb->ops->enable)
 570                musb->ops->enable(musb);
 571}
 572
 573static inline void musb_platform_disable(struct musb *musb)
 574{
 575        if (musb->ops->disable)
 576                musb->ops->disable(musb);
 577}
 578
 579static inline int musb_platform_set_mode(struct musb *musb, u8 mode)
 580{
 581        if (!musb->ops->set_mode)
 582                return 0;
 583
 584        return musb->ops->set_mode(musb, mode);
 585}
 586
 587static inline void musb_platform_try_idle(struct musb *musb,
 588                unsigned long timeout)
 589{
 590        if (musb->ops->try_idle)
 591                musb->ops->try_idle(musb, timeout);
 592}
 593
 594static inline int musb_platform_get_vbus_status(struct musb *musb)
 595{
 596        if (!musb->ops->vbus_status)
 597                return 0;
 598
 599        return musb->ops->vbus_status(musb);
 600}
 601
 602static inline int musb_platform_init(struct musb *musb)
 603{
 604        if (!musb->ops->init)
 605                return -EINVAL;
 606
 607        return musb->ops->init(musb);
 608}
 609
 610static inline int musb_platform_exit(struct musb *musb)
 611{
 612        if (!musb->ops->exit)
 613                return -EINVAL;
 614
 615        return musb->ops->exit(musb);
 616}
 617
 618#ifdef __UBOOT__
 619struct musb *
 620musb_init_controller(struct musb_hdrc_platform_data *plat, struct device *dev,
 621                             void *ctrl);
 622#endif
 623#endif  /* __MUSB_CORE_H__ */
 624