LXR uboot/include/configs/igep00x0.h

   1/*
   2 * Common configuration settings for IGEP technology based boards
   3 *
   4 * (C) Copyright 2012
   5 * ISEE 2007 SL, <www.iseebcn.com>
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License as
   9 * published by the Free Software Foundation; either version 2 of
  10 * the License, or (at your option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20 * MA 02111-1307 USA
  21 */
  22
  23#ifndef __IGEP00X0_H
  24#define __IGEP00X0_H
  25
  26#include <asm/sizes.h>
  27
  28/*
  29 * High Level Configuration Options
  30 */
  31#define CONFIG_OMAP             1       /* in a TI OMAP core */
  32#define CONFIG_OMAP34XX         1       /* which is a 34XX */
  33#define CONFIG_OMAP_GPIO
  34
  35#define CONFIG_SDRC     /* The chip has SDRC controller */
  36
  37#include <asm/arch/cpu.h>
  38#include <asm/arch/omap3.h>
  39
  40/*
  41 * Display CPU and Board information
  42 */
  43#define CONFIG_DISPLAY_CPUINFO          1
  44#define CONFIG_DISPLAY_BOARDINFO        1
  45
  46/* Clock Defines */
  47#define V_OSCK                  26000000        /* Clock output from T2 */
  48#define V_SCLK                  (V_OSCK >> 1)
  49
  50#define CONFIG_MISC_INIT_R
  51
  52#define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  53#define CONFIG_SETUP_MEMORY_TAGS        1
  54#define CONFIG_INITRD_TAG               1
  55#define CONFIG_REVISION_TAG             1
  56
  57#define CONFIG_OF_LIBFDT                1
  58
  59/*
  60 * NS16550 Configuration
  61 */
  62
  63#define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  64
  65#define CONFIG_SYS_NS16550
  66#define CONFIG_SYS_NS16550_SERIAL
  67#define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  68#define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  69
  70/* define to avoid U-Boot to hang while waiting for TEMT */
  71#define CONFIG_SYS_NS16550_BROKEN_TEMT
  72
  73/* select serial console configuration */
  74#define CONFIG_CONS_INDEX               3
  75#define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  76#define CONFIG_SERIAL3                  3
  77
  78/* allow to overwrite serial and ethaddr */
  79#define CONFIG_ENV_OVERWRITE
  80#define CONFIG_BAUDRATE                 115200
  81#define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600, \
  82                                        115200}
  83#define CONFIG_GENERIC_MMC              1
  84#define CONFIG_MMC                      1
  85#define CONFIG_OMAP_HSMMC               1
  86#define CONFIG_DOS_PARTITION            1
  87
  88/* USB */
  89#define CONFIG_MUSB_UDC                 1
  90#define CONFIG_USB_OMAP3                1
  91#define CONFIG_TWL4030_USB              1
  92
  93/* USB device configuration */
  94#define CONFIG_USB_DEVICE               1
  95#define CONFIG_USB_TTY                  1
  96#define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
  97
  98/* Change these to suit your needs */
  99#define CONFIG_USBD_VENDORID            0x0451
 100#define CONFIG_USBD_PRODUCTID           0x5678
 101#define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 102#define CONFIG_USBD_PRODUCT_NAME        "IGEP"
 103
 104/* commands to include */
 105#include <config_cmd_default.h>
 106
 107#define CONFIG_CMD_CACHE
 108#define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 109#define CONFIG_CMD_FAT          /* FAT support                  */
 110#define CONFIG_CMD_I2C          /* I2C serial bus support       */
 111#define CONFIG_CMD_MMC          /* MMC support                  */
 112#ifdef CONFIG_BOOT_ONENAND
 113#define CONFIG_CMD_ONENAND      /* ONENAND support              */
 114#endif
 115#ifdef CONFIG_BOOT_NAND
 116#define CONFIG_CMD_NAND
 117#endif
 118#define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
 119#define CONFIG_CMD_DHCP
 120#define CONFIG_CMD_PING
 121#define CONFIG_CMD_NFS          /* NFS support                  */
 122#define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands    */
 123#define CONFIG_MTD_DEVICE
 124
 125#undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 126#undef CONFIG_CMD_IMLS          /* List all found images        */
 127
 128#define CONFIG_SYS_NO_FLASH
 129#define CONFIG_HARD_I2C                 1
 130#define CONFIG_SYS_I2C_SPEED            100000
 131#define CONFIG_SYS_I2C_SLAVE            1
 132#define CONFIG_SYS_I2C_BUS              0
 133#define CONFIG_SYS_I2C_BUS_SELECT       1
 134#define CONFIG_DRIVER_OMAP34XX_I2C      1
 135
 136/*
 137 * TWL4030
 138 */
 139#define CONFIG_TWL4030_POWER            1
 140
 141#define CONFIG_BOOTDELAY                3
 142
 143#define CONFIG_EXTRA_ENV_SETTINGS \
 144        "usbtty=cdc_acm\0" \
 145        "loadaddr=0x82000000\0" \
 146        "usbtty=cdc_acm\0" \
 147        "console=ttyO2,115200n8\0" \
 148        "mpurate=auto\0" \
 149        "vram=12M\0" \
 150        "dvimode=1024x768MR-16@60\0" \
 151        "defaultdisplay=dvi\0" \
 152        "mmcdev=0\0" \
 153        "mmcroot=/dev/mmcblk0p2 rw\0" \
 154        "mmcrootfstype=ext4 rootwait\0" \
 155        "nandroot=/dev/mtdblock4 rw\0" \
 156        "nandrootfstype=jffs2\0" \
 157        "mmcargs=setenv bootargs console=${console} " \
 158                "mpurate=${mpurate} " \
 159                "vram=${vram} " \
 160                "omapfb.mode=dvi:${dvimode} " \
 161                "omapfb.debug=y " \
 162                "omapdss.def_disp=${defaultdisplay} " \
 163                "root=${mmcroot} " \
 164                "rootfstype=${mmcrootfstype}\0" \
 165        "nandargs=setenv bootargs console=${console} " \
 166                "mpurate=${mpurate} " \
 167                "vram=${vram} " \
 168                "omapfb.mode=dvi:${dvimode} " \
 169                "omapfb.debug=y " \
 170                "omapdss.def_disp=${defaultdisplay} " \
 171                "root=${nandroot} " \
 172                "rootfstype=${nandrootfstype}\0" \
 173        "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
 174        "importbootenv=echo Importing environment from mmc ...; " \
 175                "env import -t $loadaddr $filesize\0" \
 176        "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 177        "mmcboot=echo Booting from mmc ...; " \
 178                "run mmcargs; " \
 179                "bootm ${loadaddr}\0" \
 180        "nandboot=echo Booting from onenand ...; " \
 181                "run nandargs; " \
 182                "onenand read ${loadaddr} 280000 400000; " \
 183                "bootm ${loadaddr}\0" \
 184
 185#define CONFIG_BOOTCOMMAND \
 186        "mmc dev ${mmcdev}; if mmc rescan; then " \
 187                "echo SD/MMC found on device ${mmcdev};" \
 188                "if run loadbootenv; then " \
 189                        "run importbootenv;" \
 190                "fi;" \
 191                "if test -n $uenvcmd; then " \
 192                        "echo Running uenvcmd ...;" \
 193                        "run uenvcmd;" \
 194                "fi;" \
 195                "if run loaduimage; then " \
 196                        "run mmcboot;" \
 197                "fi;" \
 198        "fi;" \
 199        "run nandboot;" \
 200
 201#define CONFIG_AUTO_COMPLETE            1
 202
 203/*
 204 * Miscellaneous configurable options
 205 */
 206#define CONFIG_SYS_LONGHELP             /* undef to save memory */
 207#define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 208#define CONFIG_SYS_PROMPT               "U-Boot # "
 209#define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 210/* Print Buffer Size */
 211#define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 212                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 213#define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 214/* Boot Argument Buffer Size */
 215#define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 216
 217#define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
 218                                                                /* works on */
 219#define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 220                                        0x01F00000) /* 31MB */
 221
 222#define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
 223                                                        /* load address */
 224
 225#define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 226
 227/*
 228 * OMAP3 has 12 GP timers, they can be driven by the system clock
 229 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 230 * This rate is divided by a local divisor.
 231 */
 232#define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 233#define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 234#define CONFIG_SYS_HZ                   1000
 235
 236/*
 237 * Physical Memory Map
 238 *
 239 */
 240#define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 241#define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 242#define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 243
 244/*
 245 * FLASH and environment organization
 246 */
 247
 248#ifdef CONFIG_BOOT_ONENAND
 249#define PISMO1_ONEN_SIZE                GPMC_SIZE_128M /* Configure the PISMO */
 250
 251#define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 252
 253#define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
 254
 255#define CONFIG_ENV_IS_IN_ONENAND        1
 256#define CONFIG_ENV_SIZE                 (512 << 10) /* Total Size Environment */
 257#define CONFIG_ENV_ADDR                 ONENAND_ENV_OFFSET
 258#endif
 259
 260#ifdef CONFIG_BOOT_NAND
 261#define PISMO1_NAND_SIZE                GPMC_SIZE_128M /* Configure the PISMO */
 262#define CONFIG_NAND_OMAP_GPMC
 263#define CONFIG_SYS_NAND_BASE            NAND_BASE
 264#define GPMC_NAND_ECC_LP_x16_LAYOUT     1
 265#define CONFIG_ENV_OFFSET               0x260000 /* environment starts here */
 266#define CONFIG_ENV_IS_IN_NAND           1
 267#define CONFIG_ENV_SIZE                 (512 << 10) /* Total Size Environment */
 268#define CONFIG_ENV_ADDR                 NAND_ENV_OFFSET
 269#define CONFIG_SYS_MAX_NAND_DEVICE      1
 270#endif
 271
 272/*
 273 * Size of malloc() pool
 274 */
 275#define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
 276
 277/*
 278 * SMSC911x Ethernet
 279 */
 280#if defined(CONFIG_CMD_NET)
 281#define CONFIG_SMC911X
 282#define CONFIG_SMC911X_32_BIT
 283#define CONFIG_SMC911X_BASE     0x2C000000
 284#endif /* (CONFIG_CMD_NET) */
 285
 286/*
 287 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
 288 * and older u-boot.bin with the new U-Boot SPL.
 289 */
 290#define CONFIG_SYS_TEXT_BASE            0x80008000
 291#define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 292#define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 293#define CONFIG_SYS_INIT_RAM_SIZE        0x800
 294#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 295                                         CONFIG_SYS_INIT_RAM_SIZE - \
 296                                         GENERATED_GBL_DATA_SIZE)
 297
 298/* SPL */
 299#define CONFIG_SPL
 300#define CONFIG_SPL_FRAMEWORK
 301#define CONFIG_SPL_NAND_SIMPLE
 302#define CONFIG_SPL_TEXT_BASE            0x40200800
 303#define CONFIG_SPL_MAX_SIZE             (54 * 1024)
 304#define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
 305
 306/* move malloc and bss high to prevent clashing with the main image */
 307#define CONFIG_SYS_SPL_MALLOC_START     0x87000000
 308#define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 309#define CONFIG_SPL_BSS_START_ADDR       0x87080000      /* end of minimum RAM */
 310#define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 311
 312/* MMC boot config */
 313#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 314#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
 315#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
 316#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
 317
 318#define CONFIG_SPL_BOARD_INIT
 319#define CONFIG_SPL_LIBCOMMON_SUPPORT
 320#define CONFIG_SPL_LIBDISK_SUPPORT
 321#define CONFIG_SPL_I2C_SUPPORT
 322#define CONFIG_SPL_LIBGENERIC_SUPPORT
 323#define CONFIG_SPL_MMC_SUPPORT
 324#define CONFIG_SPL_FAT_SUPPORT
 325#define CONFIG_SPL_SERIAL_SUPPORT
 326
 327#define CONFIG_SPL_POWER_SUPPORT
 328#define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 329
 330#ifdef CONFIG_BOOT_ONENAND
 331#define CONFIG_SPL_ONENAND_SUPPORT
 332
 333/* OneNAND boot config */
 334#define CONFIG_SYS_ONENAND_U_BOOT_OFFS  0x80000
 335#define CONFIG_SYS_ONENAND_PAGE_SIZE    2048
 336#define CONFIG_SPL_ONENAND_LOAD_ADDR    0x80000
 337#define CONFIG_SPL_ONENAND_LOAD_SIZE    \
 338        (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
 339
 340#endif
 341
 342#ifdef CONFIG_BOOT_NAND
 343#define CONFIG_SPL_NAND_SUPPORT
 344#define CONFIG_SPL_NAND_BASE
 345#define CONFIG_SPL_NAND_DRIVERS
 346#define CONFIG_SPL_NAND_ECC
 347
 348/* NAND boot config */
 349#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 350#define CONFIG_SYS_NAND_PAGE_COUNT      64
 351#define CONFIG_SYS_NAND_PAGE_SIZE       2048
 352#define CONFIG_SYS_NAND_OOBSIZE         64
 353#define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 354#define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 355#define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
 356                                                10, 11, 12, 13}
 357#define CONFIG_SYS_NAND_ECCSIZE         512
 358#define CONFIG_SYS_NAND_ECCBYTES        3
 359#define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 360#define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 361#endif
 362
 363#endif /* __IGEP00X0_H */
 364