1/* 2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * (C) Copyright 2009 Freescale Semiconductor, Inc. 5 * 6 * Configuration settings for the MX51EVK Board 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24#ifndef __CONFIG_H 25#define __CONFIG_H 26 27 /* High Level Configuration Options */ 28 29#define CONFIG_MX51 /* in a mx51 */ 30 31#define CONFIG_DISPLAY_CPUINFO 32#define CONFIG_DISPLAY_BOARDINFO 33 34#define CONFIG_SYS_TEXT_BASE 0x97800000 35 36#include <asm/arch/imx-regs.h> 37 38#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 39#define CONFIG_SETUP_MEMORY_TAGS 40#define CONFIG_INITRD_TAG 41#define CONFIG_REVISION_TAG 42 43#define CONFIG_OF_LIBFDT 44 45#define CONFIG_MACH_TYPE MACH_TYPE_MX51_BABBAGE 46/* 47 * Size of malloc() pool 48 */ 49#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 50 51#define CONFIG_BOARD_LATE_INIT 52 53/* 54 * Hardware drivers 55 */ 56#define CONFIG_MXC_UART 57#define CONFIG_MXC_UART_BASE UART1_BASE 58#define CONFIG_MXC_GPIO 59 60/* 61 * SPI Configs 62 * */ 63#define CONFIG_CMD_SPI 64 65#define CONFIG_MXC_SPI 66 67/* PMIC Controller */ 68#define CONFIG_POWER 69#define CONFIG_POWER_SPI 70#define CONFIG_POWER_FSL 71#define CONFIG_FSL_PMIC_BUS 0 72#define CONFIG_FSL_PMIC_CS 0 73#define CONFIG_FSL_PMIC_CLK 2500000 74#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 75#define CONFIG_FSL_PMIC_BITLEN 32 76#define CONFIG_RTC_MC13XXX 77 78/* 79 * MMC Configs 80 * */ 81#define CONFIG_FSL_ESDHC 82#define CONFIG_SYS_FSL_ESDHC_ADDR 0 83#define CONFIG_SYS_FSL_ESDHC_NUM 2 84 85#define CONFIG_MMC 86 87#define CONFIG_CMD_MMC 88#define CONFIG_GENERIC_MMC 89#define CONFIG_CMD_FAT 90#define CONFIG_DOS_PARTITION 91 92/* 93 * Eth Configs 94 */ 95#define CONFIG_MII 96 97#define CONFIG_FEC_MXC 98#define IMX_FEC_BASE FEC_BASE_ADDR 99#define CONFIG_FEC_MXC_PHYADDR 0x1F 100 101#define CONFIG_CMD_PING 102#define CONFIG_CMD_DHCP 103#define CONFIG_CMD_MII 104#define CONFIG_CMD_NET 105 106/* USB Configs */ 107#define CONFIG_CMD_USB 108#define CONFIG_CMD_FAT 109#define CONFIG_USB_EHCI 110#define CONFIG_USB_EHCI_MX5 111#define CONFIG_USB_STORAGE 112#define CONFIG_USB_HOST_ETHER 113#define CONFIG_USB_ETHER_ASIX 114#define CONFIG_USB_ETHER_SMSC95XX 115#define CONFIG_MXC_USB_PORT 1 116#define CONFIG_MXC_USB_PORTSC PORT_PTS_ULPI 117#define CONFIG_MXC_USB_FLAGS MXC_EHCI_POWER_PINS_ENABLED 118 119/* Framebuffer and LCD */ 120#define CONFIG_PREBOOT 121#define CONFIG_VIDEO 122#define CONFIG_VIDEO_IPUV3 123#define CONFIG_CFB_CONSOLE 124#define CONFIG_VGA_AS_SINGLE_DEVICE 125#define CONFIG_SYS_CONSOLE_IS_IN_ENV 126#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 127#define CONFIG_VIDEO_BMP_RLE8 128#define CONFIG_SPLASH_SCREEN 129#define CONFIG_BMP_16BPP 130#define CONFIG_VIDEO_LOGO 131#define CONFIG_IPUV3_CLK 133000000 132 133/* allow to overwrite serial and ethaddr */ 134#define CONFIG_ENV_OVERWRITE 135#define CONFIG_CONS_INDEX 1 136#define CONFIG_BAUDRATE 115200 137 138/*********************************************************** 139 * Command definition 140 ***********************************************************/ 141 142#include <config_cmd_default.h> 143#define CONFIG_CMD_BOOTZ 144#undef CONFIG_CMD_IMLS 145 146#define CONFIG_CMD_DATE 147 148#define CONFIG_BOOTDELAY 1 149 150#define CONFIG_ETHPRIME "FEC0" 151 152#define CONFIG_LOADADDR 0x90800000 /* loadaddr env var */ 153 154#define CONFIG_EXTRA_ENV_SETTINGS \ 155 "script=boot.scr\0" \ 156 "uimage=uImage\0" \ 157 "mmcdev=0\0" \ 158 "mmcpart=2\0" \ 159 "mmcroot=/dev/mmcblk0p3 rw\0" \ 160 "mmcrootfstype=ext3 rootwait\0" \ 161 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 162 "root=${mmcroot} " \ 163 "rootfstype=${mmcrootfstype}\0" \ 164 "loadbootscript=" \ 165 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 166 "bootscript=echo Running bootscript from mmc ...; " \ 167 "source\0" \ 168 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 169 "mmcboot=echo Booting from mmc ...; " \ 170 "run mmcargs; " \ 171 "bootm\0" \ 172 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 173 "root=/dev/nfs " \ 174 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 175 "netboot=echo Booting from net ...; " \ 176 "run netargs; " \ 177 "dhcp ${uimage}; bootm\0" \ 178 179#define CONFIG_BOOTCOMMAND \ 180 "mmc dev ${mmcdev}; if mmc rescan; then " \ 181 "if run loadbootscript; then " \ 182 "run bootscript; " \ 183 "else " \ 184 "if run loaduimage; then " \ 185 "run mmcboot; " \ 186 "else run netboot; " \ 187 "fi; " \ 188 "fi; " \ 189 "else run netboot; fi" 190 191#define CONFIG_ARP_TIMEOUT 200UL 192 193/* 194 * Miscellaneous configurable options 195 */ 196#define CONFIG_SYS_LONGHELP /* undef to save memory */ 197#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 198#define CONFIG_SYS_PROMPT "MX51EVK U-Boot > " 199#define CONFIG_AUTO_COMPLETE 200#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 201/* Print Buffer Size */ 202#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 203#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 204#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 205 206#define CONFIG_SYS_MEMTEST_START 0x90000000 207#define CONFIG_SYS_MEMTEST_END 0x90010000 208 209#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 210 211#define CONFIG_SYS_HZ 1000 212#define CONFIG_CMDLINE_EDITING 213 214/*----------------------------------------------------------------------- 215 * Physical Memory Map 216 */ 217#define CONFIG_NR_DRAM_BANKS 1 218#define PHYS_SDRAM_1 CSD0_BASE_ADDR 219#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 220 221#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 222#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 223#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 224 225#define CONFIG_BOARD_EARLY_INIT_F 226 227#define CONFIG_SYS_INIT_SP_OFFSET \ 228 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 229#define CONFIG_SYS_INIT_SP_ADDR \ 230 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 231 232#define CONFIG_SYS_DDR_CLKSEL 0 233#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 234#define CONFIG_SYS_MAIN_PWR_ON 235 236/*----------------------------------------------------------------------- 237 * FLASH and environment organization 238 */ 239#define CONFIG_SYS_NO_FLASH 240 241#define CONFIG_ENV_OFFSET (6 * 64 * 1024) 242#define CONFIG_ENV_SIZE (8 * 1024) 243#define CONFIG_ENV_IS_IN_MMC 244#define CONFIG_SYS_MMC_ENV_DEV 0 245 246#endif 247