LXR uboot/include/configs/qong.h

   1/*
   2 * Copyright (C) 2009, Ilya Yanok, Emcraft Systems, <yanok@emcraft.com>
   3 *
   4 * Configuration settings for the Dave/DENX QongEVB-LITE board.
   5 *
   6 * This program is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU General Public License as
   8 * published by the Free Software Foundation; either version 2 of
   9 * the License, or (at your option) any later version.
  10 *
  11 * This program is distributed in the hope that it will be useful,
  12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 * GNU General Public License for more details.
  15 *
  16 * You should have received a copy of the GNU General Public License
  17 * along with this program; if not, write to the Free Software
  18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19 * MA 02111-1307 USA
  20 */
  21
  22#ifndef __CONFIG_H
  23#define __CONFIG_H
  24
  25#include <asm/arch/imx-regs.h>
  26
  27/* High Level Configuration Options */
  28#define CONFIG_ARM1136                  /* This is an arm1136 CPU core */
  29#define CONFIG_MX31                     /* in a mx31 */
  30#define CONFIG_QONG
  31
  32#define CONFIG_DISPLAY_CPUINFO
  33#define CONFIG_DISPLAY_BOARDINFO
  34
  35#define CONFIG_SYS_TEXT_BASE 0xa0000000
  36
  37#define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  38#define CONFIG_SETUP_MEMORY_TAGS
  39#define CONFIG_INITRD_TAG
  40
  41/*
  42 * Size of malloc() pool
  43 */
  44#define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + 1536 * 1024)
  45
  46/*
  47 * Hardware drivers
  48 */
  49
  50#define CONFIG_MXC_UART
  51#define CONFIG_MXC_UART_BASE    UART1_BASE
  52
  53#define CONFIG_MXC_GPIO
  54#define CONFIG_HW_WATCHDOG
  55#define CONFIG_IMX_WATCHDOG
  56
  57#define CONFIG_MXC_SPI
  58#define CONFIG_DEFAULT_SPI_BUS  1
  59#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
  60#define CONFIG_RTC_MC13XXX
  61
  62#define CONFIG_POWER
  63#define CONFIG_POWER_SPI
  64#define CONFIG_POWER_FSL
  65#define CONFIG_FSL_PMIC_BUS     1
  66#define CONFIG_FSL_PMIC_CS      0
  67#define CONFIG_FSL_PMIC_CLK     100000
  68#define CONFIG_FSL_PMIC_MODE    (SPI_MODE_0 | SPI_CS_HIGH)
  69#define CONFIG_FSL_PMIC_BITLEN  32
  70
  71/* FPGA */
  72#define CONFIG_FPGA
  73#define CONFIG_QONG_FPGA
  74#define CONFIG_FPGA_BASE        (CS1_BASE)
  75#define CONFIG_FPGA_LATTICE
  76#define CONFIG_FPGA_COUNT       1
  77
  78#ifdef CONFIG_QONG_FPGA
  79/* Ethernet */
  80#define CONFIG_DNET
  81#define CONFIG_DNET_BASE        (CS1_BASE + QONG_FPGA_PERIPH_SIZE)
  82
  83/* Framebuffer and LCD */
  84#define CONFIG_VIDEO
  85#define CONFIG_CFB_CONSOLE
  86#define CONFIG_VIDEO_MX3
  87#define CONFIG_VIDEO_LOGO
  88#define CONFIG_VIDEO_SW_CURSOR
  89#define CONFIG_VGA_AS_SINGLE_DEVICE
  90#define CONFIG_SYS_CONSOLE_IS_IN_ENV
  91#define CONFIG_SPLASH_SCREEN
  92#define CONFIG_CMD_BMP
  93#define CONFIG_BMP_16BPP
  94#define CONFIG_VIDEO_BMP_GZIP
  95#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  (512 << 10)
  96
  97/* USB */
  98#define CONFIG_CMD_USB
  99#ifdef CONFIG_CMD_USB
 100#define CONFIG_USB_EHCI                 /* Enable EHCI USB support */
 101#define CONFIG_USB_EHCI_MXC
 102#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 103#define CONFIG_MXC_USB_PORT     2
 104#define CONFIG_MXC_USB_PORTSC   (MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT)
 105#define CONFIG_MXC_USB_FLAGS    MXC_EHCI_POWER_PINS_ENABLED
 106#define CONFIG_EHCI_IS_TDI
 107#define CONFIG_USB_STORAGE
 108#define CONFIG_DOS_PARTITION
 109#define CONFIG_SUPPORT_VFAT
 110#define CONFIG_CMD_EXT2
 111#define CONFIG_CMD_FAT
 112#endif /* CONFIG_CMD_USB */
 113
 114/*
 115 * Reducing the ARP timeout from default 5 seconds to 200ms we speed up the
 116 * initial TFTP transfer, should the user wish one, significantly.
 117 */
 118#define CONFIG_ARP_TIMEOUT      200UL
 119
 120#endif /* CONFIG_QONG_FPGA */
 121
 122#define CONFIG_CONS_INDEX       1
 123#define CONFIG_BAUDRATE         115200
 124
 125/***********************************************************
 126 * Command definition
 127 ***********************************************************/
 128
 129#include <config_cmd_default.h>
 130
 131#define CONFIG_CMD_CACHE
 132#define CONFIG_CMD_DATE
 133#define CONFIG_CMD_DHCP
 134#define CONFIG_CMD_MII
 135#define CONFIG_CMD_NAND
 136#define CONFIG_CMD_NET
 137#define CONFIG_CMD_PING
 138#define CONFIG_CMD_SETEXPR
 139#define CONFIG_CMD_SPI
 140#define CONFIG_CMD_UNZIP
 141
 142#define CONFIG_BOARD_LATE_INIT
 143
 144#define CONFIG_BOOTDELAY        5
 145
 146#define CONFIG_LOADADDR         0x80800000      /* loadaddr env var */
 147
 148#define CONFIG_EXTRA_ENV_SETTINGS                                       \
 149        "netdev=eth0\0"                                                 \
 150        "nfsargs=setenv bootargs root=/dev/nfs rw "                     \
 151                "nfsroot=${serverip}:${rootpath}\0"                     \
 152        "ramargs=setenv bootargs root=/dev/ram rw\0"                    \
 153        "addip=setenv bootargs ${bootargs} "                            \
 154                "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"      \
 155                ":${hostname}:${netdev}:off panic=1\0"                  \
 156        "addtty=setenv bootargs ${bootargs}"                            \
 157                " console=ttymxc0,${baudrate}\0"                        \
 158        "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"              \
 159        "addmisc=setenv bootargs ${bootargs}\0"                         \
 160        "uboot_addr=A0000000\0"                                         \
 161        "kernel_addr=A00C0000\0"                                        \
 162        "ramdisk_addr=A0300000\0"                                       \
 163        "u-boot=qong/u-boot.bin\0"                                      \
 164        "kernel_addr_r=80800000\0"                                      \
 165        "hostname=qong\0"                                               \
 166        "bootfile=qong/uImage\0"                                        \
 167        "rootpath=/opt/eldk-4.2-arm/armVFP\0"                           \
 168        "flash_self=run ramargs addip addtty addmtd addmisc;"           \
 169                "bootm ${kernel_addr} ${ramdisk_addr}\0"                \
 170        "flash_nfs=run nfsargs addip addtty addmtd addmisc;"            \
 171                "bootm ${kernel_addr}\0"                                \
 172        "net_nfs=tftp ${kernel_addr_r} ${bootfile};"                    \
 173                "run nfsargs addip addtty addmtd addmisc;"              \
 174                "bootm\0"                                               \
 175        "bootcmd=run flash_self\0"                                      \
 176        "load=tftp ${loadaddr} ${u-boot}\0"                             \
 177        "update=protect off " __stringify(CONFIG_SYS_MONITOR_BASE)      \
 178                " +${filesize};era " __stringify(CONFIG_SYS_MONITOR_BASE)\
 179                " +${filesize};cp.b ${fileaddr} "                       \
 180                __stringify(CONFIG_SYS_MONITOR_BASE) " ${filesize}\0"   \
 181        "upd=run load update\0"                                         \
 182        "videomode=video=ctfb:x:640,y:480,depth:16,mode:0,pclk:40000,"  \
 183                "le:120,ri:40,up:35,lo:10,hs:30,vs:3,sync:100663296,"   \
 184                "vmode:0\0"                                             \
 185
 186/*
 187 * Miscellaneous configurable options
 188 */
 189#define CONFIG_SYS_LONGHELP             /* undef to save memory */
 190#define CONFIG_SYS_PROMPT               "=> "
 191#define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 192/* Print Buffer Size */
 193#define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 194                sizeof(CONFIG_SYS_PROMPT) + 16)
 195#define CONFIG_SYS_MAXARGS              32      /* max number of command args */
 196/* Boot Argument Buffer Size */
 197#define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 198
 199/* memtest works on first 255MB of RAM */
 200#define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM_1
 201#define CONFIG_SYS_MEMTEST_END          (PHYS_SDRAM_1 + 0xff000000)
 202
 203#define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 204
 205#define CONFIG_SYS_HZ                   1000
 206
 207#define CONFIG_CMDLINE_EDITING
 208#define CONFIG_SYS_HUSH_PARSER                  /* Use the HUSH parser */
 209
 210#define CONFIG_MISC_INIT_R
 211
 212/*-----------------------------------------------------------------------
 213 * Physical Memory Map
 214 */
 215#define CONFIG_NR_DRAM_BANKS    1
 216#define PHYS_SDRAM_1            CSD0_BASE
 217#define PHYS_SDRAM_1_SIZE       0x10000000      /* 256 MB */
 218
 219/*
 220 * NAND driver
 221 */
 222
 223#ifndef __ASSEMBLY__
 224extern void qong_nand_plat_init(void *chip);
 225extern int qong_nand_rdy(void *chip);
 226#endif
 227#define CONFIG_NAND_PLAT
 228#define CONFIG_SYS_MAX_NAND_DEVICE     1
 229#define CONFIG_SYS_NAND_BASE    CS3_BASE
 230#define NAND_PLAT_INIT() qong_nand_plat_init(nand)
 231
 232#define QONG_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 24))
 233#define QONG_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 23))
 234#define QONG_NAND_WRITE(addr, cmd) \
 235        do { \
 236                __REG8(addr) = cmd; \
 237        } while (0)
 238
 239#define NAND_PLAT_WRITE_CMD(chip, cmd) QONG_NAND_WRITE(QONG_NAND_CLE(chip), cmd)
 240#define NAND_PLAT_WRITE_ADR(chip, cmd) QONG_NAND_WRITE(QONG_NAND_ALE(chip), cmd)
 241#define NAND_PLAT_DEV_READY(chip)      (qong_nand_rdy(chip))
 242
 243/*-----------------------------------------------------------------------
 244 * FLASH and environment organization
 245 */
 246#define CONFIG_SYS_FLASH_BASE           CS0_BASE
 247#define CONFIG_SYS_MAX_FLASH_BANKS      1       /* max number of memory banks */
 248/* max number of sectors on one chip */
 249#define CONFIG_SYS_MAX_FLASH_SECT       1024
 250/* Monitor at beginning of flash */
 251#define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 252#define CONFIG_SYS_MONITOR_LEN          0x40000         /* Reserve 256KiB */
 253
 254#define CONFIG_ENV_IS_IN_FLASH
 255#define CONFIG_ENV_SECT_SIZE    0x20000
 256#define CONFIG_ENV_SIZE         CONFIG_ENV_SECT_SIZE
 257#define CONFIG_ENV_ADDR         (CONFIG_SYS_FLASH_BASE + 0x80000)
 258
 259/* Address and size of Redundant Environment Sector     */
 260#define CONFIG_ENV_OFFSET_REDUND        (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
 261#define CONFIG_ENV_SIZE_REDUND  CONFIG_ENV_SIZE
 262
 263/*-----------------------------------------------------------------------
 264 * CFI FLASH driver setup
 265 */
 266/* Flash memory is CFI compliant */
 267#define CONFIG_SYS_FLASH_CFI
 268/* Use drivers/cfi_flash.c */
 269#define CONFIG_FLASH_CFI_DRIVER
 270/* Use buffered writes (~10x faster) */
 271#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 272/* Use hardware sector protection */
 273#define CONFIG_SYS_FLASH_PROTECTION
 274
 275/*
 276 * Filesystem
 277 */
 278#define CONFIG_CMD_JFFS2
 279#define CONFIG_CMD_UBI
 280#define CONFIG_CMD_UBIFS
 281#define CONFIG_RBTREE
 282#define CONFIG_MTD_PARTITIONS
 283#define CONFIG_CMD_MTDPARTS
 284#define CONFIG_LZO
 285#define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
 286#define CONFIG_FLASH_CFI_MTD
 287#define MTDIDS_DEFAULT          "nor0=physmap-flash.0,"         \
 288                                "nand0=gen_nand"
 289#define MTDPARTS_DEFAULT        \
 290        "mtdparts=physmap-flash.0:"                             \
 291                        "512k(U-Boot),128k(env1),128k(env2),"   \
 292                        "2304k(kernel),13m(ramdisk),-(user);"   \
 293                "gen_nand:"                                     \
 294                        "128m(nand)"
 295
 296/* additions for new relocation code, must be added to all boards */
 297#define CONFIG_SYS_SDRAM_BASE           0x80000000
 298#define CONFIG_SYS_INIT_RAM_ADDR        IRAM_BASE_ADDR
 299#define CONFIG_SYS_INIT_RAM_SIZE                IRAM_SIZE
 300#define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
 301#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET)
 302
 303#define CONFIG_BOARD_EARLY_INIT_F
 304
 305#endif /* __CONFIG_H */
 306