LXR uboot/arch/arm/cpu/arm1136/omap24xx/timer.c

   1/*
   2 * (C) Copyright 2004
   3 * Texas Instruments
   4 * Richard Woodruff <r-woodruff2@ti.com>
   5 *
   6 * (C) Copyright 2002
   7 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
   8 * Marius Groeger <mgroeger@sysgo.de>
   9 * Alex Zuepke <azu@sysgo.de>
  10 *
  11 * (C) Copyright 2002
  12 * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
  13 *
  14 * See file CREDITS for list of people who contributed to this
  15 * project.
  16 *
  17 * This program is free software; you can redistribute it and/or
  18 * modify it under the terms of the GNU General Public License as
  19 * published by the Free Software Foundation; either version 2 of
  20 * the License, or (at your option) any later version.
  21 *
  22 * This program is distributed in the hope that it will be useful,
  23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25 * GNU General Public License for more details.
  26 *
  27 * You should have received a copy of the GNU General Public License
  28 * along with this program; if not, write to the Free Software
  29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30 * MA 02111-1307 USA
  31 */
  32
  33#include <common.h>
  34#include <asm/io.h>
  35#include <asm/arch/bits.h>
  36#include <asm/arch/omap2420.h>
  37
  38#define TIMER_CLOCK     (CONFIG_SYS_CLK_FREQ / (2 << CONFIG_SYS_PTV))
  39#define TIMER_LOAD_VAL 0
  40
  41/* macro to read the 32 bit timer */
  42#define READ_TIMER      readl(CONFIG_SYS_TIMERBASE+TCRR) \
  43                        / (TIMER_CLOCK / CONFIG_SYS_HZ)
  44
  45DECLARE_GLOBAL_DATA_PTR;
  46
  47int timer_init (void)
  48{
  49        int32_t val;
  50
  51        /* Start the counter ticking up */
  52        *((int32_t *) (CONFIG_SYS_TIMERBASE + TLDR)) = TIMER_LOAD_VAL;  /* reload value on overflow*/
  53        val = (CONFIG_SYS_PTV << 2) | BIT5 | BIT1 | BIT0;               /* mask to enable timer*/
  54        *((int32_t *) (CONFIG_SYS_TIMERBASE + TCLR)) = val;     /* start timer */
  55
  56        /* reset time */
  57        gd->arch.lastinc = READ_TIMER;  /* capture current incrementer value */
  58        gd->arch.tbl = 0;               /* start "advancing" time stamp */
  59
  60        return(0);
  61}
  62/*
  63 * timer without interrupts
  64 */
  65ulong get_timer (ulong base)
  66{
  67        return get_timer_masked () - base;
  68}
  69
  70/* delay x useconds AND preserve advance timestamp value */
  71void __udelay (unsigned long usec)
  72{
  73        ulong tmo, tmp;
  74
  75        if (usec >= 1000) {             /* if "big" number, spread normalization to seconds */
  76                tmo = usec / 1000;      /* start to normalize for usec to ticks per sec */
  77                tmo *= CONFIG_SYS_HZ;   /* find number of "ticks" to wait to achieve target */
  78                tmo /= 1000;            /* finish normalize. */
  79        } else {                        /* else small number, don't kill it prior to HZ multiply */
  80                tmo = usec * CONFIG_SYS_HZ;
  81                tmo /= (1000*1000);
  82        }
  83
  84        tmp = get_timer (0);            /* get current timestamp */
  85        if ((tmo + tmp + 1) < tmp) {    /* if setting this forward will roll */
  86                                        /* time stamp, then reset time */
  87                gd->arch.lastinc = READ_TIMER;  /* capture incrementer value */
  88                gd->arch.tbl = 0;                       /* start time stamp */
  89        } else {
  90                tmo     += tmp;         /* else, set advancing stamp wake up time */
  91        }
  92        while (get_timer_masked () < tmo)/* loop till event */
  93                /*NOP*/;
  94}
  95
  96ulong get_timer_masked (void)
  97{
  98        ulong now = READ_TIMER;         /* current tick value */
  99
 100        if (now >= gd->arch.lastinc) {          /* normal mode (non roll) */
 101                /* move stamp fordward with absoulte diff ticks */
 102                gd->arch.tbl += (now - gd->arch.lastinc);
 103        } else {
 104                /* we have rollover of incrementer */
 105                gd->arch.tbl += ((0xFFFFFFFF / (TIMER_CLOCK / CONFIG_SYS_HZ))
 106                                 - gd->arch.lastinc) + now;
 107        }
 108        gd->arch.lastinc = now;
 109        return gd->arch.tbl;
 110}
 111
 112/* waits specified delay value and resets timestamp */
 113void udelay_masked (unsigned long usec)
 114{
 115        ulong tmo;
 116        ulong endtime;
 117        signed long diff;
 118
 119        if (usec >= 1000) {                     /* if "big" number, spread normalization to seconds */
 120                tmo = usec / 1000;              /* start to normalize for usec to ticks per sec */
 121                tmo *= CONFIG_SYS_HZ;                   /* find number of "ticks" to wait to achieve target */
 122                tmo /= 1000;                    /* finish normalize. */
 123        } else {                                        /* else small number, don't kill it prior to HZ multiply */
 124                tmo = usec * CONFIG_SYS_HZ;
 125                tmo /= (1000*1000);
 126        }
 127        endtime = get_timer_masked () + tmo;
 128
 129        do {
 130                ulong now = get_timer_masked ();
 131                diff = endtime - now;
 132        } while (diff >= 0);
 133}
 134
 135/*
 136 * This function is derived from PowerPC code (read timebase as long long).
 137 * On ARM it just returns the timer value.
 138 */
 139unsigned long long get_ticks(void)
 140{
 141        return get_timer(0);
 142}
 143/*
 144 * This function is derived from PowerPC code (timebase clock frequency).
 145 * On ARM it returns the number of timer ticks per second.
 146 */
 147ulong get_tbclk (void)
 148{
 149        ulong tbclk;
 150        tbclk = CONFIG_SYS_HZ;
 151        return tbclk;
 152}
 153