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24#include <common.h>
25
26#if (CONFIG_DDR_PLL2 || CONFIG_DDR_2HCLK)
27
28const u32 mpmc_conf_vals[CONFIG_SPEAR_MPMCREGS] = {
29#if (CONFIG_DDR_PLL2)
30 0x00000001,
31 0x00000000,
32#elif (CONFIG_DDR_2HCLK)
33 0x02020201,
34 0x02020202,
35#endif
36 0x01000000,
37 0x00000101,
38 0x00000101,
39 0x01000000,
40 0x00010001,
41 0x00000100,
42 0x01010001,
43 0x00000201,
44 0x01000101,
45 0x06000002,
46 0x06060106,
47 0x03050502,
48 0x03040404,
49 0x02020503,
50 0x02010106,
51 0x03000405,
52 0x03040202,
53 0x04000305,
54 0x0707073f,
55 0x07070707,
56 0x06060607,
57 0x06060606,
58 0x05050506,
59 0x05050505,
60 0x04040405,
61 0x04040404,
62 0x03030304,
63 0x03030303,
64 0x02020203,
65 0x02020202,
66 0x01010102,
67 0x01010101,
68 0x0a0a0a01,
69 0x0000023f,
70 0x00050a00,
71 0x11000000,
72 0x00001302,
73 0x00000A0A,
74 0x72000000,
75 0x00550000,
76 0x2b050e86,
77 0x00640064,
78 0x00640064,
79 0x00640064,
80 0x00000064,
81 0x00200020,
82 0x00200020,
83 0x00200020,
84 0x00200020,
85 0x00200020,
86 0x00200020,
87 0x00200020,
88 0x00000a24,
89 0x43C20000,
90 0x5b1c00c8,
91 0x00c8002e,
92 0x00000000,
93 0x0001046b,
94 0x00000000,
95 0x03030100,
96 0x03030303,
97 0x03030303,
98 0x03030303,
99 0x00210000,
100 0x00010021,
101 0x00200000,
102 0x006c0090,
103 0x003fffff,
104 0x003fffff,
105 0x00000000,
106 0x00000000,
107 0x003fffff,
108 0x003fffff,
109 0x00000000,
110 0x00000000,
111 0x003fffff,
112 0x003fffff,
113 0x00000000,
114 0x00000000,
115 0x003fffff,
116 0x003fffff,
117 0x00000000,
118 0x00000000,
119 0x003fffff,
120 0x003fffff,
121 0x00000000,
122 0x00000000,
123 0x003fffff,
124 0x003fffff,
125 0x00000000,
126 0x00000000,
127 0x003fffff,
128 0x003fffff,
129 0x00000000,
130 0x00000000,
131 0x00000000,
132 0x00000000,
133 0x00000000
134};
135#endif
136