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22#ifndef __ASM_ARM_ARCH_SYSTEM_H_
23#define __ASM_ARM_ARCH_SYSTEM_H_
24
25#ifndef __ASSEMBLY__
26struct exynos4_sysreg {
27 unsigned char res1[0x210];
28 unsigned int display_ctrl;
29 unsigned int display_ctrl2;
30 unsigned int camera_control;
31 unsigned int audio_endian;
32 unsigned int jtag_con;
33};
34
35struct exynos5_sysreg {
36 unsigned char res1[0x214];
37 unsigned int disp1blk_cfg;
38 unsigned int disp2blk_cfg;
39 unsigned int hdcp_e_fuse;
40 unsigned int gsclblk_cfg0;
41 unsigned int gsclblk_cfg1;
42 unsigned int reserved;
43 unsigned int ispblk_cfg;
44 unsigned int usb20phy_cfg;
45 unsigned char res2[0x29c];
46 unsigned int mipi_dphy;
47 unsigned int dptx_dphy;
48 unsigned int phyclk_sel;
49};
50#endif
51
52#define USB20_PHY_CFG_HOST_LINK_EN (1 << 0)
53
54void set_usbhost_mode(unsigned int mode);
55void set_system_display_ctrl(void);
56
57#endif
58