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9#include <config.h>
10#include <common.h>
11#include <command.h>
12
13#include <asm/blackfin.h>
14#include <asm/mach-common/bits/mpu.h>
15
16static int check_limit(const char *type, size_t start_limit, size_t end_limit, size_t start, size_t end)
17{
18 if (start >= start_limit && start <= end_limit && \
19 end <= end_limit && end >= start_limit && \
20 start <= end)
21 return 0;
22
23 printf("%s limit violation: %zu <= (user:%zu) <= (user:%zu) <= %zu\n",
24 type, start_limit, start, end, end_limit);
25 return 1;
26}
27
28int do_icache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
29{
30 int cache_status = icache_status();
31
32 if (cache_status)
33 icache_disable();
34
35 uint32_t cmd_base, tag, cache_upper, cache_lower;
36
37 size_t way, way_start = 0, way_end = 3;
38 size_t sbnk, sbnk_start = 0, sbnk_end = 3;
39 size_t set, set_start = 0, set_end = 31;
40 size_t dw;
41
42 if (argc > 1) {
43 way_start = way_end = simple_strtoul(argv[1], NULL, 10);
44 if (argc > 2) {
45 sbnk_start = sbnk_end = simple_strtoul(argv[2], NULL, 10);
46 if (argc > 3)
47 set_start = set_end = simple_strtoul(argv[3], NULL, 10);
48 }
49 }
50
51 if (check_limit("way", 0, 3, way_start, way_end) || \
52 check_limit("subbank", 0, 3, sbnk_start, sbnk_end) || \
53 check_limit("set", 0, 31, set_start, set_end))
54 return 1;
55
56 puts("Way:Subbank:Set: [valid-tag lower upper] {invalid-tag lower upper}...\n");
57
58 for (way = way_start; way <= way_end; ++way) {
59 for (sbnk = sbnk_start; sbnk <= sbnk_end; ++sbnk) {
60 for (set = set_start; set <= set_end; ++set) {
61 printf("%zu:%zu:%2zu: ", way, sbnk, set);
62 for (dw = 0; dw < 4; ++dw) {
63 if (ctrlc())
64 return 1;
65
66 cmd_base = \
67 (way << 26) | \
68 (sbnk << 16) | \
69 (set << 5) | \
70 (dw << 3);
71
72
73 bfin_write_ITEST_COMMAND(cmd_base | 0x0);
74 SSYNC();
75 tag = bfin_read_ITEST_DATA0();
76 printf("%c%08x ", (tag & 0x1 ? ' ' : '{'), tag);
77
78
79 bfin_write_ITEST_COMMAND(cmd_base | 0x4);
80 SSYNC();
81 cache_lower = bfin_read_ITEST_DATA0();
82 cache_upper = bfin_read_ITEST_DATA1();
83 printf("%08x %08x%c ", cache_lower, cache_upper, (tag & 0x1 ? ' ' : '}'));
84 }
85 puts("\n");
86 }
87 }
88 }
89
90 if (cache_status)
91 icache_enable();
92
93 return 0;
94}
95
96U_BOOT_CMD(icache_dump, 4, 0, do_icache_dump,
97 "icache_dump - dump current instruction cache\n",
98 "[way] [subbank] [set]");
99
100int do_dcache_dump(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
101{
102 u32 way, bank, subbank, set;
103 u32 status, addr;
104 u32 dmem_ctl = bfin_read_DMEM_CONTROL();
105
106 for (bank = 0; bank < 2; ++bank) {
107 if (!(dmem_ctl & (1 << (DMC1_P - bank))))
108 continue;
109
110 for (way = 0; way < 2; ++way)
111 for (subbank = 0; subbank < 4; ++subbank) {
112 printf("%i:%i:%i:\t", bank, way, subbank);
113 for (set = 0; set < 64; ++set) {
114
115 if (ctrlc())
116 return 1;
117
118
119 bfin_write_DTEST_COMMAND(
120 way << 26 |
121 bank << 23 |
122 subbank << 16 |
123 set << 5
124 );
125 CSYNC();
126 status = bfin_read_DTEST_DATA0();
127
128
129 addr = (status & 0xFFFFC800) | (subbank << 12) | (set << 5);
130
131
132 if (set && !(set % 4))
133 puts("\n\t");
134 printf("%c%08x%c%08x%c ", (status & 0x1 ? '[' : '{'), status, (status & 0x2 ? 'd' : ' '), addr, (status & 0x1 ? ']' : '}'));
135 }
136 puts("\n");
137 }
138 }
139
140 return 0;
141}
142
143U_BOOT_CMD(dcache_dump, 4, 0, do_dcache_dump,
144 "dcache_dump - dump current data cache\n",
145 "[bank] [way] [subbank] [set]");
146
