uboot/board/davedenx/aria/aria.c
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   1/*
   2 * (C) Copyright 2009 Wolfgang Denk <wd@denx.de>
   3 * (C) Copyright 2009 Dave Srl www.dave.eu
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 *
  23 */
  24
  25#include <common.h>
  26#include <asm/bitops.h>
  27#include <command.h>
  28#include <asm/io.h>
  29#include <asm/processor.h>
  30#include <asm/mpc512x.h>
  31#include <fdt_support.h>
  32#ifdef CONFIG_MISC_INIT_R
  33#include <i2c.h>
  34#endif
  35
  36DECLARE_GLOBAL_DATA_PTR;
  37
  38phys_size_t initdram (int board_type)
  39{
  40        return fixed_sdram(NULL, NULL, 0);
  41}
  42
  43int misc_init_r(void)
  44{
  45        u32 tmp;
  46
  47        /* we use I2C-2 for on-board eeprom */
  48        i2c_set_bus_num(2);
  49
  50        tmp = in_be32((u32*)CONFIG_SYS_ARIA_FPGA_BASE);
  51        printf("FPGA:  %u-%u.%u.%u\n",
  52                (tmp & 0xFF000000) >> 24,
  53                (tmp & 0x00FF0000) >> 16,
  54                (tmp & 0x0000FF00) >>  8,
  55                 tmp & 0x000000FF
  56        );
  57
  58        return 0;
  59}
  60
  61static  iopin_t ioregs_init[] = {
  62        /*
  63         * FEC
  64         */
  65
  66        /* FEC on PSCx_x*/
  67        {
  68                offsetof(struct ioctrl512x, io_control_psc0_0), 5, 0,
  69                IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  70                IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  71        },
  72        {
  73                offsetof(struct ioctrl512x, io_control_psc1_0), 10, 0,
  74                IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  75                IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  76        },
  77        {
  78                offsetof(struct ioctrl512x, io_control_spdif_txclk), 3, 0,
  79                IO_PIN_FMUX(1) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  80                IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  81        },
  82
  83        /*
  84         * DIU
  85         */
  86        /* FUNC2=DIU CLK */
  87        {
  88                offsetof(struct ioctrl512x, io_control_psc6_0), 1, 0,
  89                IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  90                IO_PIN_PUE(0) | IO_PIN_ST(1) | IO_PIN_DS(3)
  91        },
  92        /* FUNC2=DIU_HSYNC */
  93        {
  94                offsetof(struct ioctrl512x, io_control_psc6_1), 1, 0,
  95                IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
  96                IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
  97        },
  98        /* FUNC2=DIUVSYNC Sets Next 26 to DIU Pads */
  99        {
 100                offsetof(struct ioctrl512x, io_control_psc6_4), 26, 0,
 101                IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
 102                IO_PIN_PUE(0) | IO_PIN_ST(0) | IO_PIN_DS(3)
 103        },
 104        /*
 105         * On board SRAM
 106         */
 107        /* FUNC2=/LPC CS6 */
 108        {
 109                offsetof(struct ioctrl512x, io_control_j1850_rx), 1, 0,
 110                IO_PIN_FMUX(2) | IO_PIN_HOLD(0) | IO_PIN_PUD(0) |
 111                IO_PIN_PUE(1) | IO_PIN_ST(1) | IO_PIN_DS(3)
 112        },
 113};
 114
 115int checkboard (void)
 116{
 117        puts("Board: ARIA\n");
 118
 119        /* initialize function mux & slew rate IO inter alia on IO Pins  */
 120
 121        iopin_initialize(ioregs_init, ARRAY_SIZE(ioregs_init));
 122
 123        return 0;
 124}
 125
 126#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
 127void ft_board_setup(void *blob, bd_t *bd)
 128{
 129        ft_cpu_setup(blob, bd);
 130}
 131#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
 132