1/* 2 * (c) 2009 Magnus Lilja <lilja.magnus@gmail.com> 3 * 4 * See file CREDITS for list of people who contributed to this 5 * project. 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 23#ifndef __MXC_NAND_H 24#define __MXC_NAND_H 25 26/* 27 * Register map and bit definitions for the Freescale NAND Flash Controller 28 * present in various i.MX devices. 29 * 30 * MX31 and MX27 have version 1, which has: 31 * 4 512-byte main buffers and 32 * 4 16-byte spare buffers 33 * to support up to 2K byte pagesize nand. 34 * Reading or writing a 2K page requires 4 FDI/FDO cycles. 35 * 36 * MX25 and MX35 have version 2.1, and MX51 and MX53 have version 3.2, which 37 * have: 38 * 8 512-byte main buffers and 39 * 8 64-byte spare buffers 40 * to support up to 4K byte pagesize nand. 41 * Reading or writing a 2K or 4K page requires only 1 FDI/FDO cycle. 42 * Also some of registers are moved and/or changed meaning as seen below. 43 */ 44#if defined(CONFIG_MX27) || defined(CONFIG_MX31) 45#define MXC_NFC_V1 46#define is_mxc_nfc_1() 1 47#define is_mxc_nfc_21() 0 48#define is_mxc_nfc_32() 0 49#elif defined(CONFIG_MX25) || defined(CONFIG_MX35) 50#define MXC_NFC_V2_1 51#define is_mxc_nfc_1() 0 52#define is_mxc_nfc_21() 1 53#define is_mxc_nfc_32() 0 54#elif defined(CONFIG_MX51) || defined(CONFIG_MX53) 55#define MXC_NFC_V3 56#define MXC_NFC_V3_2 57#define is_mxc_nfc_1() 0 58#define is_mxc_nfc_21() 0 59#define is_mxc_nfc_32() 1 60#else 61#error "MXC NFC implementation not supported" 62#endif 63#define is_mxc_nfc_3() is_mxc_nfc_32() 64 65#if defined(MXC_NFC_V1) 66#define NAND_MXC_NR_BUFS 4 67#define NAND_MXC_SPARE_BUF_SIZE 16 68#define NAND_MXC_REG_OFFSET 0xe00 69#define NAND_MXC_2K_MULTI_CYCLE 70#elif defined(MXC_NFC_V2_1) || defined(MXC_NFC_V3_2) 71#define NAND_MXC_NR_BUFS 8 72#define NAND_MXC_SPARE_BUF_SIZE 64 73#define NAND_MXC_REG_OFFSET 0x1e00 74#endif 75 76struct mxc_nand_regs { 77 u8 main_area[NAND_MXC_NR_BUFS][0x200]; 78 u8 spare_area[NAND_MXC_NR_BUFS][NAND_MXC_SPARE_BUF_SIZE]; 79 /* 80 * reserved size is offset of nfc registers 81 * minus total main and spare sizes 82 */ 83 u8 reserved1[NAND_MXC_REG_OFFSET 84 - NAND_MXC_NR_BUFS * (512 + NAND_MXC_SPARE_BUF_SIZE)]; 85#if defined(MXC_NFC_V1) 86 u16 buf_size; 87 u16 reserved2; 88 u16 buf_addr; 89 u16 flash_addr; 90 u16 flash_cmd; 91 u16 config; 92 u16 ecc_status_result; 93 u16 rsltmain_area; 94 u16 rsltspare_area; 95 u16 wrprot; 96 u16 unlockstart_blkaddr; 97 u16 unlockend_blkaddr; 98 u16 nf_wrprst; 99 u16 config1; 100 u16 config2; 101#elif defined(MXC_NFC_V2_1) 102 u16 reserved2[2]; 103 u16 buf_addr; 104 u16 flash_addr; 105 u16 flash_cmd; 106 u16 config; 107 u32 ecc_status_result; 108 u16 spare_area_size; 109 u16 wrprot; 110 u16 reserved3[2]; 111 u16 nf_wrprst; 112 u16 config1; 113 u16 config2; 114 u16 reserved4; 115 u16 unlockstart_blkaddr; 116 u16 unlockend_blkaddr; 117 u16 unlockstart_blkaddr1; 118 u16 unlockend_blkaddr1; 119 u16 unlockstart_blkaddr2; 120 u16 unlockend_blkaddr2; 121 u16 unlockstart_blkaddr3; 122 u16 unlockend_blkaddr3; 123#elif defined(MXC_NFC_V3_2) 124 u32 flash_cmd; 125 u32 flash_addr[12]; 126 u32 config1; 127 u32 ecc_status_result; 128 u32 status_sum; 129 u32 launch; 130#endif 131}; 132 133#ifdef MXC_NFC_V3_2 134struct mxc_nand_ip_regs { 135 u32 wrprot; 136 u32 wrprot_unlock_blkaddr[8]; 137 u32 config2; 138 u32 config3; 139 u32 ipc; 140 u32 err_addr; 141 u32 delay_line; 142}; 143#endif 144 145/* Set FCMD to 1, rest to 0 for Command operation */ 146#define NFC_CMD 0x1 147 148/* Set FADD to 1, rest to 0 for Address operation */ 149#define NFC_ADDR 0x2 150 151/* Set FDI to 1, rest to 0 for Input operation */ 152#define NFC_INPUT 0x4 153 154/* Set FDO to 001, rest to 0 for Data Output operation */ 155#define NFC_OUTPUT 0x8 156 157/* Set FDO to 010, rest to 0 for Read ID operation */ 158#define NFC_ID 0x10 159 160/* Set FDO to 100, rest to 0 for Read Status operation */ 161#define NFC_STATUS 0x20 162 163#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1) 164#define NFC_CONFIG1_SP_EN (1 << 2) 165#define NFC_CONFIG1_RST (1 << 6) 166#define NFC_CONFIG1_CE (1 << 7) 167#elif defined(MXC_NFC_V3_2) 168#define NFC_CONFIG1_SP_EN (1 << 0) 169#define NFC_CONFIG1_CE (1 << 1) 170#define NFC_CONFIG1_RST (1 << 2) 171#endif 172#define NFC_V1_V2_CONFIG1_ECC_EN (1 << 3) 173#define NFC_V1_V2_CONFIG1_INT_MSK (1 << 4) 174#define NFC_V1_V2_CONFIG1_BIG (1 << 5) 175#define NFC_V2_CONFIG1_ECC_MODE_4 (1 << 0) 176#define NFC_V2_CONFIG1_ONE_CYCLE (1 << 8) 177#define NFC_V2_CONFIG1_FP_INT (1 << 11) 178#define NFC_V3_CONFIG1_RBA_MASK (0x7 << 4) 179#define NFC_V3_CONFIG1_RBA(x) (((x) & 0x7) << 4) 180 181#define NFC_V1_V2_CONFIG2_INT (1 << 15) 182#define NFC_V3_CONFIG2_PS_MASK (0x3 << 0) 183#define NFC_V3_CONFIG2_PS_512 (0 << 0) 184#define NFC_V3_CONFIG2_PS_2048 (1 << 0) 185#define NFC_V3_CONFIG2_PS_4096 (2 << 0) 186#define NFC_V3_CONFIG2_ONE_CYCLE (1 << 2) 187#define NFC_V3_CONFIG2_ECC_EN (1 << 3) 188#define NFC_V3_CONFIG2_2CMD_PHASES (1 << 4) 189#define NFC_V3_CONFIG2_NUM_ADDR_PH0 (1 << 5) 190#define NFC_V3_CONFIG2_ECC_MODE_8 (1 << 6) 191#define NFC_V3_CONFIG2_PPB_MASK (0x3 << 7) 192#define NFC_V3_CONFIG2_PPB(x) (((x) & 0x3) << 7) 193#define NFC_V3_CONFIG2_EDC_MASK (0x7 << 9) 194#define NFC_V3_CONFIG2_EDC(x) (((x) & 0x7) << 9) 195#define NFC_V3_CONFIG2_NUM_ADDR_PH1(x) (((x) & 0x3) << 12) 196#define NFC_V3_CONFIG2_INT_MSK (1 << 15) 197#define NFC_V3_CONFIG2_SPAS_MASK (0xff << 16) 198#define NFC_V3_CONFIG2_SPAS(x) (((x) & 0xff) << 16) 199#define NFC_V3_CONFIG2_ST_CMD_MASK (0xff << 24) 200#define NFC_V3_CONFIG2_ST_CMD(x) (((x) & 0xff) << 24) 201 202#define NFC_V3_CONFIG3_ADD_OP(x) (((x) & 0x3) << 0) 203#define NFC_V3_CONFIG3_FW8 (1 << 3) 204#define NFC_V3_CONFIG3_SBB(x) (((x) & 0x7) << 8) 205#define NFC_V3_CONFIG3_NUM_OF_DEVS(x) (((x) & 0x7) << 12) 206#define NFC_V3_CONFIG3_RBB_MODE (1 << 15) 207#define NFC_V3_CONFIG3_NO_SDMA (1 << 20) 208 209#define NFC_V3_WRPROT_UNLOCK (1 << 2) 210#define NFC_V3_WRPROT_BLS_UNLOCK (2 << 6) 211 212#define NFC_V3_IPC_CREQ (1 << 0) 213#define NFC_V3_IPC_INT (1 << 31) 214 215#if defined(MXC_NFC_V1) || defined(MXC_NFC_V2_1) 216#define operation config2 217#define readnfc readw 218#define writenfc writew 219#elif defined(MXC_NFC_V3_2) 220#define operation launch 221#define readnfc readl 222#define writenfc writel 223#endif 224 225#endif /* __MXC_NAND_H */ 226