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36#include <common.h>
37
38
39#if defined(CONFIG_USB_OHCI) && defined(CONFIG_S3C24X0)
40
41#include <asm/arch/s3c24x0_cpu.h>
42#include <asm/io.h>
43#include <malloc.h>
44#include <usb.h>
45#include "ohci-s3c24xx.h"
46
47#define OHCI_USE_NPS
48#undef OHCI_VERBOSE_DEBUG
49
50
51
52#define OHCI_CONTROL_INIT \
53 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
54
55#define min_t(type, x, y) \
56 ({ type __x = (x); type __y = (y); __x < __y ? __x : __y; })
57
58#undef DEBUG
59#ifdef DEBUG
60#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
61#else
62#define dbg(format, arg...) do {} while(0)
63#endif
64#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
65#undef SHOW_INFO
66#ifdef SHOW_INFO
67#define info(format, arg...) printf("INFO: " format "\n", ## arg)
68#else
69#define info(format, arg...) do {} while(0)
70#endif
71
72#define m16_swap(x) swap_16(x)
73#define m32_swap(x) swap_32(x)
74
75
76static struct ohci gohci;
77
78struct ohci_hcca ghcca[1];
79
80struct ohci_hcca *phcca;
81
82struct ohci_device ohci_dev;
83
84struct urb_priv urb_priv;
85
86int got_rhsc;
87
88struct usb_device *devgone;
89
90int urb_finished = 0;
91
92
93
94
95
96
97
98#define OHCI_QUIRK_AMD756 0xabcd
99#define read_roothub(hc, register, mask) ({ \
100 u32 temp = readl (&hc->regs->roothub.register); \
101 if (hc->flags & OHCI_QUIRK_AMD756) \
102 while (temp & mask) \
103 temp = readl (&hc->regs->roothub.register); \
104 temp; })
105
106static u32 roothub_a(struct ohci *hc)
107{
108 return read_roothub(hc, a, 0xfc0fe000);
109}
110static inline u32 roothub_b(struct ohci *hc)
111{
112 return readl(&hc->regs->roothub.b);
113}
114static inline u32 roothub_status(struct ohci *hc)
115{
116 return readl(&hc->regs->roothub.status);
117}
118static u32 roothub_portstatus(struct ohci *hc, int i)
119{
120 return read_roothub(hc, portstatus[i], 0xffe0fce0);
121}
122
123
124static int hc_interrupt(void);
125static void td_submit_job(struct usb_device *dev, unsigned long pipe,
126 void *buffer, int transfer_len,
127 struct devrequest *setup, struct urb_priv *urb,
128 int interval);
129
130
131
132
133
134
135
136static void urb_free_priv(struct urb_priv *urb)
137{
138 int i;
139 int last;
140 struct td *td;
141
142 last = urb->length - 1;
143 if (last >= 0) {
144 for (i = 0; i <= last; i++) {
145 td = urb->td[i];
146 if (td) {
147 td->usb_dev = NULL;
148 urb->td[i] = NULL;
149 }
150 }
151 }
152}
153
154
155
156#ifdef DEBUG
157static int sohci_get_current_frame_number(struct usb_device *dev);
158
159
160
161
162static void pkt_print(struct usb_device *dev, unsigned long pipe, void *buffer,
163 int transfer_len, struct devrequest *setup, char *str,
164 int small)
165{
166 struct urb_priv *purb = &urb_priv;
167
168 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
169 str,
170 sohci_get_current_frame_number(dev),
171 usb_pipedevice(pipe),
172 usb_pipeendpoint(pipe),
173 usb_pipeout(pipe) ? 'O' : 'I',
174 usb_pipetype(pipe) < 2 ?
175 (usb_pipeint(pipe) ? "INTR" : "ISOC") :
176 (usb_pipecontrol(pipe) ? "CTRL" : "BULK"),
177 purb->actual_length, transfer_len, dev->status);
178#ifdef OHCI_VERBOSE_DEBUG
179 if (!small) {
180 int i, len;
181
182 if (usb_pipecontrol(pipe)) {
183 printf(__FILE__ ": cmd(8):");
184 for (i = 0; i < 8; i++)
185 printf(" %02x", ((__u8 *) setup)[i]);
186 printf("\n");
187 }
188 if (transfer_len > 0 && buffer) {
189 printf(__FILE__ ": data(%d/%d):",
190 purb->actual_length, transfer_len);
191 len = usb_pipeout(pipe) ?
192 transfer_len : purb->actual_length;
193 for (i = 0; i < 16 && i < len; i++)
194 printf(" %02x", ((__u8 *) buffer)[i]);
195 printf("%s\n", i < len ? "..." : "");
196 }
197 }
198#endif
199}
200
201
202
203void ep_print_int_eds(struct ohci *ohci, char *str)
204{
205 int i, j;
206 __u32 *ed_p;
207 for (i = 0; i < 32; i++) {
208 j = 5;
209 ed_p = &(ohci->hcca->int_table[i]);
210 if (*ed_p == 0)
211 continue;
212 printf(__FILE__ ": %s branch int %2d(%2x):", str, i, i);
213 while (*ed_p != 0 && j--) {
214 struct ed *ed = (struct ed *) m32_swap(ed_p);
215 printf(" ed: %4x;", ed->hwINFO);
216 ed_p = &ed->hwNextED;
217 }
218 printf("\n");
219 }
220}
221
222static void ohci_dump_intr_mask(char *label, __u32 mask)
223{
224 dbg("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
225 label,
226 mask,
227 (mask & OHCI_INTR_MIE) ? " MIE" : "",
228 (mask & OHCI_INTR_OC) ? " OC" : "",
229 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
230 (mask & OHCI_INTR_FNO) ? " FNO" : "",
231 (mask & OHCI_INTR_UE) ? " UE" : "",
232 (mask & OHCI_INTR_RD) ? " RD" : "",
233 (mask & OHCI_INTR_SF) ? " SF" : "",
234 (mask & OHCI_INTR_WDH) ? " WDH" : "",
235 (mask & OHCI_INTR_SO) ? " SO" : "");
236}
237
238static void maybe_print_eds(char *label, __u32 value)
239{
240 struct ed *edp = (struct ed *) value;
241
242 if (value) {
243 dbg("%s %08x", label, value);
244 dbg("%08x", edp->hwINFO);
245 dbg("%08x", edp->hwTailP);
246 dbg("%08x", edp->hwHeadP);
247 dbg("%08x", edp->hwNextED);
248 }
249}
250
251static char *hcfs2string(int state)
252{
253 switch (state) {
254 case OHCI_USB_RESET:
255 return "reset";
256 case OHCI_USB_RESUME:
257 return "resume";
258 case OHCI_USB_OPER:
259 return "operational";
260 case OHCI_USB_SUSPEND:
261 return "suspend";
262 }
263 return "?";
264}
265
266
267static void ohci_dump_status(struct ohci *controller)
268{
269 struct ohci_regs *regs = controller->regs;
270 __u32 temp;
271
272 temp = readl(®s->revision) & 0xff;
273 if (temp != 0x10)
274 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f));
275
276 temp = readl(®s->control);
277 dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
278 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
279 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
280 (temp & OHCI_CTRL_IR) ? " IR" : "",
281 hcfs2string(temp & OHCI_CTRL_HCFS),
282 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
283 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
284 (temp & OHCI_CTRL_IE) ? " IE" : "",
285 (temp & OHCI_CTRL_PLE) ? " PLE" : "", temp & OHCI_CTRL_CBSR);
286
287 temp = readl(®s->cmdstatus);
288 dbg("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
289 (temp & OHCI_SOC) >> 16,
290 (temp & OHCI_OCR) ? " OCR" : "",
291 (temp & OHCI_BLF) ? " BLF" : "",
292 (temp & OHCI_CLF) ? " CLF" : "", (temp & OHCI_HCR) ? " HCR" : "");
293
294 ohci_dump_intr_mask("intrstatus", readl(®s->intrstatus));
295 ohci_dump_intr_mask("intrenable", readl(®s->intrenable));
296
297 maybe_print_eds("ed_periodcurrent", readl(®s->ed_periodcurrent));
298
299 maybe_print_eds("ed_controlhead", readl(®s->ed_controlhead));
300 maybe_print_eds("ed_controlcurrent", readl(®s->ed_controlcurrent));
301
302 maybe_print_eds("ed_bulkhead", readl(®s->ed_bulkhead));
303 maybe_print_eds("ed_bulkcurrent", readl(®s->ed_bulkcurrent));
304
305 maybe_print_eds("donehead", readl(®s->donehead));
306}
307
308static void ohci_dump_roothub(struct ohci *controller, int verbose)
309{
310 __u32 temp, ndp, i;
311
312 temp = roothub_a(controller);
313 ndp = (temp & RH_A_NDP);
314
315 if (verbose) {
316 dbg("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
317 ((temp & RH_A_POTPGT) >> 24) & 0xff,
318 (temp & RH_A_NOCP) ? " NOCP" : "",
319 (temp & RH_A_OCPM) ? " OCPM" : "",
320 (temp & RH_A_DT) ? " DT" : "",
321 (temp & RH_A_NPS) ? " NPS" : "",
322 (temp & RH_A_PSM) ? " PSM" : "", ndp);
323 temp = roothub_b(controller);
324 dbg("roothub.b: %08x PPCM=%04x DR=%04x",
325 temp, (temp & RH_B_PPCM) >> 16, (temp & RH_B_DR)
326 );
327 temp = roothub_status(controller);
328 dbg("roothub.status: %08x%s%s%s%s%s%s",
329 temp,
330 (temp & RH_HS_CRWE) ? " CRWE" : "",
331 (temp & RH_HS_OCIC) ? " OCIC" : "",
332 (temp & RH_HS_LPSC) ? " LPSC" : "",
333 (temp & RH_HS_DRWE) ? " DRWE" : "",
334 (temp & RH_HS_OCI) ? " OCI" : "",
335 (temp & RH_HS_LPS) ? " LPS" : "");
336 }
337
338 for (i = 0; i < ndp; i++) {
339 temp = roothub_portstatus(controller, i);
340 dbg("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
341 i,
342 temp,
343 (temp & RH_PS_PRSC) ? " PRSC" : "",
344 (temp & RH_PS_OCIC) ? " OCIC" : "",
345 (temp & RH_PS_PSSC) ? " PSSC" : "",
346 (temp & RH_PS_PESC) ? " PESC" : "",
347 (temp & RH_PS_CSC) ? " CSC" : "",
348 (temp & RH_PS_LSDA) ? " LSDA" : "",
349 (temp & RH_PS_PPS) ? " PPS" : "",
350 (temp & RH_PS_PRS) ? " PRS" : "",
351 (temp & RH_PS_POCI) ? " POCI" : "",
352 (temp & RH_PS_PSS) ? " PSS" : "",
353 (temp & RH_PS_PES) ? " PES" : "",
354 (temp & RH_PS_CCS) ? " CCS" : "");
355 }
356}
357
358static void ohci_dump(struct ohci *controller, int verbose)
359{
360 dbg("OHCI controller usb-%s state", controller->slot_name);
361
362
363 ohci_dump_status(controller);
364 if (verbose)
365 ep_print_int_eds(controller, "hcca");
366 dbg("hcca frame #%04x", controller->hcca->frame_no);
367 ohci_dump_roothub(controller, 1);
368}
369
370#endif
371
372
373
374
375
376
377
378int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
379 int transfer_len, struct devrequest *setup, int interval)
380{
381 struct ohci *ohci;
382 struct ed *ed;
383 struct urb_priv *purb_priv;
384 int i, size = 0;
385
386 ohci = &gohci;
387
388
389
390 if (ohci->disabled) {
391 err("sohci_submit_job: EPIPE");
392 return -1;
393 }
394
395
396
397
398 if (!urb_finished) {
399 err("sohci_submit_job: URB NOT FINISHED");
400 return -1;
401 }
402
403
404 urb_finished = 0;
405
406
407 ed = ep_add_ed(dev, pipe);
408 if (!ed) {
409 err("sohci_submit_job: ENOMEM");
410 return -1;
411 }
412
413
414 switch (usb_pipetype(pipe)) {
415 case PIPE_BULK:
416
417 size = (transfer_len - 1) / 4096 + 1;
418 break;
419 case PIPE_CONTROL:
420
421 size = (transfer_len == 0) ? 2 : (transfer_len - 1) / 4096 + 3;
422 break;
423 }
424
425 if (size >= (N_URB_TD - 1)) {
426 err("need %d TDs, only have %d", size, N_URB_TD);
427 return -1;
428 }
429 purb_priv = &urb_priv;
430 purb_priv->pipe = pipe;
431
432
433 purb_priv->length = size;
434 purb_priv->ed = ed;
435 purb_priv->actual_length = 0;
436
437
438
439 for (i = 0; i < size; i++) {
440 purb_priv->td[i] = td_alloc(dev);
441 if (!purb_priv->td[i]) {
442 purb_priv->length = i;
443 urb_free_priv(purb_priv);
444 err("sohci_submit_job: ENOMEM");
445 return -1;
446 }
447 }
448
449 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
450 urb_free_priv(purb_priv);
451 err("sohci_submit_job: EINVAL");
452 return -1;
453 }
454
455
456 if (ed->state != ED_OPER)
457 ep_link(ohci, ed);
458
459
460 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv,
461 interval);
462
463 return 0;
464}
465
466
467
468#ifdef DEBUG
469
470
471static int sohci_get_current_frame_number(struct usb_device *usb_dev)
472{
473 struct ohci *ohci = &gohci;
474
475 return m16_swap(ohci->hcca->frame_no);
476}
477#endif
478
479
480
481
482
483
484
485static int ep_link(struct ohci *ohci, struct ed *edi)
486{
487 struct ed *ed = edi;
488
489 ed->state = ED_OPER;
490
491 switch (ed->type) {
492 case PIPE_CONTROL:
493 ed->hwNextED = 0;
494 if (ohci->ed_controltail == NULL) {
495 writel((u32)ed, &ohci->regs->ed_controlhead);
496 } else {
497 ohci->ed_controltail->hwNextED = (__u32) m32_swap(ed);
498 }
499 ed->ed_prev = ohci->ed_controltail;
500 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
501 !ohci->ed_rm_list[1] && !ohci->sleeping) {
502 ohci->hc_control |= OHCI_CTRL_CLE;
503 writel(ohci->hc_control, &ohci->regs->control);
504 }
505 ohci->ed_controltail = edi;
506 break;
507
508 case PIPE_BULK:
509 ed->hwNextED = 0;
510 if (ohci->ed_bulktail == NULL) {
511 writel((u32)ed, &ohci->regs->ed_bulkhead);
512 } else {
513 ohci->ed_bulktail->hwNextED = (__u32) m32_swap(ed);
514 }
515 ed->ed_prev = ohci->ed_bulktail;
516 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
517 !ohci->ed_rm_list[1] && !ohci->sleeping) {
518 ohci->hc_control |= OHCI_CTRL_BLE;
519 writel(ohci->hc_control, &ohci->regs->control);
520 }
521 ohci->ed_bulktail = edi;
522 break;
523 }
524 return 0;
525}
526
527
528
529
530
531
532
533
534static int ep_unlink(struct ohci *ohci, struct ed *ed)
535{
536 struct ed *next;
537 ed->hwINFO |= m32_swap(OHCI_ED_SKIP);
538
539 switch (ed->type) {
540 case PIPE_CONTROL:
541 if (ed->ed_prev == NULL) {
542 if (!ed->hwNextED) {
543 ohci->hc_control &= ~OHCI_CTRL_CLE;
544 writel(ohci->hc_control, &ohci->regs->control);
545 }
546 writel(m32_swap(*((__u32 *) &ed->hwNextED)),
547 &ohci->regs->ed_controlhead);
548 } else {
549 ed->ed_prev->hwNextED = ed->hwNextED;
550 }
551 if (ohci->ed_controltail == ed) {
552 ohci->ed_controltail = ed->ed_prev;
553 } else {
554 next = (struct ed *)m32_swap(*((__u32 *)&ed->hwNextED));
555 next->ed_prev = ed->ed_prev;
556 }
557 break;
558
559 case PIPE_BULK:
560 if (ed->ed_prev == NULL) {
561 if (!ed->hwNextED) {
562 ohci->hc_control &= ~OHCI_CTRL_BLE;
563 writel(ohci->hc_control, &ohci->regs->control);
564 }
565 writel(m32_swap(*((__u32 *) &ed->hwNextED)),
566 &ohci->regs->ed_bulkhead);
567 } else {
568 ed->ed_prev->hwNextED = ed->hwNextED;
569 }
570 if (ohci->ed_bulktail == ed) {
571 ohci->ed_bulktail = ed->ed_prev;
572 } else {
573 next = (struct ed *)m32_swap(*((__u32 *)&ed->hwNextED));
574 next->ed_prev = ed->ed_prev;
575 }
576 break;
577 }
578 ed->state = ED_UNLINK;
579 return 0;
580}
581
582
583
584
585
586
587
588
589
590
591static struct ed *ep_add_ed(struct usb_device *usb_dev, unsigned long pipe)
592{
593 struct td *td;
594 struct ed *ed_ret;
595 struct ed *ed;
596
597 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint(pipe) << 1) |
598 (usb_pipecontrol(pipe) ? 0 :
599 usb_pipeout(pipe))];
600
601 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
602 err("ep_add_ed: pending delete");
603
604 return NULL;
605 }
606
607 if (ed->state == ED_NEW) {
608 ed->hwINFO = m32_swap(OHCI_ED_SKIP);
609
610 td = td_alloc(usb_dev);
611 ed->hwTailP = (__u32) m32_swap(td);
612 ed->hwHeadP = ed->hwTailP;
613 ed->state = ED_UNLINK;
614 ed->type = usb_pipetype(pipe);
615 ohci_dev.ed_cnt++;
616 }
617
618 ed->hwINFO = m32_swap(usb_pipedevice(pipe)
619 | usb_pipeendpoint(pipe) << 7
620 | (usb_pipeisoc(pipe) ? 0x8000 : 0)
621 | (usb_pipecontrol(pipe) ? 0 :
622 (usb_pipeout(pipe) ? 0x800 : 0x1000))
623 | (usb_dev->speed == USB_SPEED_LOW) << 13 |
624 usb_maxpacket(usb_dev, pipe) << 16);
625
626 return ed_ret;
627}
628
629
630
631
632
633
634
635static void td_fill(struct ohci *ohci, unsigned int info, void *data, int len,
636 struct usb_device *dev, int index,
637 struct urb_priv *urb_priv)
638{
639 struct td *td, *td_pt;
640#ifdef OHCI_FILL_TRACE
641 int i;
642#endif
643
644 if (index > urb_priv->length) {
645 err("index > length");
646 return;
647 }
648
649 td_pt = urb_priv->td[index];
650 td_pt->hwNextTD = 0;
651
652
653 td = urb_priv->td[index] =
654 (struct td *) (m32_swap(urb_priv->ed->hwTailP) & ~0xf);
655
656 td->ed = urb_priv->ed;
657 td->next_dl_td = NULL;
658 td->index = index;
659 td->data = (__u32) data;
660#ifdef OHCI_FILL_TRACE
661 if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
662 for (i = 0; i < len; i++)
663 printf("td->data[%d] %#2x ", i,
664 ((unsigned char *)td->data)[i]);
665 printf("\n");
666 }
667#endif
668 if (!len)
669 data = 0;
670
671 td->hwINFO = (__u32) m32_swap(info);
672 td->hwCBP = (__u32) m32_swap(data);
673 if (data)
674 td->hwBE = (__u32) m32_swap(data + len - 1);
675 else
676 td->hwBE = 0;
677 td->hwNextTD = (__u32) m32_swap(td_pt);
678
679
680 td->ed->hwTailP = td->hwNextTD;
681}
682
683
684
685
686
687static void td_submit_job(struct usb_device *dev, unsigned long pipe,
688 void *buffer, int transfer_len,
689 struct devrequest *setup, struct urb_priv *urb,
690 int interval)
691{
692 struct ohci *ohci = &gohci;
693 int data_len = transfer_len;
694 void *data;
695 int cnt = 0;
696 __u32 info = 0;
697 unsigned int toggle = 0;
698
699
700
701 if (usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
702 toggle = TD_T_TOGGLE;
703 } else {
704 toggle = TD_T_DATA0;
705 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe),
706 1);
707 }
708 urb->td_cnt = 0;
709 if (data_len)
710 data = buffer;
711 else
712 data = 0;
713
714 switch (usb_pipetype(pipe)) {
715 case PIPE_BULK:
716 info = usb_pipeout(pipe) ? TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN;
717 while (data_len > 4096) {
718 td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
719 4096, dev, cnt, urb);
720 data += 4096;
721 data_len -= 4096;
722 cnt++;
723 }
724 info = usb_pipeout(pipe) ?
725 TD_CC | TD_DP_OUT :
726 TD_CC | TD_R | TD_DP_IN;
727 td_fill(ohci, info | (cnt ? TD_T_TOGGLE : toggle), data,
728 data_len, dev, cnt, urb);
729 cnt++;
730
731 if (!ohci->sleeping)
732
733 writel(OHCI_BLF, &ohci->regs->cmdstatus);
734 break;
735
736 case PIPE_CONTROL:
737 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
738 td_fill(ohci, info, setup, 8, dev, cnt++, urb);
739 if (data_len > 0) {
740 info = usb_pipeout(pipe) ?
741 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 :
742 TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
743
744 td_fill(ohci, info, data, data_len, dev, cnt++, urb);
745 }
746 info = usb_pipeout(pipe) ?
747 TD_CC | TD_DP_IN | TD_T_DATA1 :
748 TD_CC | TD_DP_OUT | TD_T_DATA1;
749 td_fill(ohci, info, data, 0, dev, cnt++, urb);
750 if (!ohci->sleeping)
751
752 writel(OHCI_CLF, &ohci->regs->cmdstatus);
753 break;
754 }
755 if (urb->length != cnt)
756 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
757}
758
759
760
761
762
763
764
765
766static void dl_transfer_length(struct td *td)
767{
768 __u32 tdBE, tdCBP;
769 struct urb_priv *lurb_priv = &urb_priv;
770
771 tdBE = m32_swap(td->hwBE);
772 tdCBP = m32_swap(td->hwCBP);
773
774 if (!(usb_pipecontrol(lurb_priv->pipe) &&
775 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
776 if (tdBE != 0) {
777 if (td->hwCBP == 0)
778 lurb_priv->actual_length += tdBE - td->data + 1;
779 else
780 lurb_priv->actual_length += tdCBP - td->data;
781 }
782 }
783}
784
785
786
787
788
789
790static struct td *dl_reverse_done_list(struct ohci *ohci)
791{
792 __u32 td_list_hc;
793 __u32 tmp;
794 struct td *td_rev = NULL;
795 struct td *td_list = NULL;
796 struct urb_priv *lurb_priv = NULL;
797
798 td_list_hc = m32_swap(ohci->hcca->done_head) & 0xfffffff0;
799 ohci->hcca->done_head = 0;
800
801 while (td_list_hc) {
802 td_list = (struct td *) td_list_hc;
803
804 if (TD_CC_GET(m32_swap(td_list->hwINFO))) {
805 lurb_priv = &urb_priv;
806 dbg(" USB-error/status: %x : %p",
807 TD_CC_GET(m32_swap(td_list->hwINFO)), td_list);
808 if (td_list->ed->hwHeadP & m32_swap(0x1)) {
809 if (lurb_priv &&
810 ((td_list->index+1) < lurb_priv->length)) {
811 tmp = lurb_priv->length - 1;
812 td_list->ed->hwHeadP =
813 (lurb_priv->td[tmp]->hwNextTD &
814 m32_swap(0xfffffff0)) |
815 (td_list->ed->hwHeadP &
816 m32_swap(0x2));
817 lurb_priv->td_cnt += lurb_priv->length -
818 td_list->index - 1;
819 } else
820 td_list->ed->hwHeadP &=
821 m32_swap(0xfffffff2);
822 }
823 }
824
825 td_list->next_dl_td = td_rev;
826 td_rev = td_list;
827 td_list_hc = m32_swap(td_list->hwNextTD) & 0xfffffff0;
828 }
829
830 return td_list;
831}
832
833
834
835
836static int dl_done_list(struct ohci *ohci, struct td *td_list)
837{
838 struct td *td_list_next = NULL;
839 struct ed *ed;
840 int cc = 0;
841 int stat = 0;
842
843 struct urb_priv *lurb_priv;
844 __u32 tdINFO, edHeadP, edTailP;
845
846 while (td_list) {
847 td_list_next = td_list->next_dl_td;
848
849 lurb_priv = &urb_priv;
850 tdINFO = m32_swap(td_list->hwINFO);
851
852 ed = td_list->ed;
853
854 dl_transfer_length(td_list);
855
856
857 cc = TD_CC_GET(tdINFO);
858 if (cc != 0) {
859 dbg("ConditionCode %#x", cc);
860 stat = cc_to_error[cc];
861 }
862
863
864
865 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
866 if ((ed->state & (ED_OPER | ED_UNLINK)))
867 urb_finished = 1;
868 else
869 dbg("dl_done_list: strange.., ED state %x, "
870 "ed->state\n");
871 } else
872 dbg("dl_done_list: processing TD %x, len %x\n",
873 lurb_priv->td_cnt, lurb_priv->length);
874
875 if (ed->state != ED_NEW) {
876 edHeadP = m32_swap(ed->hwHeadP) & 0xfffffff0;
877 edTailP = m32_swap(ed->hwTailP);
878
879
880 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
881 ep_unlink(ohci, ed);
882 }
883
884 td_list = td_list_next;
885 }
886 return stat;
887}
888
889
890
891
892
893
894static __u8 root_hub_dev_des[] = {
895 0x12,
896 0x01,
897 0x10,
898 0x01,
899 0x09,
900 0x00,
901 0x00,
902 0x08,
903 0x00,
904 0x00,
905 0x00,
906 0x00,
907 0x00,
908 0x00,
909 0x00,
910 0x01,
911 0x00,
912 0x01
913};
914
915
916static __u8 root_hub_config_des[] = {
917 0x09,
918 0x02,
919 0x19,
920 0x00,
921 0x01,
922 0x01,
923 0x00,
924 0x40,
925
926
927 0x00,
928
929
930 0x09,
931 0x04,
932 0x00,
933 0x00,
934 0x01,
935 0x09,
936 0x00,
937 0x00,
938 0x00,
939
940
941 0x07,
942 0x05,
943 0x81,
944 0x03,
945 0x02,
946 0x00,
947 0xff
948};
949
950static unsigned char root_hub_str_index0[] = {
951 0x04,
952 0x03,
953 0x09,
954 0x04,
955};
956
957static unsigned char root_hub_str_index1[] = {
958 28,
959 0x03,
960 'O',
961 0,
962 'H',
963 0,
964 'C',
965 0,
966 'I',
967 0,
968 ' ',
969 0,
970 'R',
971 0,
972 'o',
973 0,
974 'o',
975 0,
976 't',
977 0,
978 ' ',
979 0,
980 'H',
981 0,
982 'u',
983 0,
984 'b',
985 0,
986};
987
988
989
990
991
992
993#define OK(x) len = (x); break
994#ifdef DEBUG
995#define WR_RH_STAT(x) \
996{ \
997 info("WR:status %#8x", (x)); \
998 writel((x), &gohci.regs->roothub.status); \
999}
1000#define WR_RH_PORTSTAT(x) \
1001{ \
1002 info("WR:portstatus[%d] %#8x", wIndex-1, (x)); \
1003 writel((x), &gohci.regs->roothub.portstatus[wIndex-1]); \
1004}
1005#else
1006#define WR_RH_STAT(x) \
1007 writel((x), &gohci.regs->roothub.status)
1008#define WR_RH_PORTSTAT(x)\
1009 writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
1010#endif
1011#define RD_RH_STAT roothub_status(&gohci)
1012#define RD_RH_PORTSTAT roothub_portstatus(&gohci, wIndex-1)
1013
1014
1015
1016int rh_check_port_status(struct ohci *controller)
1017{
1018 __u32 temp, ndp, i;
1019 int res;
1020
1021 res = -1;
1022 temp = roothub_a(controller);
1023 ndp = (temp & RH_A_NDP);
1024 for (i = 0; i < ndp; i++) {
1025 temp = roothub_portstatus(controller, i);
1026
1027 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
1028 (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) {
1029 res = i;
1030 break;
1031 }
1032 }
1033 return res;
1034}
1035
1036static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
1037 void *buffer, int transfer_len,
1038 struct devrequest *cmd)
1039{
1040 void *data = buffer;
1041 int leni = transfer_len;
1042 int len = 0;
1043 int stat = 0;
1044 union {
1045 __u32 word[4];
1046 __u16 hword[8];
1047 __u8 byte[16];
1048 } datab;
1049 __u8 *data_buf = datab.byte;
1050 __u16 bmRType_bReq;
1051 __u16 wValue;
1052 __u16 wIndex;
1053 __u16 wLength;
1054
1055#ifdef DEBUG
1056 urb_priv.actual_length = 0;
1057 pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)",
1058 usb_pipein(pipe));
1059#else
1060 mdelay(1);
1061#endif
1062 if (usb_pipeint(pipe)) {
1063 info("Root-Hub submit IRQ: NOT implemented");
1064 return 0;
1065 }
1066
1067 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1068 wValue = m16_swap(cmd->value);
1069 wIndex = m16_swap(cmd->index);
1070 wLength = m16_swap(cmd->length);
1071
1072 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1073 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1074
1075 switch (bmRType_bReq) {
1076
1077
1078
1079
1080
1081
1082
1083
1084 case RH_GET_STATUS:
1085 datab.hword[0] = m16_swap(1);
1086 OK(2);
1087 case RH_GET_STATUS | RH_INTERFACE:
1088 datab.hword[0] = m16_swap(0);
1089 OK(2);
1090 case RH_GET_STATUS | RH_ENDPOINT:
1091 datab.hword[0] = m16_swap(0);
1092 OK(2);
1093 case RH_GET_STATUS | RH_CLASS:
1094 datab.word[0] =
1095 m32_swap(RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1096 OK(4);
1097 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1098 datab.word[0] = m32_swap(RD_RH_PORTSTAT);
1099 OK(4);
1100
1101 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1102 switch (wValue) {
1103 case (RH_ENDPOINT_STALL):
1104 OK(0);
1105 }
1106 break;
1107
1108 case RH_CLEAR_FEATURE | RH_CLASS:
1109 switch (wValue) {
1110 case RH_C_HUB_LOCAL_POWER:
1111 OK(0);
1112 case (RH_C_HUB_OVER_CURRENT):
1113 WR_RH_STAT(RH_HS_OCIC);
1114 OK(0);
1115 }
1116 break;
1117
1118 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1119 switch (wValue) {
1120 case (RH_PORT_ENABLE):
1121 WR_RH_PORTSTAT(RH_PS_CCS);
1122 OK(0);
1123 case (RH_PORT_SUSPEND):
1124 WR_RH_PORTSTAT(RH_PS_POCI);
1125 OK(0);
1126 case (RH_PORT_POWER):
1127 WR_RH_PORTSTAT(RH_PS_LSDA);
1128 OK(0);
1129 case (RH_C_PORT_CONNECTION):
1130 WR_RH_PORTSTAT(RH_PS_CSC);
1131 OK(0);
1132 case (RH_C_PORT_ENABLE):
1133 WR_RH_PORTSTAT(RH_PS_PESC);
1134 OK(0);
1135 case (RH_C_PORT_SUSPEND):
1136 WR_RH_PORTSTAT(RH_PS_PSSC);
1137 OK(0);
1138 case (RH_C_PORT_OVER_CURRENT):
1139 WR_RH_PORTSTAT(RH_PS_OCIC);
1140 OK(0);
1141 case (RH_C_PORT_RESET):
1142 WR_RH_PORTSTAT(RH_PS_PRSC);
1143 OK(0);
1144 }
1145 break;
1146
1147 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1148 switch (wValue) {
1149 case (RH_PORT_SUSPEND):
1150 WR_RH_PORTSTAT(RH_PS_PSS);
1151 OK(0);
1152 case (RH_PORT_RESET):
1153 if (RD_RH_PORTSTAT & RH_PS_CCS)
1154 WR_RH_PORTSTAT(RH_PS_PRS);
1155 OK(0);
1156 case (RH_PORT_POWER):
1157 WR_RH_PORTSTAT(RH_PS_PPS);
1158 OK(0);
1159 case (RH_PORT_ENABLE):
1160 if (RD_RH_PORTSTAT & RH_PS_CCS)
1161 WR_RH_PORTSTAT(RH_PS_PES);
1162 OK(0);
1163 }
1164 break;
1165
1166 case RH_SET_ADDRESS:
1167 gohci.rh.devnum = wValue;
1168 OK(0);
1169
1170 case RH_GET_DESCRIPTOR:
1171 switch ((wValue & 0xff00) >> 8) {
1172 case (0x01):
1173 len = min_t(unsigned int,
1174 leni,
1175 min_t(unsigned int,
1176 sizeof(root_hub_dev_des), wLength));
1177 data_buf = root_hub_dev_des;
1178 OK(len);
1179 case (0x02):
1180 len = min_t(unsigned int,
1181 leni,
1182 min_t(unsigned int,
1183 sizeof(root_hub_config_des),
1184 wLength));
1185 data_buf = root_hub_config_des;
1186 OK(len);
1187 case (0x03):
1188 if (wValue == 0x0300) {
1189 len = min_t(unsigned int,
1190 leni,
1191 min_t(unsigned int,
1192 sizeof(root_hub_str_index0),
1193 wLength));
1194 data_buf = root_hub_str_index0;
1195 OK(len);
1196 }
1197 if (wValue == 0x0301) {
1198 len = min_t(unsigned int,
1199 leni,
1200 min_t(unsigned int,
1201 sizeof(root_hub_str_index1),
1202 wLength));
1203 data_buf = root_hub_str_index1;
1204 OK(len);
1205 }
1206 default:
1207 stat = USB_ST_STALLED;
1208 }
1209 break;
1210
1211 case RH_GET_DESCRIPTOR | RH_CLASS:
1212 {
1213 __u32 temp = roothub_a(&gohci);
1214
1215 data_buf[0] = 9;
1216 data_buf[1] = 0x29;
1217 data_buf[2] = temp & RH_A_NDP;
1218 data_buf[3] = 0;
1219 if (temp & RH_A_PSM)
1220
1221 data_buf[3] |= 0x1;
1222 if (temp & RH_A_NOCP)
1223
1224 data_buf[3] |= 0x10;
1225 else if (temp & RH_A_OCPM)
1226
1227 data_buf[3] |= 0x8;
1228
1229
1230 datab.word[1] = 0;
1231 data_buf[5] = (temp & RH_A_POTPGT) >> 24;
1232 temp = roothub_b(&gohci);
1233 data_buf[7] = temp & RH_B_DR;
1234 if (data_buf[2] < 7) {
1235 data_buf[8] = 0xff;
1236 } else {
1237 data_buf[0] += 2;
1238 data_buf[8] = (temp & RH_B_DR) >> 8;
1239 data_buf[10] = data_buf[9] = 0xff;
1240 }
1241
1242 len = min_t(unsigned int, leni,
1243 min_t(unsigned int, data_buf[0], wLength));
1244 OK(len);
1245 }
1246
1247 case RH_GET_CONFIGURATION:
1248 *(__u8 *) data_buf = 0x01;
1249 OK(1);
1250
1251 case RH_SET_CONFIGURATION:
1252 WR_RH_STAT(0x10000);
1253 OK(0);
1254
1255 default:
1256 dbg("unsupported root hub command");
1257 stat = USB_ST_STALLED;
1258 }
1259
1260#ifdef DEBUG
1261 ohci_dump_roothub(&gohci, 1);
1262#else
1263 mdelay(1);
1264#endif
1265
1266 len = min_t(int, len, leni);
1267 if (data != data_buf)
1268 memcpy(data, data_buf, len);
1269 dev->act_len = len;
1270 dev->status = stat;
1271
1272#ifdef DEBUG
1273 if (transfer_len)
1274 urb_priv.actual_length = transfer_len;
1275 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)",
1276 0 );
1277#else
1278 mdelay(1);
1279#endif
1280
1281 return stat;
1282}
1283
1284
1285
1286
1287
1288int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1289 int transfer_len, struct devrequest *setup, int interval)
1290{
1291 int stat = 0;
1292 int maxsize = usb_maxpacket(dev, pipe);
1293 int timeout;
1294
1295
1296 if (devgone == dev) {
1297 dev->status = USB_ST_CRC_ERR;
1298 return 0;
1299 }
1300#ifdef DEBUG
1301 urb_priv.actual_length = 0;
1302 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
1303 usb_pipein(pipe));
1304#else
1305 mdelay(1);
1306#endif
1307 if (!maxsize) {
1308 err("submit_common_message: pipesize for pipe %lx is zero",
1309 pipe);
1310 return -1;
1311 }
1312
1313 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) <
1314 0) {
1315 err("sohci_submit_job failed");
1316 return -1;
1317 }
1318
1319 mdelay(10);
1320
1321
1322
1323#define BULK_TO 5000
1324 if (usb_pipebulk(pipe))
1325 timeout = BULK_TO;
1326 else
1327 timeout = 100;
1328
1329
1330 for (;;) {
1331
1332 stat = hc_interrupt();
1333
1334 if (stat < 0) {
1335 stat = USB_ST_CRC_ERR;
1336 break;
1337 }
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
1349
1350 break;
1351 }
1352
1353 if (--timeout) {
1354 mdelay(1);
1355 if (!urb_finished)
1356 dbg("\%");
1357
1358 } else {
1359 err("CTL:TIMEOUT ");
1360 dbg("submit_common_msg: TO status %x\n", stat);
1361 stat = USB_ST_CRC_ERR;
1362 urb_finished = 1;
1363 break;
1364 }
1365 }
1366
1367#if 0
1368
1369 if (got_rhsc) {
1370#ifdef DEBUG
1371 ohci_dump_roothub(&gohci, 1);
1372#endif
1373 got_rhsc = 0;
1374
1375 timeout = rh_check_port_status(&gohci);
1376 if (timeout >= 0) {
1377#if 0
1378
1379
1380 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1381#endif
1382
1383
1384
1385
1386
1387 devgone = dev;
1388 }
1389 }
1390#endif
1391
1392 dev->status = stat;
1393 dev->act_len = transfer_len;
1394
1395#ifdef DEBUG
1396 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)",
1397 usb_pipein(pipe));
1398#else
1399 mdelay(1);
1400#endif
1401
1402
1403 urb_free_priv(&urb_priv);
1404 return 0;
1405}
1406
1407
1408int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1409 int transfer_len)
1410{
1411 info("submit_bulk_msg");
1412 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1413}
1414
1415int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1416 int transfer_len, struct devrequest *setup)
1417{
1418 int maxsize = usb_maxpacket(dev, pipe);
1419
1420 info("submit_control_msg");
1421#ifdef DEBUG
1422 urb_priv.actual_length = 0;
1423 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB",
1424 usb_pipein(pipe));
1425#else
1426 mdelay(1);
1427#endif
1428 if (!maxsize) {
1429 err("submit_control_message: pipesize for pipe %lx is zero",
1430 pipe);
1431 return -1;
1432 }
1433 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1434 gohci.rh.dev = dev;
1435
1436 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1437 setup);
1438 }
1439
1440 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1441}
1442
1443int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1444 int transfer_len, int interval)
1445{
1446 info("submit_int_msg");
1447 return -1;
1448}
1449
1450
1451
1452
1453
1454
1455
1456static int hc_reset(struct ohci *ohci)
1457{
1458 int timeout = 30;
1459 int smm_timeout = 50;
1460
1461 if (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1462
1463 writel(OHCI_OCR, &ohci->regs->cmdstatus);
1464 info("USB HC TakeOver from SMM");
1465 while (readl(&ohci->regs->control) & OHCI_CTRL_IR) {
1466 mdelay(10);
1467 if (--smm_timeout == 0) {
1468 err("USB HC TakeOver failed!");
1469 return -1;
1470 }
1471 }
1472 }
1473
1474
1475 writel(OHCI_INTR_MIE, &ohci->regs->intrdisable);
1476
1477 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1478 ohci->slot_name, readl(&ohci->regs->control));
1479
1480
1481 writel(0, &ohci->regs->control);
1482
1483
1484 writel(OHCI_HCR, &ohci->regs->cmdstatus);
1485 while ((readl(&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1486 if (--timeout == 0) {
1487 err("USB HC reset timed out!");
1488 return -1;
1489 }
1490 udelay(1);
1491 }
1492 return 0;
1493}
1494
1495
1496
1497
1498
1499
1500
1501static int hc_start(struct ohci *ohci)
1502{
1503 __u32 mask;
1504 unsigned int fminterval;
1505
1506 ohci->disabled = 1;
1507
1508
1509
1510
1511 writel(0, &ohci->regs->ed_controlhead);
1512 writel(0, &ohci->regs->ed_bulkhead);
1513
1514
1515 writel((__u32) ohci->hcca, &ohci->regs->hcca);
1516
1517 fminterval = 0x2edf;
1518 writel((fminterval * 9) / 10, &ohci->regs->periodicstart);
1519 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1520 writel(fminterval, &ohci->regs->fminterval);
1521 writel(0x628, &ohci->regs->lsthresh);
1522
1523
1524 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1525 ohci->disabled = 0;
1526 writel(ohci->hc_control, &ohci->regs->control);
1527
1528
1529 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1530 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1531 OHCI_INTR_OC | OHCI_INTR_MIE);
1532 writel(mask, &ohci->regs->intrdisable);
1533
1534 mask &= ~OHCI_INTR_MIE;
1535 writel(mask, &ohci->regs->intrstatus);
1536
1537 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1538 writel(mask, &ohci->regs->intrenable);
1539
1540#ifdef OHCI_USE_NPS
1541
1542 writel((roothub_a(ohci) | RH_A_NPS) & ~RH_A_PSM,
1543 &ohci->regs->roothub.a);
1544 writel(RH_HS_LPSC, &ohci->regs->roothub.status);
1545#endif
1546
1547
1548 mdelay((roothub_a(ohci) >> 23) & 0x1fe);
1549
1550
1551 ohci->rh.devnum = 0;
1552
1553 return 0;
1554}
1555
1556
1557
1558
1559
1560static int hc_interrupt(void)
1561{
1562 struct ohci *ohci = &gohci;
1563 struct ohci_regs *regs = ohci->regs;
1564 int ints;
1565 int stat = -1;
1566
1567 if ((ohci->hcca->done_head != 0) &&
1568 !(m32_swap(ohci->hcca->done_head) & 0x01)) {
1569
1570 ints = OHCI_INTR_WDH;
1571
1572 } else {
1573 ints = readl(®s->intrstatus);
1574 if (ints == ~(u32) 0) {
1575 ohci->disabled++;
1576 err("%s device removed!", ohci->slot_name);
1577 return -1;
1578 }
1579 ints &= readl(®s->intrenable);
1580 if (ints == 0) {
1581 dbg("hc_interrupt: returning..\n");
1582 return 0xff;
1583 }
1584 }
1585
1586
1587
1588
1589 if (ints & OHCI_INTR_RHSC) {
1590 got_rhsc = 1;
1591 stat = 0xff;
1592 }
1593
1594 if (ints & OHCI_INTR_UE) {
1595 ohci->disabled++;
1596 err("OHCI Unrecoverable Error, controller usb-%s disabled",
1597 ohci->slot_name);
1598
1599
1600#ifdef DEBUG
1601 ohci_dump(ohci, 1);
1602#else
1603 mdelay(1);
1604#endif
1605
1606
1607
1608
1609 hc_reset(ohci);
1610 return -1;
1611 }
1612
1613 if (ints & OHCI_INTR_WDH) {
1614 mdelay(1);
1615
1616 writel(OHCI_INTR_WDH, ®s->intrdisable);
1617 stat = dl_done_list(&gohci, dl_reverse_done_list(&gohci));
1618 writel(OHCI_INTR_WDH, ®s->intrenable);
1619 }
1620
1621 if (ints & OHCI_INTR_SO) {
1622 dbg("USB Schedule overrun\n");
1623 writel(OHCI_INTR_SO, ®s->intrenable);
1624 stat = -1;
1625 }
1626
1627
1628 if (ints & OHCI_INTR_SF) {
1629 unsigned int frame = m16_swap(ohci->hcca->frame_no) & 1;
1630 mdelay(1);
1631 writel(OHCI_INTR_SF, ®s->intrdisable);
1632 if (ohci->ed_rm_list[frame] != NULL)
1633 writel(OHCI_INTR_SF, ®s->intrenable);
1634 stat = 0xff;
1635 }
1636
1637 writel(ints, ®s->intrstatus);
1638 return stat;
1639}
1640
1641
1642
1643
1644
1645
1646
1647static void hc_release_ohci(struct ohci *ohci)
1648{
1649 dbg("USB HC release ohci usb-%s", ohci->slot_name);
1650
1651 if (!ohci->disabled)
1652 hc_reset(ohci);
1653}
1654
1655
1656
1657
1658
1659
1660static char ohci_inited = 0;
1661
1662int usb_lowlevel_init(int index, void **controller)
1663{
1664 struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
1665 struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
1666
1667
1668
1669
1670
1671 clk_power->upllcon = ((40 << 12) + (1 << 4) + 2);
1672 gpio->misccr |= 0x8;
1673
1674
1675
1676
1677 clk_power->clkcon |= (1 << 4);
1678
1679 memset(&gohci, 0, sizeof(struct ohci));
1680 memset(&urb_priv, 0, sizeof(struct urb_priv));
1681
1682
1683 if ((__u32) &ghcca[0] & 0xff) {
1684 err("HCCA not aligned!!");
1685 return -1;
1686 }
1687 phcca = &ghcca[0];
1688 info("aligned ghcca %p", phcca);
1689 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1690 if ((__u32) &ohci_dev.ed[0] & 0x7) {
1691 err("EDs not aligned!!");
1692 return -1;
1693 }
1694 memset(gtd, 0, sizeof(struct td) * (NUM_TD + 1));
1695 if ((__u32) gtd & 0x7) {
1696 err("TDs not aligned!!");
1697 return -1;
1698 }
1699 ptd = gtd;
1700 gohci.hcca = phcca;
1701 memset(phcca, 0, sizeof(struct ohci_hcca));
1702
1703 gohci.disabled = 1;
1704 gohci.sleeping = 0;
1705 gohci.irq = -1;
1706 gohci.regs = (struct ohci_regs *)S3C24X0_USB_HOST_BASE;
1707
1708 gohci.flags = 0;
1709 gohci.slot_name = "s3c2400";
1710
1711 if (hc_reset(&gohci) < 0) {
1712 hc_release_ohci(&gohci);
1713
1714 clk_power->clkcon &= ~(1 << 4);
1715 return -1;
1716 }
1717
1718
1719 gohci.hc_control = OHCI_USB_RESET;
1720 writel(gohci.hc_control, &gohci.regs->control);
1721 mdelay(10);
1722
1723 if (hc_start(&gohci) < 0) {
1724 err("can't start usb-%s", gohci.slot_name);
1725 hc_release_ohci(&gohci);
1726
1727 clk_power->clkcon &= ~(1 << 4);
1728 return -1;
1729 }
1730#ifdef DEBUG
1731 ohci_dump(&gohci, 1);
1732#else
1733 mdelay(1);
1734#endif
1735 ohci_inited = 1;
1736 urb_finished = 1;
1737
1738 return 0;
1739}
1740
1741int usb_lowlevel_stop(int index)
1742{
1743 struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
1744
1745
1746
1747 if (!ohci_inited)
1748 return 0;
1749
1750
1751 hc_reset(&gohci);
1752
1753 clk_power->clkcon &= ~(1 << 4);
1754 return 0;
1755}
1756
1757#endif
1758
1759#if defined(CONFIG_USB_OHCI_NEW) && \
1760 defined(CONFIG_SYS_USB_OHCI_CPU_INIT) && \
1761 defined(CONFIG_S3C24X0)
1762
1763int usb_cpu_init(void)
1764{
1765 struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
1766 struct s3c24x0_gpio *gpio = s3c24x0_get_base_gpio();
1767
1768
1769
1770
1771
1772 writel((40 << 12) + (1 << 4) + 2, &clk_power->upllcon);
1773
1774 writel(readl(&gpio->misccr) | 0x8, &gpio->misccr);
1775
1776
1777
1778
1779 writel(readl(&clk_power->clkcon) | (1 << 4), &clk_power->clkcon);
1780
1781 return 0;
1782}
1783
1784int usb_cpu_stop(void)
1785{
1786 struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
1787
1788 writel(readl(&clk_power->clkcon) & ~(1 << 4), &clk_power->clkcon);
1789 return 0;
1790}
1791
1792int usb_cpu_init_fail(void)
1793{
1794 struct s3c24x0_clock_power *clk_power = s3c24x0_get_base_clock_power();
1795 writel(readl(&clk_power->clkcon) & ~(1 << 4), &clk_power->clkcon);
1796 return 0;
1797}
1798
1799#endif
1800
1801
1802