LXR uboot/include/configs/igep00x0.h

   1/*
   2 * Common configuration settings for IGEP technology based boards
   3 *
   4 * (C) Copyright 2012
   5 * ISEE 2007 SL, <www.iseebcn.com>
   6 *
   7 * This program is free software; you can redistribute it and/or
   8 * modify it under the terms of the GNU General Public License as
   9 * published by the Free Software Foundation; either version 2 of
  10 * the License, or (at your option) any later version.
  11 *
  12 * This program is distributed in the hope that it will be useful,
  13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 * GNU General Public License for more details.
  16 *
  17 * You should have received a copy of the GNU General Public License
  18 * along with this program; if not, write to the Free Software
  19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20 * MA 02111-1307 USA
  21 */
  22
  23#ifndef __IGEP00X0_H
  24#define __IGEP00X0_H
  25
  26#include <asm/sizes.h>
  27
  28/*
  29 * High Level Configuration Options
  30 */
  31#define CONFIG_OMAP             1       /* in a TI OMAP core */
  32#define CONFIG_OMAP34XX         1       /* which is a 34XX */
  33#define CONFIG_OMAP_GPIO
  34
  35#define CONFIG_SDRC     /* The chip has SDRC controller */
  36
  37#include <asm/arch/cpu.h>
  38#include <asm/arch/omap3.h>
  39#include <asm/mach-types.h>
  40
  41/*
  42 * Display CPU and Board information
  43 */
  44#define CONFIG_DISPLAY_CPUINFO          1
  45#define CONFIG_DISPLAY_BOARDINFO        1
  46
  47/* Clock Defines */
  48#define V_OSCK                  26000000        /* Clock output from T2 */
  49#define V_SCLK                  (V_OSCK >> 1)
  50
  51#define CONFIG_MISC_INIT_R
  52
  53#define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs */
  54#define CONFIG_SETUP_MEMORY_TAGS        1
  55#define CONFIG_INITRD_TAG               1
  56#define CONFIG_REVISION_TAG             1
  57
  58#define CONFIG_OF_LIBFDT
  59#define CONFIG_CMD_BOOTZ
  60
  61/*
  62 * NS16550 Configuration
  63 */
  64
  65#define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  66
  67#define CONFIG_SYS_NS16550
  68#define CONFIG_SYS_NS16550_SERIAL
  69#define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  70#define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  71
  72/* select serial console configuration */
  73#define CONFIG_CONS_INDEX               3
  74#define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  75#define CONFIG_SERIAL3                  3
  76
  77/* allow to overwrite serial and ethaddr */
  78#define CONFIG_ENV_OVERWRITE
  79#define CONFIG_BAUDRATE                 115200
  80#define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600, \
  81                                        115200}
  82#define CONFIG_GENERIC_MMC              1
  83#define CONFIG_MMC                      1
  84#define CONFIG_OMAP_HSMMC               1
  85#define CONFIG_DOS_PARTITION            1
  86
  87/* define to enable boot progress via leds */
  88#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
  89    (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0030)
  90#define CONFIG_SHOW_BOOT_PROGRESS
  91#endif
  92
  93/* USB */
  94#define CONFIG_MUSB_UDC                 1
  95#define CONFIG_USB_OMAP3                1
  96#define CONFIG_TWL4030_USB              1
  97
  98/* USB device configuration */
  99#define CONFIG_USB_DEVICE               1
 100#define CONFIG_USB_TTY                  1
 101#define CONFIG_SYS_CONSOLE_IS_IN_ENV    1
 102
 103/* Change these to suit your needs */
 104#define CONFIG_USBD_VENDORID            0x0451
 105#define CONFIG_USBD_PRODUCTID           0x5678
 106#define CONFIG_USBD_MANUFACTURER        "Texas Instruments"
 107#define CONFIG_USBD_PRODUCT_NAME        "IGEP"
 108
 109/* commands to include */
 110#include <config_cmd_default.h>
 111
 112#define CONFIG_CMD_CACHE
 113#define CONFIG_CMD_EXT2         /* EXT2 Support                 */
 114#define CONFIG_CMD_FAT          /* FAT support                  */
 115#define CONFIG_CMD_I2C          /* I2C serial bus support       */
 116#define CONFIG_CMD_MMC          /* MMC support                  */
 117#ifdef CONFIG_BOOT_ONENAND
 118#define CONFIG_CMD_ONENAND      /* ONENAND support              */
 119#endif
 120#ifdef CONFIG_BOOT_NAND
 121#define CONFIG_CMD_NAND
 122#endif
 123#if (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0020) || \
 124    (CONFIG_MACH_TYPE == MACH_TYPE_IGEP0032)
 125#define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
 126#endif
 127#define CONFIG_CMD_DHCP
 128#define CONFIG_CMD_PING
 129#define CONFIG_CMD_NFS          /* NFS support                  */
 130#define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands    */
 131#define CONFIG_MTD_DEVICE
 132
 133#undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 134#undef CONFIG_CMD_IMLS          /* List all found images        */
 135
 136#define CONFIG_SYS_NO_FLASH
 137#define CONFIG_HARD_I2C                 1
 138#define CONFIG_SYS_I2C_SPEED            100000
 139#define CONFIG_SYS_I2C_SLAVE            1
 140#define CONFIG_DRIVER_OMAP34XX_I2C      1
 141
 142/*
 143 * TWL4030
 144 */
 145#define CONFIG_TWL4030_POWER            1
 146
 147#define CONFIG_BOOTDELAY                3
 148
 149#define CONFIG_EXTRA_ENV_SETTINGS \
 150        "usbtty=cdc_acm\0" \
 151        "loadaddr=0x82000000\0" \
 152        "usbtty=cdc_acm\0" \
 153        "console=ttyO2,115200n8\0" \
 154        "mpurate=auto\0" \
 155        "vram=12M\0" \
 156        "dvimode=1024x768MR-16@60\0" \
 157        "defaultdisplay=dvi\0" \
 158        "mmcdev=0\0" \
 159        "mmcroot=/dev/mmcblk0p2 rw\0" \
 160        "mmcrootfstype=ext4 rootwait\0" \
 161        "nandroot=/dev/mtdblock4 rw\0" \
 162        "nandrootfstype=jffs2\0" \
 163        "mmcargs=setenv bootargs console=${console} " \
 164                "mpurate=${mpurate} " \
 165                "vram=${vram} " \
 166                "omapfb.mode=dvi:${dvimode} " \
 167                "omapfb.debug=y " \
 168                "omapdss.def_disp=${defaultdisplay} " \
 169                "root=${mmcroot} " \
 170                "rootfstype=${mmcrootfstype}\0" \
 171        "nandargs=setenv bootargs console=${console} " \
 172                "mpurate=${mpurate} " \
 173                "vram=${vram} " \
 174                "omapfb.mode=dvi:${dvimode} " \
 175                "omapfb.debug=y " \
 176                "omapdss.def_disp=${defaultdisplay} " \
 177                "root=${nandroot} " \
 178                "rootfstype=${nandrootfstype}\0" \
 179        "loadbootenv=fatload mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
 180        "importbootenv=echo Importing environment from mmc ...; " \
 181                "env import -t $loadaddr $filesize\0" \
 182        "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
 183        "mmcboot=echo Booting from mmc ...; " \
 184                "run mmcargs; " \
 185                "bootm ${loadaddr}\0" \
 186        "nandboot=echo Booting from onenand ...; " \
 187                "run nandargs; " \
 188                "onenand read ${loadaddr} 280000 400000; " \
 189                "bootm ${loadaddr}\0" \
 190
 191#define CONFIG_BOOTCOMMAND \
 192        "mmc dev ${mmcdev}; if mmc rescan; then " \
 193                "echo SD/MMC found on device ${mmcdev};" \
 194                "if run loadbootenv; then " \
 195                        "run importbootenv;" \
 196                "fi;" \
 197                "if test -n $uenvcmd; then " \
 198                        "echo Running uenvcmd ...;" \
 199                        "run uenvcmd;" \
 200                "fi;" \
 201                "if run loaduimage; then " \
 202                        "run mmcboot;" \
 203                "fi;" \
 204        "fi;" \
 205        "run nandboot;" \
 206
 207#define CONFIG_AUTO_COMPLETE            1
 208
 209/*
 210 * Miscellaneous configurable options
 211 */
 212#define CONFIG_SYS_LONGHELP             /* undef to save memory */
 213#define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 214#define CONFIG_SYS_PROMPT               "U-Boot # "
 215#define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 216/* Print Buffer Size */
 217#define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 218                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 219#define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 220/* Boot Argument Buffer Size */
 221#define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 222
 223#define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
 224                                                                /* works on */
 225#define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 226                                        0x01F00000) /* 31MB */
 227
 228#define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
 229                                                        /* load address */
 230
 231#define CONFIG_SYS_MONITOR_LEN          (256 << 10)
 232
 233/*
 234 * OMAP3 has 12 GP timers, they can be driven by the system clock
 235 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 236 * This rate is divided by a local divisor.
 237 */
 238#define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 239#define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 240#define CONFIG_SYS_HZ                   1000
 241
 242/*
 243 * Physical Memory Map
 244 *
 245 */
 246#define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 247#define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 248#define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 249
 250/*
 251 * FLASH and environment organization
 252 */
 253
 254#ifdef CONFIG_BOOT_ONENAND
 255#define PISMO1_ONEN_SIZE                GPMC_SIZE_128M /* Configure the PISMO */
 256
 257#define CONFIG_SYS_ONENAND_BASE         ONENAND_MAP
 258
 259#define ONENAND_ENV_OFFSET              0x260000 /* environment starts here */
 260
 261#define CONFIG_ENV_IS_IN_ONENAND        1
 262#define CONFIG_ENV_SIZE                 (512 << 10) /* Total Size Environment */
 263#define CONFIG_ENV_ADDR                 ONENAND_ENV_OFFSET
 264#endif
 265
 266#ifdef CONFIG_BOOT_NAND
 267#define PISMO1_NAND_SIZE                GPMC_SIZE_128M /* Configure the PISMO */
 268#define CONFIG_NAND_OMAP_GPMC
 269#define CONFIG_SYS_NAND_BASE            NAND_BASE
 270#define GPMC_NAND_ECC_LP_x16_LAYOUT     1
 271#define CONFIG_ENV_OFFSET               0x260000 /* environment starts here */
 272#define CONFIG_ENV_IS_IN_NAND           1
 273#define CONFIG_ENV_SIZE                 (512 << 10) /* Total Size Environment */
 274#define CONFIG_ENV_ADDR                 NAND_ENV_OFFSET
 275#define CONFIG_SYS_MAX_NAND_DEVICE      1
 276#endif
 277
 278/*
 279 * Size of malloc() pool
 280 */
 281#define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (128 << 10))
 282
 283/*
 284 * SMSC911x Ethernet
 285 */
 286#if defined(CONFIG_CMD_NET)
 287#define CONFIG_SMC911X
 288#define CONFIG_SMC911X_32_BIT
 289#define CONFIG_SMC911X_BASE     0x2C000000
 290#endif /* (CONFIG_CMD_NET) */
 291
 292/*
 293 * Leave it at 0x80008000 to allow booting new u-boot.bin with X-loader
 294 * and older u-boot.bin with the new U-Boot SPL.
 295 */
 296#define CONFIG_SYS_TEXT_BASE            0x80008000
 297#define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 298#define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 299#define CONFIG_SYS_INIT_RAM_SIZE        0x800
 300#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 301                                         CONFIG_SYS_INIT_RAM_SIZE - \
 302                                         GENERATED_GBL_DATA_SIZE)
 303
 304/* SPL */
 305#define CONFIG_SPL
 306#define CONFIG_SPL_FRAMEWORK
 307#define CONFIG_SPL_NAND_SIMPLE
 308#define CONFIG_SPL_TEXT_BASE            0x40200800
 309#define CONFIG_SPL_MAX_SIZE             (54 * 1024)
 310#define CONFIG_SPL_STACK                LOW_LEVEL_SRAM_STACK
 311
 312/* move malloc and bss high to prevent clashing with the main image */
 313#define CONFIG_SYS_SPL_MALLOC_START     0x87000000
 314#define CONFIG_SYS_SPL_MALLOC_SIZE      0x80000
 315#define CONFIG_SPL_BSS_START_ADDR       0x87080000      /* end of minimum RAM */
 316#define CONFIG_SPL_BSS_MAX_SIZE         0x80000         /* 512 KB */
 317
 318/* MMC boot config */
 319#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
 320#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS      0x200 /* 256 KB */
 321#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION    1
 322#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME        "u-boot.img"
 323
 324#define CONFIG_SPL_BOARD_INIT
 325#define CONFIG_SPL_LIBCOMMON_SUPPORT
 326#define CONFIG_SPL_LIBDISK_SUPPORT
 327#define CONFIG_SPL_I2C_SUPPORT
 328#define CONFIG_SPL_LIBGENERIC_SUPPORT
 329#define CONFIG_SPL_MMC_SUPPORT
 330#define CONFIG_SPL_FAT_SUPPORT
 331#define CONFIG_SPL_SERIAL_SUPPORT
 332
 333#define CONFIG_SPL_POWER_SUPPORT
 334#define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
 335
 336#ifdef CONFIG_BOOT_ONENAND
 337#define CONFIG_SPL_ONENAND_SUPPORT
 338
 339/* OneNAND boot config */
 340#define CONFIG_SYS_ONENAND_U_BOOT_OFFS  0x80000
 341#define CONFIG_SYS_ONENAND_PAGE_SIZE    2048
 342#define CONFIG_SPL_ONENAND_LOAD_ADDR    0x80000
 343#define CONFIG_SPL_ONENAND_LOAD_SIZE    \
 344        (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
 345
 346#endif
 347
 348#ifdef CONFIG_BOOT_NAND
 349#define CONFIG_SPL_NAND_SUPPORT
 350#define CONFIG_SPL_NAND_BASE
 351#define CONFIG_SPL_NAND_DRIVERS
 352#define CONFIG_SPL_NAND_ECC
 353
 354/* NAND boot config */
 355#define CONFIG_SYS_NAND_5_ADDR_CYCLE
 356#define CONFIG_SYS_NAND_PAGE_COUNT      64
 357#define CONFIG_SYS_NAND_PAGE_SIZE       2048
 358#define CONFIG_SYS_NAND_OOBSIZE         64
 359#define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
 360#define CONFIG_SYS_NAND_BAD_BLOCK_POS   0
 361#define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9,\
 362                                                10, 11, 12, 13}
 363#define CONFIG_SYS_NAND_ECCSIZE         512
 364#define CONFIG_SYS_NAND_ECCBYTES        3
 365#define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
 366#define CONFIG_SYS_NAND_U_BOOT_OFFS     0x80000
 367#endif
 368
 369#endif /* __IGEP00X0_H */
 370