1/* 2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 3 * 4 * (C) Copyright 2009 Freescale Semiconductor, Inc. 5 * 6 * Configuration settings for the MX51EVK Board 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License as 10 * published by the Free Software Foundation; either version 2 of 11 * the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * You should have received a copy of the GNU General Public License 19 * along with this program; if not, write to the Free Software 20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 21 * MA 02111-1307 USA 22 */ 23 24#ifndef __CONFIG_H 25#define __CONFIG_H 26 27#include <config_cmd_default.h> 28 29/* 30 * High Level Board Configuration Options 31 */ 32/* An i.MX51 CPU */ 33#define CONFIG_MX51 34 35#define machine_is_efikamx() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKAMX) 36#define machine_is_efikasb() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKASB) 37 38#include <asm/arch/imx-regs.h> 39 40#define CONFIG_DISPLAY_CPUINFO 41#define CONFIG_DISPLAY_BOARDINFO 42 43#define CONFIG_SYS_TEXT_BASE 0x97800000 44 45#define CONFIG_L2_OFF 46#define CONFIG_SYS_ICACHE_OFF 47#define CONFIG_SYS_DCACHE_OFF 48 49/* 50 * Bootloader Components Configuration 51 */ 52#define CONFIG_CMD_SPI 53#define CONFIG_CMD_SF 54#define CONFIG_CMD_MMC 55#define CONFIG_CMD_FAT 56#define CONFIG_CMD_EXT2 57#define CONFIG_CMD_IDE 58#define CONFIG_CMD_NET 59#define CONFIG_CMD_DATE 60#undef CONFIG_CMD_IMLS 61 62/* 63 * Environmental settings 64 */ 65 66#define CONFIG_ENV_OFFSET (6 * 64 * 1024) 67#define CONFIG_ENV_SECT_SIZE (1 * 64 * 1024) 68#define CONFIG_ENV_SIZE (4 * 1024) 69 70/* 71 * ATAG setup 72 */ 73#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 74#define CONFIG_REVISION_TAG 75#define CONFIG_SETUP_MEMORY_TAGS 76#define CONFIG_INITRD_TAG 77 78#define CONFIG_OF_LIBFDT 1 79 80/* 81 * Size of malloc() pool 82 */ 83#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 84 85#define CONFIG_BOARD_EARLY_INIT_F 86#define CONFIG_BOARD_LATE_INIT 87 88/* 89 * Hardware drivers 90 */ 91#define CONFIG_MXC_UART 92#define CONFIG_MXC_UART_BASE UART1_BASE 93#define CONFIG_CONS_INDEX 1 94#define CONFIG_BAUDRATE 115200 95 96#define CONFIG_MXC_GPIO 97 98/* 99 * SPI Interface 100 */ 101#ifdef CONFIG_CMD_SPI 102 103#define CONFIG_HARD_SPI 104#define CONFIG_MXC_SPI 105#define CONFIG_DEFAULT_SPI_BUS 1 106#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH) 107 108/* SPI FLASH */ 109#ifdef CONFIG_CMD_SF 110 111#define CONFIG_SPI_FLASH 112#define CONFIG_SPI_FLASH_SST 113#define CONFIG_SF_DEFAULT_CS (1 | 121 << 8) 114#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 115#define CONFIG_SF_DEFAULT_SPEED 25000000 116 117#define CONFIG_ENV_SPI_CS (1 | 121 << 8) 118#define CONFIG_ENV_SPI_BUS 0 119#define CONFIG_ENV_SPI_MAX_HZ 25000000 120#define CONFIG_ENV_SPI_MODE (SPI_MODE_0) 121#define CONFIG_FSL_ENV_IN_SF 122#define CONFIG_ENV_IS_IN_SPI_FLASH 123#define CONFIG_SYS_NO_FLASH 124 125#else 126#define CONFIG_ENV_IS_NOWHERE 127#endif 128 129/* SPI PMIC */ 130#define CONFIG_POWER 131#define CONFIG_POWER_SPI 132#define CONFIG_POWER_FSL 133#define CONFIG_FSL_PMIC_BUS 0 134#define CONFIG_FSL_PMIC_CS (0 | 120 << 8) 135#define CONFIG_FSL_PMIC_CLK 25000000 136#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH) 137#define CONFIG_FSL_PMIC_BITLEN 32 138#define CONFIG_RTC_MC13XXX 139#endif 140 141/* 142 * MMC Configs 143 */ 144#ifdef CONFIG_CMD_MMC 145#define CONFIG_MMC 146#define CONFIG_GENERIC_MMC 147#define CONFIG_FSL_ESDHC 148#define CONFIG_SYS_FSL_ESDHC_ADDR 0 149#define CONFIG_SYS_FSL_ESDHC_NUM 2 150#endif 151 152/* 153 * ATA/IDE 154 */ 155#ifdef CONFIG_CMD_IDE 156#define CONFIG_LBA48 157#undef CONFIG_IDE_LED 158#undef CONFIG_IDE_RESET 159 160#define CONFIG_MX51_PATA 161 162#define __io 163 164#define CONFIG_SYS_IDE_MAXBUS 1 165#define CONFIG_SYS_IDE_MAXDEVICE 1 166 167#define CONFIG_SYS_ATA_BASE_ADDR 0x83fe0000 168#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0 169 170#define CONFIG_SYS_ATA_DATA_OFFSET 0xa0 171#define CONFIG_SYS_ATA_REG_OFFSET 0xa0 172#define CONFIG_SYS_ATA_ALT_OFFSET 0xd8 173 174#define CONFIG_SYS_ATA_STRIDE 4 175 176#define CONFIG_IDE_PREINIT 177#define CONFIG_MXC_ATA_PIO_MODE 4 178#endif 179 180/* 181 * USB 182 */ 183#define CONFIG_CMD_USB 184#ifdef CONFIG_CMD_USB 185#define CONFIG_USB_EHCI /* Enable EHCI USB support */ 186#define CONFIG_USB_EHCI_MX5 187#define CONFIG_USB_ULPI 188#define CONFIG_USB_ULPI_VIEWPORT 189#define CONFIG_MXC_USB_PORT 1 190#if (CONFIG_MXC_USB_PORT == 0) 191#define CONFIG_MXC_USB_PORTSC (1 << 28) 192#define CONFIG_MXC_USB_FLAGS MXC_EHCI_INTERNAL_PHY 193#else 194#define CONFIG_MXC_USB_PORTSC (2 << 30) 195#define CONFIG_MXC_USB_FLAGS 0 196#endif 197#define CONFIG_EHCI_IS_TDI 198#define CONFIG_USB_STORAGE 199#define CONFIG_USB_HOST_ETHER 200#define CONFIG_USB_KEYBOARD 201#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 202#define CONFIG_PREBOOT 203/* USB NET */ 204#ifdef CONFIG_CMD_NET 205#define CONFIG_USB_ETHER_ASIX 206#define CONFIG_CMD_PING 207#define CONFIG_CMD_DHCP 208#endif 209#endif /* CONFIG_CMD_USB */ 210 211/* 212 * Filesystems 213 */ 214#ifdef CONFIG_CMD_FAT 215#define CONFIG_DOS_PARTITION 216#ifdef CONFIG_CMD_NET 217#define CONFIG_CMD_NFS 218#endif 219#endif 220 221/* 222 * Miscellaneous configurable options 223 */ 224#define CONFIG_ENV_OVERWRITE 225#define CONFIG_BOOTDELAY 3 226#define CONFIG_LOADADDR 0x90800000 227 228#define CONFIG_SYS_LONGHELP /* undef to save memory */ 229#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 230#define CONFIG_SYS_PROMPT "Efika> " 231#define CONFIG_AUTO_COMPLETE 232#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 233/* Print Buffer Size */ 234#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 235#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 236#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 237 238#define CONFIG_SYS_MEMTEST_START 0x90000000 239#define CONFIG_SYS_MEMTEST_END 0x90010000 240 241#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 242 243#define CONFIG_SYS_HZ 1000 244#define CONFIG_CMDLINE_EDITING 245 246/*----------------------------------------------------------------------- 247 * Physical Memory Map 248 */ 249#define CONFIG_NR_DRAM_BANKS 1 250#define PHYS_SDRAM_1 CSD0_BASE_ADDR 251#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 252 253#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 254#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 255#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 256 257#define CONFIG_SYS_INIT_SP_OFFSET \ 258 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 259#define CONFIG_SYS_INIT_SP_ADDR \ 260 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 261 262#define CONFIG_SYS_DDR_CLKSEL 0 263#define CONFIG_SYS_CLKTL_CBCDR 0x59E35145 264#define CONFIG_SYS_MAIN_PWR_ON 265 266#endif 267