1/* 2 * Copyright (C) 2012 Altera Corporation <www.altera.com> 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program. If not, see <http://www.gnu.org/licenses/>. 16 */ 17#ifndef __CONFIG_H 18#define __CONFIG_H 19 20#include <asm/arch/socfpga_base_addrs.h> 21 22/* 23 * High level configuration 24 */ 25 26#define CONFIG_ARMV7 27#define CONFIG_L2_OFF 28#define CONFIG_SYS_DCACHE_OFF 29#undef CONFIG_USE_IRQ 30 31#define CONFIG_MISC_INIT_R 32#define CONFIG_SINGLE_BOOTLOADER 33#define CONFIG_SOCFPGA 34 35#define CONFIG_SYS_TEXT_BASE 0x08000040 36#define V_NS16550_CLK 1000000 37#define CONFIG_BAUDRATE 57600 38#define CONFIG_SYS_HZ 1000 39#define CONFIG_TIMER_CLOCK_KHZ 2400 40#define CONFIG_SYS_LOAD_ADDR 0x7fc0 41 42/* Console I/O Buffer Size */ 43#define CONFIG_SYS_CBSIZE 256 44/* Monitor Command Prompt */ 45#define CONFIG_SYS_PROMPT "SOCFPGA_CYCLONE5 # " 46#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 47 sizeof(CONFIG_SYS_PROMPT) + 16) 48 49/* 50 * Display CPU and Board Info 51 */ 52#define CONFIG_DISPLAY_CPUINFO 53#define CONFIG_DISPLAY_BOARDINFO 54 55/* 56 * Enable early stage initialization at C environment 57 */ 58#define CONFIG_BOARD_EARLY_INIT_F 59 60/* flat device tree */ 61#define CONFIG_OF_LIBFDT 62/* skip updating the FDT blob */ 63#define CONFIG_FDT_BLOB_SKIP_UPDATE 64/* Initial Memory map size for Linux, minus 4k alignment for DFT blob */ 65#define CONFIG_SYS_BOOTMAPSZ ((256*1024*1024) - (4*1024)) 66 67#define CONFIG_SPL_RAM_DEVICE 68#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR 69#define CONFIG_SYS_SPL_MALLOC_START ((unsigned long) (&__malloc_start)) 70#define CONFIG_SYS_SPL_MALLOC_SIZE (&__malloc_end - &__malloc_start) 71 72/* 73 * Memory allocation (MALLOC) 74 */ 75/* Room required on the stack for the environment data */ 76#define CONFIG_ENV_SIZE 1024 77/* Size of DRAM reserved for malloc() use */ 78#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 128*1024) 79 80/* SP location before relocation, must use scratch RAM */ 81#define CONFIG_SYS_INIT_RAM_ADDR 0xFFFF0000 82/* Reserving 0x100 space at back of scratch RAM for debug info */ 83#define CONFIG_SYS_INIT_RAM_SIZE (0x10000 - 0x100) 84/* Stack pointer prior relocation, must situated at on-chip RAM */ 85#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 86 CONFIG_SYS_INIT_RAM_SIZE - \ 87 GENERATED_GBL_DATA_SIZE) 88 89 90/* 91 * Command line configuration. 92 */ 93#define CONFIG_SYS_NO_FLASH 94#include <config_cmd_default.h> 95/* FAT file system support */ 96#define CONFIG_CMD_FAT 97 98 99/* 100 * Misc 101 */ 102#define CONFIG_DOS_PARTITION 1 103 104#ifdef CONFIG_SPL_BUILD 105#undef CONFIG_PARTITIONS 106#endif 107 108/* 109 * Environment setup 110 */ 111 112/* Delay before automatically booting the default image */ 113#define CONFIG_BOOTDELAY 3 114/* Enable auto completion of commands using TAB */ 115#define CONFIG_AUTO_COMPLETE 116/* use "hush" command parser */ 117#define CONFIG_SYS_HUSH_PARSER 118#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 119#define CONFIG_CMD_RUN 120 121#define CONFIG_BOOTCOMMAND "run ramboot" 122 123/* 124 * arguments passed to the bootm command. The value of 125 * CONFIG_BOOTARGS goes into the environment value "bootargs". 126 * Do note the value will overide also the chosen node in FDT blob. 127 */ 128#define CONFIG_BOOTARGS "console=ttyS0,57600,mem=256M@0x0" 129 130#define CONFIG_EXTRA_ENV_SETTINGS \ 131 "verify=n\0" \ 132 "loadaddr= " __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ 133 "ramboot=setenv bootargs " CONFIG_BOOTARGS ";" \ 134 "bootm ${loadaddr} - ${fdt_addr}\0" \ 135 "bootimage=uImage\0" \ 136 "fdt_addr=100\0" \ 137 "fsloadcmd=ext2load\0" \ 138 "bootm ${loadaddr} - ${fdt_addr}\0" \ 139 "qspiroot=/dev/mtdblock0\0" \ 140 "qspirootfstype=jffs2\0" \ 141 "qspiboot=setenv bootargs " CONFIG_BOOTARGS \ 142 " root=${qspiroot} rw rootfstype=${qspirootfstype};"\ 143 "bootm ${loadaddr} - ${fdt_addr}\0" 144 145/* using environment setting for stdin, stdout, stderr */ 146#define CONFIG_SYS_CONSOLE_IS_IN_ENV 147/* Enable the call to overwrite_console() */ 148#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 149/* Enable overwrite of previous console environment settings */ 150#define CONFIG_SYS_CONSOLE_ENV_OVERWRITE 151 152/* max number of command args */ 153#define CONFIG_SYS_MAXARGS 16 154 155 156/* 157 * Hardware drivers 158 */ 159 160/* 161 * SDRAM Memory Map 162 */ 163/* We have 1 bank of DRAM */ 164#define CONFIG_NR_DRAM_BANKS 1 165/* SDRAM Bank #1 */ 166#define CONFIG_SYS_SDRAM_BASE 0x00000000 167/* SDRAM memory size */ 168#define PHYS_SDRAM_1_SIZE 0x80000000 169 170#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE 171#define CONFIG_SYS_MEMTEST_START 0x00000000 172#define CONFIG_SYS_MEMTEST_END PHYS_SDRAM_1_SIZE 173 174/* 175 * NS16550 Configuration 176 */ 177#define UART0_BASE SOCFPGA_UART0_ADDRESS 178#define CONFIG_SYS_NS16550 179#define CONFIG_SYS_NS16550_SERIAL 180#define CONFIG_SYS_NS16550_REG_SIZE -4 181#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK 182#define CONFIG_CONS_INDEX 1 183#define CONFIG_SYS_NS16550_COM1 UART0_BASE 184 185#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} 186 187/* 188 * FLASH 189 */ 190#define CONFIG_SYS_NO_FLASH 191 192/* 193 * L4 OSC1 Timer 0 194 */ 195/* This timer use eosc1 where the clock frequency is fixed 196 * throughout any condition */ 197#define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS 198 199/* reload value when timer count to zero */ 200#define TIMER_LOAD_VAL 0xFFFFFFFF 201 202#define CONFIG_ENV_IS_NOWHERE 203 204/* 205 * SPL "Second Program Loader" aka Initial Software 206 */ 207 208/* Enable building of SPL globally */ 209#define CONFIG_SPL 210#define CONFIG_SPL_FRAMEWORK 211 212/* TEXT_BASE for linking the SPL binary */ 213#define CONFIG_SPL_TEXT_BASE 0xFFFF0000 214 215/* Stack size for SPL */ 216#define CONFIG_SPL_STACK_SIZE (4 * 1024) 217 218/* MALLOC size for SPL */ 219#define CONFIG_SPL_MALLOC_SIZE (5 * 1024) 220 221#define CONFIG_SPL_SERIAL_SUPPORT 222#define CONFIG_SPL_BOARD_INIT 223 224#define CHUNKSZ_CRC32 (1 * 1024) 225 226#define CONFIG_CRC32_VERIFY 227 228/* Linker script for SPL */ 229#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/socfpga/u-boot-spl.lds" 230 231/* Support for common/libcommon.o in SPL binary */ 232#define CONFIG_SPL_LIBCOMMON_SUPPORT 233/* Support for lib/libgeneric.o in SPL binary */ 234#define CONFIG_SPL_LIBGENERIC_SUPPORT 235 236#endif /* __CONFIG_H */ 237