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20#include <common.h>
21#include <div64.h>
22#include <asm/io.h>
23#include <faraday/ftpmu010.h>
24#include <faraday/fttmr010.h>
25
26DECLARE_GLOBAL_DATA_PTR;
27
28#define TIMER_CLOCK 32768
29#define TIMER_LOAD_VAL 0xffffffff
30
31static inline unsigned long long tick_to_time(unsigned long long tick)
32{
33 tick *= CONFIG_SYS_HZ;
34 do_div(tick, gd->arch.timer_rate_hz);
35
36 return tick;
37}
38
39static inline unsigned long long usec_to_tick(unsigned long long usec)
40{
41 usec *= gd->arch.timer_rate_hz;
42 do_div(usec, 1000000);
43
44 return usec;
45}
46
47int timer_init(void)
48{
49 struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE;
50 unsigned int cr;
51
52 debug("%s()\n", __func__);
53
54
55 writel(0, &tmr->cr);
56
57
58 ftpmu010_32768osc_enable();
59
60
61 writel(TIMER_LOAD_VAL, &tmr->timer3_load);
62 writel(TIMER_LOAD_VAL, &tmr->timer3_counter);
63 writel(0, &tmr->timer3_match1);
64 writel(0, &tmr->timer3_match2);
65
66
67 writel(FTTMR010_TM3_MATCH1 |
68 FTTMR010_TM3_MATCH2 |
69 FTTMR010_TM3_OVERFLOW,
70 &tmr->interrupt_mask);
71
72 cr = readl(&tmr->cr);
73 cr |= FTTMR010_TM3_CLOCK;
74 cr |= FTTMR010_TM3_ENABLE;
75 writel(cr, &tmr->cr);
76
77 gd->arch.timer_rate_hz = TIMER_CLOCK;
78 gd->arch.tbu = gd->arch.tbl = 0;
79
80 return 0;
81}
82
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84
85
86unsigned long long get_ticks(void)
87{
88 struct fttmr010 *tmr = (struct fttmr010 *)CONFIG_FTTMR010_BASE;
89 ulong now = TIMER_LOAD_VAL - readl(&tmr->timer3_counter);
90
91
92 if (now < gd->arch.tbl)
93 gd->arch.tbu++;
94 gd->arch.tbl = now;
95 return (((unsigned long long)gd->arch.tbu) << 32) | gd->arch.tbl;
96}
97
98void __udelay(unsigned long usec)
99{
100 unsigned long long start;
101 ulong tmo;
102
103 start = get_ticks();
104 tmo = usec_to_tick(usec);
105 while ((get_ticks() - start) < tmo)
106 ;
107}
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118
119ulong get_timer(ulong base)
120{
121 return tick_to_time(get_ticks()) - base;
122}
123
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126
127ulong get_tbclk(void)
128{
129 return gd->arch.timer_rate_hz;
130}
131