1/* 2 * Copyright (C) 2012 Samsung Electronics 3 * 4 * Author: InKi Dae <inki.dae@samsung.com> 5 * Author: Donghwa Lee <dh09.lee@samsung.com> 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License as 9 * published by the Free Software Foundation; either version 2 of 10 * the License, or (at your option) any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; if not, write to the Free Software 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 20 * MA 02111-1307 USA 21 */ 22 23#ifndef _DSIM_H 24#define _DSIM_H 25 26#include <linux/list.h> 27#include <linux/fb.h> 28 29#define PANEL_NAME_SIZE (32) 30 31enum mipi_dsim_interface_type { 32 DSIM_COMMAND, 33 DSIM_VIDEO 34}; 35 36enum mipi_dsim_virtual_ch_no { 37 DSIM_VIRTUAL_CH_0, 38 DSIM_VIRTUAL_CH_1, 39 DSIM_VIRTUAL_CH_2, 40 DSIM_VIRTUAL_CH_3 41}; 42 43enum mipi_dsim_burst_mode_type { 44 DSIM_NON_BURST_SYNC_EVENT, 45 DSIM_BURST_SYNC_EVENT, 46 DSIM_NON_BURST_SYNC_PULSE, 47 DSIM_BURST, 48 DSIM_NON_VIDEO_MODE 49}; 50 51enum mipi_dsim_no_of_data_lane { 52 DSIM_DATA_LANE_1, 53 DSIM_DATA_LANE_2, 54 DSIM_DATA_LANE_3, 55 DSIM_DATA_LANE_4 56}; 57 58enum mipi_dsim_byte_clk_src { 59 DSIM_PLL_OUT_DIV8, 60 DSIM_EXT_CLK_DIV8, 61 DSIM_EXT_CLK_BYPASS 62}; 63 64enum mipi_dsim_pixel_format { 65 DSIM_CMD_3BPP, 66 DSIM_CMD_8BPP, 67 DSIM_CMD_12BPP, 68 DSIM_CMD_16BPP, 69 DSIM_VID_16BPP_565, 70 DSIM_VID_18BPP_666PACKED, 71 DSIM_18BPP_666LOOSELYPACKED, 72 DSIM_24BPP_888 73}; 74 75/* MIPI DSI Processor-to-Peripheral transaction types */ 76enum { 77 MIPI_DSI_V_SYNC_START = 0x01, 78 MIPI_DSI_V_SYNC_END = 0x11, 79 MIPI_DSI_H_SYNC_START = 0x21, 80 MIPI_DSI_H_SYNC_END = 0x31, 81 82 MIPI_DSI_COLOR_MODE_OFF = 0x02, 83 MIPI_DSI_COLOR_MODE_ON = 0x12, 84 MIPI_DSI_SHUTDOWN_PERIPHERAL = 0x22, 85 MIPI_DSI_TURN_ON_PERIPHERAL = 0x32, 86 87 MIPI_DSI_GENERIC_SHORT_WRITE_0_PARAM = 0x03, 88 MIPI_DSI_GENERIC_SHORT_WRITE_1_PARAM = 0x13, 89 MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM = 0x23, 90 91 MIPI_DSI_GENERIC_READ_REQUEST_0_PARAM = 0x04, 92 MIPI_DSI_GENERIC_READ_REQUEST_1_PARAM = 0x14, 93 MIPI_DSI_GENERIC_READ_REQUEST_2_PARAM = 0x24, 94 95 MIPI_DSI_DCS_SHORT_WRITE = 0x05, 96 MIPI_DSI_DCS_SHORT_WRITE_PARAM = 0x15, 97 98 MIPI_DSI_DCS_READ = 0x06, 99 100 MIPI_DSI_SET_MAXIMUM_RETURN_PACKET_SIZE = 0x37, 101 102 MIPI_DSI_END_OF_TRANSMISSION = 0x08, 103 104 MIPI_DSI_NULL_PACKET = 0x09, 105 MIPI_DSI_BLANKING_PACKET = 0x19, 106 MIPI_DSI_GENERIC_LONG_WRITE = 0x29, 107 MIPI_DSI_DCS_LONG_WRITE = 0x39, 108 109 MIPI_DSI_LOOSELY_PACKED_PIXEL_STREAM_YCBCR20 = 0x0c, 110 MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR24 = 0x1c, 111 MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR16 = 0x2c, 112 113 MIPI_DSI_PACKED_PIXEL_STREAM_30 = 0x0d, 114 MIPI_DSI_PACKED_PIXEL_STREAM_36 = 0x1d, 115 MIPI_DSI_PACKED_PIXEL_STREAM_YCBCR12 = 0x3d, 116 117 MIPI_DSI_PACKED_PIXEL_STREAM_16 = 0x0e, 118 MIPI_DSI_PACKED_PIXEL_STREAM_18 = 0x1e, 119 MIPI_DSI_PIXEL_STREAM_3BYTE_18 = 0x2e, 120 MIPI_DSI_PACKED_PIXEL_STREAM_24 = 0x3e, 121}; 122 123/* 124 * struct mipi_dsim_config - interface for configuring mipi-dsi controller. 125 * 126 * @auto_flush: enable or disable Auto flush of MD FIFO using VSYNC pulse. 127 * @eot_disable: enable or disable EoT packet in HS mode. 128 * @auto_vertical_cnt: specifies auto vertical count mode. 129 * in Video mode, the vertical line transition uses line counter 130 * configured by VSA, VBP, and Vertical resolution. 131 * If this bit is set to '1', the line counter does not use VSA and VBP 132 * registers.(in command mode, this variable is ignored) 133 * @hse: set horizontal sync event mode. 134 * In VSYNC pulse and Vporch area, MIPI DSI master transfers only HSYNC 135 * start packet to MIPI DSI slave at MIPI DSI spec1.1r02. 136 * this bit transfers HSYNC end packet in VSYNC pulse and Vporch area 137 * (in mommand mode, this variable is ignored) 138 * @hfp: specifies HFP disable mode. 139 * if this variable is set, DSI master ignores HFP area in VIDEO mode. 140 * (in command mode, this variable is ignored) 141 * @hbp: specifies HBP disable mode. 142 * if this variable is set, DSI master ignores HBP area in VIDEO mode. 143 * (in command mode, this variable is ignored) 144 * @hsa: specifies HSA disable mode. 145 * if this variable is set, DSI master ignores HSA area in VIDEO mode. 146 * (in command mode, this variable is ignored) 147 * @e_interface: specifies interface to be used.(CPU or RGB interface) 148 * @e_virtual_ch: specifies virtual channel number that main or 149 * sub diaplsy uses. 150 * @e_pixel_format: specifies pixel stream format for main or sub display. 151 * @e_burst_mode: selects Burst mode in Video mode. 152 * in Non-burst mode, RGB data area is filled with RGB data and NULL 153 * packets, according to input bandwidth of RGB interface. 154 * In Burst mode, RGB data area is filled with RGB data only. 155 * @e_no_data_lane: specifies data lane count to be used by Master. 156 * @e_byte_clk: select byte clock source. (it must be DSIM_PLL_OUT_DIV8) 157 * DSIM_EXT_CLK_DIV8 and DSIM_EXT_CLK_BYPASSS are not supported. 158 * @pll_stable_time: specifies the PLL Timer for stability of the ganerated 159 * clock(System clock cycle base) 160 * if the timer value goes to 0x00000000, the clock stable bit of status 161 * and interrupt register is set. 162 * @esc_clk: specifies escape clock frequency for getting the escape clock 163 * prescaler value. 164 * @stop_holding_cnt: specifies the interval value between transmitting 165 * read packet(or write "set_tear_on" command) and BTA request. 166 * after transmitting read packet or write "set_tear_on" command, 167 * BTA requests to D-PHY automatically. this counter value specifies 168 * the interval between them. 169 * @bta_timeout: specifies the timer for BTA. 170 * this register specifies time out from BTA request to change 171 * the direction with respect to Tx escape clock. 172 * @rx_timeout: specifies the timer for LP Rx mode timeout. 173 * this register specifies time out on how long RxValid deasserts, 174 * after RxLpdt asserts with respect to Tx escape clock. 175 * - RxValid specifies Rx data valid indicator. 176 * - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode. 177 * - RxValid and RxLpdt specifies signal from D-PHY. 178 */ 179struct mipi_dsim_config { 180 unsigned char auto_flush; 181 unsigned char eot_disable; 182 183 unsigned char auto_vertical_cnt; 184 unsigned char hse; 185 unsigned char hfp; 186 unsigned char hbp; 187 unsigned char hsa; 188 189 enum mipi_dsim_interface_type e_interface; 190 enum mipi_dsim_virtual_ch_no e_virtual_ch; 191 enum mipi_dsim_pixel_format e_pixel_format; 192 enum mipi_dsim_burst_mode_type e_burst_mode; 193 enum mipi_dsim_no_of_data_lane e_no_data_lane; 194 enum mipi_dsim_byte_clk_src e_byte_clk; 195 196 /* 197 * =========================================== 198 * | P | M | S | MHz | 199 * ------------------------------------------- 200 * | 3 | 100 | 3 | 100 | 201 * | 3 | 100 | 2 | 200 | 202 * | 3 | 63 | 1 | 252 | 203 * | 4 | 100 | 1 | 300 | 204 * | 4 | 110 | 1 | 330 | 205 * | 12 | 350 | 1 | 350 | 206 * | 3 | 100 | 1 | 400 | 207 * | 4 | 150 | 1 | 450 | 208 * | 6 | 118 | 1 | 472 | 209 * | 3 | 120 | 1 | 480 | 210 * | 12 | 250 | 0 | 500 | 211 * | 4 | 100 | 0 | 600 | 212 * | 3 | 81 | 0 | 648 | 213 * | 3 | 88 | 0 | 704 | 214 * | 3 | 90 | 0 | 720 | 215 * | 3 | 100 | 0 | 800 | 216 * | 12 | 425 | 0 | 850 | 217 * | 4 | 150 | 0 | 900 | 218 * | 12 | 475 | 0 | 950 | 219 * | 6 | 250 | 0 | 1000 | 220 * ------------------------------------------- 221 */ 222 223 /* 224 * pms could be calculated as the following. 225 * M * 24 / P * 2 ^ S = MHz 226 */ 227 unsigned char p; 228 unsigned short m; 229 unsigned char s; 230 231 unsigned int pll_stable_time; 232 unsigned long esc_clk; 233 234 unsigned short stop_holding_cnt; 235 unsigned char bta_timeout; 236 unsigned short rx_timeout; 237}; 238 239/* 240 * struct mipi_dsim_device - global interface for mipi-dsi driver. 241 * 242 * @dsim_config: infomation for configuring mipi-dsi controller. 243 * @master_ops: callbacks to mipi-dsi operations. 244 * @dsim_lcd_dev: pointer to activated ddi device. 245 * (it would be registered by mipi-dsi driver.) 246 * @dsim_lcd_drv: pointer to activated_ddi driver. 247 * (it would be registered by mipi-dsi driver.) 248 * @state: specifies status of MIPI-DSI controller. 249 * the status could be RESET, INIT, STOP, HSCLKEN and ULPS. 250 * @data_lane: specifiec enabled data lane number. 251 * this variable would be set by driver according to e_no_data_lane 252 * automatically. 253 * @e_clk_src: select byte clock source. 254 * @pd: pointer to MIPI-DSI driver platform data. 255 */ 256struct mipi_dsim_device { 257 struct mipi_dsim_config *dsim_config; 258 struct mipi_dsim_master_ops *master_ops; 259 struct mipi_dsim_lcd_device *dsim_lcd_dev; 260 struct mipi_dsim_lcd_driver *dsim_lcd_drv; 261 262 unsigned int state; 263 unsigned int data_lane; 264 enum mipi_dsim_byte_clk_src e_clk_src; 265 266 struct exynos_platform_mipi_dsim *pd; 267}; 268 269/* 270 * struct exynos_platform_mipi_dsim - interface to platform data 271 * for mipi-dsi driver. 272 * 273 * @lcd_panel_name: specifies lcd panel name registered to mipi-dsi driver. 274 * lcd panel driver searched would be actived. 275 * @dsim_config: pointer of structure for configuring mipi-dsi controller. 276 * @lcd_panel_info: pointer for lcd panel specific structure. 277 * this structure specifies width, height, timing and polarity and so on. 278 * @lcd_power: callback pointer for enabling or disabling lcd power. 279 * @mipi_power: callback pointer for enabling or disabling mipi power. 280 * @phy_enable: pointer to a callback controlling D-PHY enable/reset 281 */ 282struct exynos_platform_mipi_dsim { 283 char lcd_panel_name[PANEL_NAME_SIZE]; 284 285 struct mipi_dsim_config *dsim_config; 286 void *lcd_panel_info; 287 288 int (*lcd_power)(void); 289 int (*mipi_power)(void); 290 void (*phy_enable)(unsigned int dev_index, unsigned int enable); 291}; 292 293/* 294 * struct mipi_dsim_master_ops - callbacks to mipi-dsi operations. 295 * 296 * @cmd_write: transfer command to lcd panel at LP mode. 297 * @cmd_read: read command from rx register. 298 * @get_dsim_frame_done: get the status that all screen data have been 299 * transferred to mipi-dsi. 300 * @clear_dsim_frame_done: clear frame done status. 301 * @get_fb_frame_done: get frame done status of display controller. 302 * @trigger: trigger display controller. 303 * - this one would be used only in case of CPU mode. 304 */ 305struct mipi_dsim_master_ops { 306 int (*cmd_write)(struct mipi_dsim_device *dsim, unsigned int data_id, 307 unsigned int data0, unsigned int data1); 308 int (*cmd_read)(struct mipi_dsim_device *dsim, unsigned int data_id, 309 unsigned int data0, unsigned int data1); 310 int (*get_dsim_frame_done)(struct mipi_dsim_device *dsim); 311 int (*clear_dsim_frame_done)(struct mipi_dsim_device *dsim); 312 313 int (*get_fb_frame_done)(void); 314 void (*trigger)(struct fb_info *info); 315}; 316 317/* 318 * device structure for mipi-dsi based lcd panel. 319 * 320 * @name: name of the device to use with this device, or an 321 * alias for that name. 322 * @id: id of device to be registered. 323 * @bus_id: bus id for identifing connected bus 324 * and this bus id should be same as id of mipi_dsim_device. 325 * @master: pointer to mipi-dsi master device object. 326 * @platform_data: lcd panel specific platform data. 327 */ 328struct mipi_dsim_lcd_device { 329 char *name; 330 int id; 331 int bus_id; 332 int reverse_panel; 333 334 struct mipi_dsim_device *master; 335 void *platform_data; 336}; 337 338/* 339 * driver structure for mipi-dsi based lcd panel. 340 * 341 * this structure should be registered by lcd panel driver. 342 * mipi-dsi driver seeks lcd panel registered through name field 343 * and calls these callback functions in appropriate time. 344 * 345 * @name: name of the driver to use with this device, or an 346 * alias for that name. 347 * @id: id of driver to be registered. 348 * this id would be used for finding device object registered. 349 * @mipi_panel_init: callback pointer for initializing lcd panel based on mipi 350 * dsi interface. 351 * @mipi_display_on: callback pointer for lcd panel display on. 352 */ 353struct mipi_dsim_lcd_driver { 354 char *name; 355 int id; 356 357 int (*mipi_panel_init)(struct mipi_dsim_device *dsim_dev); 358 void (*mipi_display_on)(struct mipi_dsim_device *dsim_dev); 359}; 360 361#ifdef CONFIG_EXYNOS_MIPI_DSIM 362int exynos_mipi_dsi_init(void); 363#else 364static inline int exynos_mipi_dsi_init(void) 365{ 366 return 0; 367} 368#endif 369 370/* 371 * register mipi_dsim_lcd_driver object defined by lcd panel driver 372 * to mipi-dsi driver. 373 */ 374int exynos_mipi_dsi_register_lcd_driver(struct mipi_dsim_lcd_driver 375 *lcd_drv); 376 377/* 378 * register mipi_dsim_lcd_device to mipi-dsi master. 379 */ 380int exynos_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device 381 *lcd_dev); 382 383void exynos_set_dsim_platform_data(struct exynos_platform_mipi_dsim *pd); 384 385/* panel driver init based on mipi dsi interface */ 386void s6e8ax0_init(void); 387 388#endif /* _DSIM_H */ 389