LXR uboot/arch/powerpc/cpu/mpc5xxx/cpu.c

   1/*
   2 * (C) Copyright 2000-2010
   3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 */
  23
  24/*
  25 * CPU specific code for the MPC5xxx CPUs
  26 */
  27
  28#include <common.h>
  29#include <watchdog.h>
  30#include <command.h>
  31#include <net.h>
  32#include <mpc5xxx.h>
  33#include <netdev.h>
  34#include <asm/io.h>
  35#include <asm/processor.h>
  36
  37#if defined(CONFIG_OF_LIBFDT)
  38#include <libfdt.h>
  39#include <fdt_support.h>
  40#endif
  41
  42#if defined(CONFIG_OF_IDE_FIXUP)
  43#include <ide.h>
  44#endif
  45
  46DECLARE_GLOBAL_DATA_PTR;
  47
  48int checkcpu (void)
  49{
  50        ulong clock = gd->cpu_clk;
  51        char buf[32];
  52        uint svr, pvr;
  53
  54        puts ("CPU:   ");
  55
  56        svr = get_svr();
  57        pvr = get_pvr();
  58
  59        switch (pvr) {
  60        case PVR_5200:
  61                printf("MPC5200");
  62                break;
  63        case PVR_5200B:
  64                printf("MPC5200B");
  65                break;
  66        default:
  67                printf("Unknown MPC5xxx");
  68                break;
  69        }
  70
  71        printf (" v%d.%d, Core v%d.%d", SVR_MJREV (svr), SVR_MNREV (svr),
  72                PVR_MAJ(pvr), PVR_MIN(pvr));
  73        printf (" at %s MHz\n", strmhz (buf, clock));
  74        return 0;
  75}
  76
  77/* ------------------------------------------------------------------------- */
  78
  79int
  80do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
  81{
  82        ulong msr;
  83        /* Interrupts and MMU off */
  84        __asm__ __volatile__ ("mfmsr    %0":"=r" (msr):);
  85
  86        msr &= ~(MSR_ME | MSR_EE | MSR_IR | MSR_DR);
  87        __asm__ __volatile__ ("mtmsr    %0"::"r" (msr));
  88
  89        /* Charge the watchdog timer */
  90        *(vu_long *)(MPC5XXX_GPT0_COUNTER) = 0x0001000f;
  91        *(vu_long *)(MPC5XXX_GPT0_ENABLE) = 0x9004; /* wden|ce|timer_ms */
  92        while(1);
  93
  94        return 1;
  95
  96}
  97
  98/* ------------------------------------------------------------------------- */
  99
 100/*
 101 * Get timebase clock frequency (like cpu_clk in Hz)
 102 *
 103 */
 104unsigned long get_tbclk (void)
 105{
 106        ulong tbclk;
 107
 108        tbclk = (gd->bus_clk + 3L) / 4L;
 109
 110        return (tbclk);
 111}
 112
 113/* ------------------------------------------------------------------------- */
 114
 115#if defined(CONFIG_OF_LIBFDT) && defined (CONFIG_OF_BOARD_SETUP)
 116void ft_cpu_setup(void *blob, bd_t *bd)
 117{
 118        int div = in_8((void*)CONFIG_SYS_MBAR + 0x204) & 0x0020 ? 8 : 4;
 119        char * cpu_path = "/cpus/" OF_CPU;
 120#ifdef CONFIG_MPC5xxx_FEC
 121        uchar enetaddr[6];
 122        char * eth_path = "/" OF_SOC "/ethernet@3000";
 123#endif
 124
 125        do_fixup_by_path_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
 126        do_fixup_by_path_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
 127        do_fixup_by_path_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1);
 128        do_fixup_by_path_u32(blob, "/" OF_SOC, "bus-frequency", bd->bi_ipbfreq, 1);
 129        do_fixup_by_path_u32(blob, "/" OF_SOC, "system-frequency",
 130                                bd->bi_busfreq*div, 1);
 131#ifdef CONFIG_MPC5xxx_FEC
 132        eth_getenv_enetaddr("ethaddr", enetaddr);
 133        do_fixup_by_path(blob, eth_path, "mac-address", enetaddr, 6, 0);
 134        do_fixup_by_path(blob, eth_path, "local-mac-address", enetaddr, 6, 0);
 135#endif
 136#if defined(CONFIG_OF_IDE_FIXUP)
 137        if (!ide_device_present(0)) {
 138                /* NO CF card detected -> delete ata node in DTS */
 139                int nodeoffset = 0;
 140                char nodename[] = "/soc5200@f0000000/ata@3a00";
 141
 142                nodeoffset = fdt_path_offset(blob, nodename);
 143                if (nodeoffset >= 0) {
 144                        fdt_del_node(blob, nodeoffset);
 145                } else {
 146                        printf("%s: cannot find %s node err:%s\n",
 147                                __func__, nodename, fdt_strerror(nodeoffset));
 148                }
 149        }
 150
 151#endif
 152        fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
 153}
 154#endif
 155
 156#ifdef CONFIG_MPC5xxx_FEC
 157/* Default initializations for FEC controllers.  To override,
 158 * create a board-specific function called:
 159 *      int board_eth_init(bd_t *bis)
 160 */
 161
 162int cpu_eth_init(bd_t *bis)
 163{
 164        return mpc5xxx_fec_initialize(bis);
 165}
 166#endif
 167
 168#if defined(CONFIG_WATCHDOG)
 169void watchdog_reset(void)
 170{
 171        int re_enable = disable_interrupts();
 172        reset_5xxx_watchdog();
 173        if (re_enable) enable_interrupts();
 174}
 175
 176void reset_5xxx_watchdog(void)
 177{
 178        volatile struct mpc5xxx_gpt *gpt0 =
 179                (struct mpc5xxx_gpt *) MPC5XXX_GPT;
 180
 181        /* Trigger TIMER_0 by writing A5 to OCPW */
 182        clrsetbits_be32(&gpt0->emsr, 0xff000000, 0xa5000000);
 183}
 184#endif  /* CONFIG_WATCHDOG */
 185