uboot/arch/powerpc/cpu/mpc5xxx/i2c.c
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   1/*
   2 * (C) Copyright 2003
   3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   4 *
   5 * See file CREDITS for list of people who contributed to this
   6 * project.
   7 *
   8 * This program is free software; you can redistribute it and/or
   9 * modify it under the terms of the GNU General Public License as
  10 * published by the Free Software Foundation; either version 2 of
  11 * the License, or (at your option) any later version.
  12 *
  13 * This program is distributed in the hope that it will be useful,
  14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16 * GNU General Public License for more details.
  17 *
  18 * You should have received a copy of the GNU General Public License
  19 * along with this program; if not, write to the Free Software
  20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  21 * MA 02111-1307 USA
  22 */
  23
  24#include <common.h>
  25
  26DECLARE_GLOBAL_DATA_PTR;
  27
  28#ifdef CONFIG_HARD_I2C
  29
  30#include <mpc5xxx.h>
  31#include <i2c.h>
  32
  33#if !defined(CONFIG_I2C_MULTI_BUS)
  34#if (CONFIG_SYS_I2C_MODULE == 2)
  35#define I2C_BASE        MPC5XXX_I2C2
  36#elif (CONFIG_SYS_I2C_MODULE == 1)
  37#define I2C_BASE        MPC5XXX_I2C1
  38#else
  39#error CONFIG_SYS_I2C_MODULE is not properly configured
  40#endif
  41#else
  42static unsigned int i2c_bus_num __attribute__ ((section (".data"))) =
  43                                                CONFIG_SYS_SPD_BUS_NUM;
  44static unsigned int i2c_bus_speed[2] = {CONFIG_SYS_I2C_SPEED,
  45                                        CONFIG_SYS_I2C_SPEED};
  46
  47static const  unsigned long i2c_dev[2] = {
  48        MPC5XXX_I2C1,
  49        MPC5XXX_I2C2,
  50};
  51
  52#define I2C_BASE        ((struct mpc5xxx_i2c *)i2c_dev[i2c_bus_num])
  53#endif
  54
  55#define I2C_TIMEOUT     6667
  56#define I2C_RETRIES     3
  57
  58struct mpc5xxx_i2c_tap {
  59        int scl2tap;
  60        int tap2tap;
  61};
  62
  63static int  mpc_reg_in    (volatile u32 *reg);
  64static void mpc_reg_out   (volatile u32 *reg, int val, int mask);
  65static int  wait_for_bb   (void);
  66static int  wait_for_pin  (int *status);
  67static int  do_address    (uchar chip, char rdwr_flag);
  68static int  send_bytes    (uchar chip, char *buf, int len);
  69static int  receive_bytes (uchar chip, char *buf, int len);
  70static int  mpc_get_fdr   (int);
  71
  72static int mpc_reg_in(volatile u32 *reg)
  73{
  74        int ret = *reg >> 24;
  75        __asm__ __volatile__ ("eieio");
  76        return ret;
  77}
  78
  79static void mpc_reg_out(volatile u32 *reg, int val, int mask)
  80{
  81        int tmp;
  82
  83        if (!mask) {
  84                *reg = val << 24;
  85        } else {
  86                tmp = mpc_reg_in(reg);
  87                *reg = ((tmp & ~mask) | (val & mask)) << 24;
  88        }
  89        __asm__ __volatile__ ("eieio");
  90
  91        return;
  92}
  93
  94static int wait_for_bb(void)
  95{
  96        struct mpc5xxx_i2c *regs    = (struct mpc5xxx_i2c *)I2C_BASE;
  97        int                 timeout = I2C_TIMEOUT;
  98        int                 status;
  99
 100        status = mpc_reg_in(&regs->msr);
 101
 102        while (timeout-- && (status & I2C_BB)) {
 103                mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
 104                (void)mpc_reg_in(&regs->mdr);
 105                mpc_reg_out(&regs->mcr, 0, I2C_STA);
 106                mpc_reg_out(&regs->mcr, 0, 0);
 107                mpc_reg_out(&regs->mcr, I2C_EN, 0);
 108                udelay(15);
 109                status = mpc_reg_in(&regs->msr);
 110        }
 111
 112        return (status & I2C_BB);
 113}
 114
 115static int wait_for_pin(int *status)
 116{
 117        struct mpc5xxx_i2c *regs    = (struct mpc5xxx_i2c *)I2C_BASE;
 118        int                 timeout = I2C_TIMEOUT;
 119
 120        *status = mpc_reg_in(&regs->msr);
 121
 122        while (timeout-- && !(*status & I2C_IF)) {
 123                udelay(15);
 124                *status = mpc_reg_in(&regs->msr);
 125        }
 126
 127        if (!(*status & I2C_IF)) {
 128                return -1;
 129        }
 130
 131        mpc_reg_out(&regs->msr, 0, I2C_IF);
 132
 133        return 0;
 134}
 135
 136static int do_address(uchar chip, char rdwr_flag)
 137{
 138        struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
 139        int                 status;
 140
 141        chip <<= 1;
 142
 143        if (rdwr_flag) {
 144                chip |= 1;
 145        }
 146
 147        mpc_reg_out(&regs->mcr, I2C_TX, I2C_TX);
 148        mpc_reg_out(&regs->mdr, chip, 0);
 149
 150        if (wait_for_pin(&status)) {
 151                return -2;
 152        }
 153
 154        if (status & I2C_RXAK) {
 155                return -3;
 156        }
 157
 158        return 0;
 159}
 160
 161static int send_bytes(uchar chip, char *buf, int len)
 162{
 163        struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
 164        int                 wrcount;
 165        int                 status;
 166
 167        for (wrcount = 0; wrcount < len; ++wrcount) {
 168
 169                mpc_reg_out(&regs->mdr, buf[wrcount], 0);
 170
 171                if (wait_for_pin(&status)) {
 172                        break;
 173                }
 174
 175                if (status & I2C_RXAK) {
 176                        break;
 177                }
 178
 179        }
 180
 181        return !(wrcount == len);
 182}
 183
 184static int receive_bytes(uchar chip, char *buf, int len)
 185{
 186        struct mpc5xxx_i2c *regs    = (struct mpc5xxx_i2c *)I2C_BASE;
 187        int                 dummy   = 1;
 188        int                 rdcount = 0;
 189        int                 status;
 190        int                 i;
 191
 192        mpc_reg_out(&regs->mcr, 0, I2C_TX);
 193
 194        for (i = 0; i < len; ++i) {
 195                buf[rdcount] = mpc_reg_in(&regs->mdr);
 196
 197                if (dummy) {
 198                        dummy = 0;
 199                } else {
 200                        rdcount++;
 201                }
 202
 203
 204                if (wait_for_pin(&status)) {
 205                        return -4;
 206                }
 207        }
 208
 209        mpc_reg_out(&regs->mcr, I2C_TXAK, I2C_TXAK);
 210        buf[rdcount++] = mpc_reg_in(&regs->mdr);
 211
 212        if (wait_for_pin(&status)) {
 213                return -5;
 214        }
 215
 216        mpc_reg_out(&regs->mcr, 0, I2C_TXAK);
 217
 218        return 0;
 219}
 220
 221#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
 222
 223#define FDR510(x) (u8) (((x & 0x20) >> 3) | (x & 0x3))
 224#define FDR432(x) (u8) ((x & 0x1C) >> 2)
 225/*
 226 * Reset any i2c devices that may have been interrupted during a system reset.
 227 * Normally this would be accomplished by clocking the line until SCL and SDA
 228 * are released and then sending a start condtiion (From an Atmel datasheet).
 229 * There is no direct access to the i2c pins so instead create start commands
 230 * through the i2c interface.  Send a start command then delay for the SDA Hold
 231 * time, repeat this by disabling/enabling the bus a total of 9 times.
 232 */
 233static void send_reset(void)
 234{
 235        struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
 236        int i;
 237        u32 delay;
 238        u8 fdr;
 239        int SDA_Tap[] = { 3, 3, 4, 4, 1, 1, 2, 2};
 240        struct mpc5xxx_i2c_tap scltap[] = {
 241                {4, 1},
 242                {4, 2},
 243                {6, 4},
 244                {6, 8},
 245                {14, 16},
 246                {30, 32},
 247                {62, 64},
 248                {126, 128}
 249        };
 250
 251        fdr = (u8)mpc_reg_in(&regs->mfdr);
 252
 253        delay = scltap[FDR432(fdr)].scl2tap + ((SDA_Tap[FDR510(fdr)] - 1) * \
 254                scltap[FDR432(fdr)].tap2tap) + 3;
 255
 256        for (i = 0; i < 9; i++) {
 257                mpc_reg_out(&regs->mcr, I2C_EN|I2C_STA|I2C_TX, I2C_INIT_MASK);
 258                udelay(delay);
 259                mpc_reg_out(&regs->mcr, 0, I2C_INIT_MASK);
 260                udelay(delay);
 261        }
 262
 263        mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
 264}
 265#endif /* CONFIG_SYS_I2c_INIT_MPC5XXX */
 266
 267/**************** I2C API ****************/
 268
 269void i2c_init(int speed, int saddr)
 270{
 271        struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
 272
 273        mpc_reg_out(&regs->mcr, 0, 0);
 274        mpc_reg_out(&regs->madr, saddr << 1, 0);
 275
 276        /* Set clock
 277         */
 278        mpc_reg_out(&regs->mfdr, mpc_get_fdr(speed), 0);
 279
 280        /* Enable module
 281         */
 282        mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
 283        mpc_reg_out(&regs->msr, 0, I2C_IF);
 284
 285#if defined(CONFIG_SYS_I2C_INIT_MPC5XXX)
 286        send_reset();
 287#endif
 288        return;
 289}
 290
 291static int mpc_get_fdr(int speed)
 292{
 293        static int fdr = -1;
 294
 295        if (fdr == -1) {
 296                ulong best_speed = 0;
 297                ulong divider;
 298                ulong ipb, scl;
 299                ulong bestmatch = 0xffffffffUL;
 300                int best_i = 0, best_j = 0, i, j;
 301                int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
 302                struct mpc5xxx_i2c_tap scltap[] = {
 303                        {4, 1},
 304                        {4, 2},
 305                        {6, 4},
 306                        {6, 8},
 307                        {14, 16},
 308                        {30, 32},
 309                        {62, 64},
 310                        {126, 128}
 311                };
 312
 313                ipb = gd->arch.ipb_clk;
 314                for (i = 7; i >= 0; i--) {
 315                        for (j = 7; j >= 0; j--) {
 316                                scl = 2 * (scltap[j].scl2tap +
 317                                        (SCL_Tap[i] - 1) * scltap[j].tap2tap + 2);
 318                                if (ipb <= speed*scl) {
 319                                        if ((speed*scl - ipb) < bestmatch) {
 320                                                bestmatch = speed*scl - ipb;
 321                                                best_i = i;
 322                                                best_j = j;
 323                                                best_speed = ipb/scl;
 324                                        }
 325                                }
 326                        }
 327                }
 328                divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
 329                if (gd->flags & GD_FLG_RELOC) {
 330                        fdr = divider;
 331                } else {
 332                        printf("%ld kHz, ", best_speed / 1000);
 333                        return divider;
 334                }
 335        }
 336
 337        return fdr;
 338}
 339
 340int i2c_probe(uchar chip)
 341{
 342        struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
 343        int                 i;
 344
 345        for (i = 0; i < I2C_RETRIES; i++) {
 346                mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
 347
 348                if (! do_address(chip, 0)) {
 349                        mpc_reg_out(&regs->mcr, 0, I2C_STA);
 350                        udelay(500);
 351                        break;
 352                }
 353
 354                mpc_reg_out(&regs->mcr, 0, I2C_STA);
 355                udelay(500);
 356        }
 357
 358        return (i == I2C_RETRIES);
 359}
 360
 361int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
 362{
 363        char                xaddr[4];
 364        struct mpc5xxx_i2c * regs        = (struct mpc5xxx_i2c *)I2C_BASE;
 365        int                  ret         = -1;
 366
 367        xaddr[0] = (addr >> 24) & 0xFF;
 368        xaddr[1] = (addr >> 16) & 0xFF;
 369        xaddr[2] = (addr >>  8) & 0xFF;
 370        xaddr[3] =  addr        & 0xFF;
 371
 372        if (wait_for_bb()) {
 373                printf("i2c_read: bus is busy\n");
 374                goto Done;
 375        }
 376
 377        mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
 378        if (do_address(chip, 0)) {
 379                printf("i2c_read: failed to address chip\n");
 380                goto Done;
 381        }
 382
 383        if (send_bytes(chip, &xaddr[4-alen], alen)) {
 384                printf("i2c_read: send_bytes failed\n");
 385                goto Done;
 386        }
 387
 388        mpc_reg_out(&regs->mcr, I2C_RSTA, I2C_RSTA);
 389        if (do_address(chip, 1)) {
 390                printf("i2c_read: failed to address chip\n");
 391                goto Done;
 392        }
 393
 394        if (receive_bytes(chip, (char *)buf, len)) {
 395                printf("i2c_read: receive_bytes failed\n");
 396                goto Done;
 397        }
 398
 399        ret = 0;
 400Done:
 401        mpc_reg_out(&regs->mcr, 0, I2C_STA);
 402        return ret;
 403}
 404
 405int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
 406{
 407        char               xaddr[4];
 408        struct mpc5xxx_i2c *regs        = (struct mpc5xxx_i2c *)I2C_BASE;
 409        int                 ret         = -1;
 410
 411        xaddr[0] = (addr >> 24) & 0xFF;
 412        xaddr[1] = (addr >> 16) & 0xFF;
 413        xaddr[2] = (addr >>  8) & 0xFF;
 414        xaddr[3] =  addr        & 0xFF;
 415
 416        if (wait_for_bb()) {
 417                printf("i2c_write: bus is busy\n");
 418                goto Done;
 419        }
 420
 421        mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
 422        if (do_address(chip, 0)) {
 423                printf("i2c_write: failed to address chip\n");
 424                goto Done;
 425        }
 426
 427        if (send_bytes(chip, &xaddr[4-alen], alen)) {
 428                printf("i2c_write: send_bytes failed\n");
 429                goto Done;
 430        }
 431
 432        if (send_bytes(chip, (char *)buf, len)) {
 433                printf("i2c_write: send_bytes failed\n");
 434                goto Done;
 435        }
 436
 437        ret = 0;
 438Done:
 439        mpc_reg_out(&regs->mcr, 0, I2C_STA);
 440        return ret;
 441}
 442
 443#if defined(CONFIG_I2C_MULTI_BUS)
 444int i2c_set_bus_num(unsigned int bus)
 445{
 446        if (bus > 1)
 447                return -1;
 448
 449        i2c_bus_num = bus;
 450        i2c_init(i2c_bus_speed[bus], CONFIG_SYS_I2C_SLAVE);
 451        return 0;
 452}
 453
 454int i2c_set_bus_speed(unsigned int speed)
 455{
 456        i2c_init(speed, CONFIG_SYS_I2C_SLAVE);
 457        return 0;
 458}
 459
 460unsigned int i2c_get_bus_num(void)
 461{
 462        return i2c_bus_num;
 463}
 464
 465unsigned int i2c_get_bus_speed(void)
 466{
 467        return i2c_bus_speed[i2c_bus_num];
 468}
 469#endif
 470
 471
 472#endif  /* CONFIG_HARD_I2C */
 473