1/* 2 * U-boot - Configuration file for BF536 brettl2 board 3 */ 4 5#ifndef __CONFIG_BCT_BRETTL2_H__ 6#define __CONFIG_BCT_BRETTL2_H__ 7 8#include <asm/config-pre.h> 9 10 11/* 12 * Processor Settings 13 */ 14#define CONFIG_BFIN_CPU bf536-0.3 15#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS 16 17 18/* 19 * Clock Settings 20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV 21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV 22 */ 23/* CONFIG_CLKIN_HZ is any value in Hz */ 24#define CONFIG_CLKIN_HZ 16384000 25/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ 26/* 1 = CLKIN / 2 */ 27#define CONFIG_CLKIN_HALF 0 28/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ 29/* 1 = bypass PLL */ 30#define CONFIG_PLL_BYPASS 0 31/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ 32/* Values can range from 0-63 (where 0 means 64) */ 33#define CONFIG_VCO_MULT 24 34/* CCLK_DIV controls the core clock divider */ 35/* Values can be 1, 2, 4, or 8 ONLY */ 36#define CONFIG_CCLK_DIV 1 37/* SCLK_DIV controls the system clock divider */ 38/* Values can range from 1-15 */ 39#define CONFIG_SCLK_DIV 3 40#define CONFIG_VR_CTL_VAL (VLEV_110 | GAIN_20 | FREQ_1000) 41 42 43/* 44 * Memory Settings 45 */ 46#define CONFIG_MEM_ADD_WDTH 9 47#define CONFIG_MEM_SIZE 32 48 49 50/* 51 * SDRAM Settings 52 */ 53#define CONFIG_EBIU_SDRRC_VAL 0x07f6 54#define CONFIG_EBIU_SDGCTL_VAL 0x9111cd 55 56#define CONFIG_EBIU_AMGCTL_VAL (AMBEN_ALL) 57#define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_7 | B1RAT_11 | B1HT_2 | B1ST_3 | B0WAT_7 | B0RAT_11 | B0HT_2 | B0ST_3) 58#define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_7 | B3RAT_11 | B3HT_2 | B3ST_3 | B2WAT_7 | B2RAT_11 | B2HT_2 | B2ST_3) 59 60#define CONFIG_SYS_MONITOR_LEN (256 * 1024) 61#define CONFIG_SYS_MALLOC_LEN (128 * 1024) 62 63 64/* 65 * Network Settings 66 */ 67#ifndef __ADSPBF534__ 68#define ADI_CMDS_NETWORK 1 69#define CONFIG_BFIN_MAC 1 70#define CONFIG_NETCONSOLE 1 71#define CONFIG_HOSTNAME brettl2 72#define CONFIG_IPADDR 192.168.233.224 73#define CONFIG_GATEWAYIP 192.168.233.1 74#define CONFIG_SERVERIP 192.168.233.53 75#define CONFIG_ROOTPATH "/romfs/brettl2" 76/* Uncomment next line to use fixed MAC address */ 77/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ 78#endif 79 80 81/* 82 * Flash Settings 83 */ 84#define CONFIG_FLASH_CFI_DRIVER 85#define CONFIG_SYS_FLASH_CFI 86#define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS 87#define CONFIG_SYS_FLASH_PROTECTION 88#define CONFIG_SYS_FLASH_BASE 0x20000000 89#define CONFIG_SYS_MAX_FLASH_BANKS 1 90#define CONFIG_SYS_MAX_FLASH_SECT 135 91 92 93/* 94 * Env Storage Settings 95 */ 96#define CONFIG_ENV_IS_IN_FLASH 1 97#define CONFIG_ENV_OFFSET 0x4000 98#define CONFIG_ENV_SIZE 0x2000 99#define CONFIG_ENV_SECT_SIZE 0x10000 100 101#if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_BYPASS) 102#define ENV_IS_EMBEDDED 103#else 104#define CONFIG_ENV_IS_EMBEDDED_IN_LDR 105#endif 106 107#ifdef ENV_IS_EMBEDDED 108/* WARNING - the following is hand-optimized to fit within 109 * the sector before the environment sector. If it throws 110 * an error during compilation remove an object here to get 111 * it linked after the configuration sector. 112 */ 113# define LDS_BOARD_TEXT \ 114 arch/blackfin/lib/libblackfin.o (.text*); \ 115 arch/blackfin/cpu/libblackfin.o (.text*); \ 116 . = DEFINED(env_offset) ? env_offset : .; \ 117 common/env_embedded.o (.text*); 118#endif 119 120 121/* 122 * I2C Settings 123 */ 124#define CONFIG_BFIN_TWI_I2C 1 125#define CONFIG_HARD_I2C 1 126 127 128/* 129 * Misc Settings 130 */ 131#define CONFIG_BOOTDELAY 1 132#define CONFIG_LOADADDR 0x800000 133#define CONFIG_MISC_INIT_R 134#define CONFIG_UART_CONSOLE 0 135#define CONFIG_BAUDRATE 115200 136#define CONFIG_MTD_DEVICE 137#define CONFIG_MTD_PARTITIONS 138#define CONFIG_SYS_HUSH_PARSER 139 140 141/* 142 * Pull in common ADI header for remaining command/environment setup 143 */ 144#include <configs/bfin_adi_common.h> 145 146/* disable unnecessary features */ 147#undef CONFIG_BOOTM_RTEMS 148#undef CONFIG_BZIP2 149#undef CONFIG_KALLSYMS 150 151#endif 152