LXR uboot/include/configs/microblaze-generic.h

   1/*
   2 * (C) Copyright 2007-2010 Michal Simek
   3 *
   4 * Michal SIMEK <monstr@monstr.eu>
   5 *
   6 * See file CREDITS for list of people who contributed to this
   7 * project.
   8 *
   9 * This program is free software; you can redistribute it and/or
  10 * modify it under the terms of the GNU General Public License as
  11 * published by the Free Software Foundation; either version 2 of
  12 * the License, or (at your option) any later version.
  13 *
  14 * This program is distributed in the hope that it will be useful,
  15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17 * GNU General Public License for more details.
  18 *
  19 * You should have received a copy of the GNU General Public License
  20 * along with this program; if not, write to the Free Software
  21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  22 * MA 02111-1307 USA
  23 */
  24
  25#ifndef __CONFIG_H
  26#define __CONFIG_H
  27
  28#include "../board/xilinx/microblaze-generic/xparameters.h"
  29
  30/* MicroBlaze CPU */
  31#define CONFIG_MICROBLAZE       1
  32#define MICROBLAZE_V5           1
  33
  34/* Open Firmware DTS */
  35#define CONFIG_OF_CONTROL       1
  36#define CONFIG_OF_EMBED         1
  37#define CONFIG_DEFAULT_DEVICE_TREE microblaze
  38
  39/* linear and spi flash memory */
  40#ifdef XILINX_FLASH_START
  41#define FLASH
  42#undef  SPIFLASH
  43#undef  RAMENV  /* hold environment in flash */
  44#else
  45#ifdef XILINX_SPI_FLASH_BASEADDR
  46#undef  FLASH
  47#define SPIFLASH
  48#undef  RAMENV  /* hold environment in flash */
  49#else
  50#undef  FLASH
  51#undef  SPIFLASH
  52#define RAMENV  /* hold environment in RAM */
  53#endif
  54#endif
  55
  56/* uart */
  57#ifdef XILINX_UARTLITE_BASEADDR
  58# define CONFIG_XILINX_UARTLITE
  59# define CONFIG_SERIAL_BASE     XILINX_UARTLITE_BASEADDR
  60# define CONFIG_BAUDRATE        XILINX_UARTLITE_BAUDRATE
  61# define CONFIG_SYS_BAUDRATE_TABLE      { CONFIG_BAUDRATE }
  62# define CONSOLE_ARG    "console=console=ttyUL0,115200\0"
  63#elif XILINX_UART16550_BASEADDR
  64# define CONFIG_SYS_NS16550             1
  65# define CONFIG_SYS_NS16550_SERIAL
  66# if defined(__MICROBLAZEEL__)
  67#  define CONFIG_SYS_NS16550_REG_SIZE   -4
  68# else
  69#  define CONFIG_SYS_NS16550_REG_SIZE   4
  70# endif
  71# define CONFIG_CONS_INDEX              1
  72# define CONFIG_SYS_NS16550_COM1 \
  73                ((XILINX_UART16550_BASEADDR & ~0xF) + 0x1000)
  74# define CONFIG_SYS_NS16550_CLK XILINX_UART16550_CLOCK_HZ
  75# define CONFIG_BAUDRATE        115200
  76
  77/* The following table includes the supported baudrates */
  78# define CONFIG_SYS_BAUDRATE_TABLE \
  79        {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
  80# define CONSOLE_ARG    "console=console=ttyS0,115200\0"
  81#else
  82# error Undefined uart
  83#endif
  84
  85/* setting reset address */
  86/*#define       CONFIG_SYS_RESET_ADDRESS        CONFIG_SYS_TEXT_BASE*/
  87
  88/* ethernet */
  89#undef CONFIG_SYS_ENET
  90#if defined(XILINX_EMACLITE_BASEADDR)
  91# define CONFIG_XILINX_EMACLITE 1
  92# define CONFIG_SYS_ENET
  93#endif
  94#if defined(XILINX_LLTEMAC_BASEADDR)
  95# define CONFIG_XILINX_LL_TEMAC 1
  96# define CONFIG_SYS_ENET
  97#endif
  98#if defined(XILINX_AXIEMAC_BASEADDR)
  99# define CONFIG_XILINX_AXIEMAC  1
 100# define CONFIG_SYS_ENET
 101#endif
 102
 103#undef ET_DEBUG
 104
 105/* gpio */
 106#ifdef XILINX_GPIO_BASEADDR
 107# define CONFIG_XILINX_GPIO
 108# define CONFIG_SYS_GPIO_0_ADDR         XILINX_GPIO_BASEADDR
 109#endif
 110
 111/* interrupt controller */
 112#ifdef XILINX_INTC_BASEADDR
 113# define CONFIG_SYS_INTC_0_ADDR         XILINX_INTC_BASEADDR
 114# define CONFIG_SYS_INTC_0_NUM          XILINX_INTC_NUM_INTR_INPUTS
 115#endif
 116
 117/* timer */
 118#if defined(XILINX_TIMER_BASEADDR) && defined(XILINX_TIMER_IRQ)
 119#  define CONFIG_SYS_TIMER_0_ADDR       XILINX_TIMER_BASEADDR
 120#  define CONFIG_SYS_TIMER_0_IRQ        XILINX_TIMER_IRQ
 121#endif
 122
 123/* watchdog */
 124#if defined(XILINX_WATCHDOG_BASEADDR) && defined(XILINX_WATCHDOG_IRQ)
 125# define CONFIG_WATCHDOG_BASEADDR       XILINX_WATCHDOG_BASEADDR
 126# define CONFIG_WATCHDOG_IRQ            XILINX_WATCHDOG_IRQ
 127# define CONFIG_HW_WATCHDOG
 128# define CONFIG_XILINX_TB_WATCHDOG
 129#endif
 130
 131/*
 132 * memory layout - Example
 133 * CONFIG_SYS_TEXT_BASE = 0x1200_0000;  defined in config.mk
 134 * CONFIG_SYS_SRAM_BASE = 0x1000_0000;
 135 * CONFIG_SYS_SRAM_SIZE = 0x0400_0000;  64MB
 136 *
 137 * CONFIG_SYS_MONITOR_LEN = 0x40000
 138 * CONFIG_SYS_MALLOC_LEN = 3 * CONFIG_SYS_MONITOR_LEN = 0xC0000
 139 *
 140 * CONFIG_SYS_GBL_DATA_OFFSET = 0x1000_0000 + 0x0400_0000 - 0x1000 = 0x13FF_F000
 141 * CONFIG_SYS_MONITOR_BASE = 0x13FF_F000 - CONFIG_SYS_MONITOR_LEN = 0x13FB_F000
 142 * CONFIG_SYS_MALLOC_BASE = 0x13FB_F000 - CONFIG_SYS_MALLOC_LEN = 0x13EF_F000
 143 *
 144 * 0x1000_0000  CONFIG_SYS_SDRAM_BASE
 145 *                                      MEMTEST_AREA     64kB
 146 *                                      FREE
 147 * 0x1200_0000  CONFIG_SYS_TEXT_BASE
 148 *              U-BOOT code
 149 * 0x1202_0000
 150 *                                      FREE
 151 *
 152 *                                      STACK
 153 * 0x13EF_F000  CONFIG_SYS_MALLOC_BASE
 154 *                                      MALLOC_AREA     768kB   Alloc
 155 * 0x13FB_F000  CONFIG_SYS_MONITOR_BASE
 156 *                                      MONITOR_CODE    256kB   Env
 157 * 0x13FF_F000  CONFIG_SYS_GBL_DATA_OFFSET
 158 *                                      GLOBAL_DATA     4kB     bd, gd
 159 * 0x1400_0000  CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_SDRAM_SIZE
 160 */
 161
 162/* ddr sdram - main memory */
 163#define CONFIG_SYS_SDRAM_BASE           XILINX_RAM_START
 164#define CONFIG_SYS_SDRAM_SIZE           XILINX_RAM_SIZE
 165#define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
 166#define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x1000)
 167
 168/* global pointer */
 169/* start of global data */
 170#define CONFIG_SYS_GBL_DATA_OFFSET \
 171                (CONFIG_SYS_SDRAM_SIZE - GENERATED_GBL_DATA_SIZE)
 172
 173/* monitor code */
 174#define SIZE                            0x40000
 175#define CONFIG_SYS_MONITOR_LEN          SIZE
 176#define CONFIG_SYS_MONITOR_BASE \
 177                (CONFIG_SYS_SDRAM_BASE + CONFIG_SYS_GBL_DATA_OFFSET \
 178                        - CONFIG_SYS_MONITOR_LEN - GENERATED_BD_INFO_SIZE)
 179#define CONFIG_SYS_MONITOR_END \
 180                        (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
 181#define CONFIG_SYS_MALLOC_LEN           (SIZE * 3)
 182#define CONFIG_SYS_MALLOC_BASE \
 183                        (CONFIG_SYS_MONITOR_BASE - CONFIG_SYS_MALLOC_LEN)
 184
 185/* stack */
 186#define CONFIG_SYS_INIT_SP_OFFSET       CONFIG_SYS_MALLOC_BASE
 187
 188/*
 189 * CFI flash memory layout - Example
 190 * CONFIG_SYS_FLASH_BASE = 0x2200_0000;
 191 * CONFIG_SYS_FLASH_SIZE = 0x0080_0000;   8MB
 192 *
 193 * SECT_SIZE = 0x20000;                 128kB is one sector
 194 * CONFIG_ENV_SIZE = SECT_SIZE;         128kB environment store
 195 *
 196 * 0x2200_0000  CONFIG_SYS_FLASH_BASE
 197 *                                      FREE            256kB
 198 * 0x2204_0000  CONFIG_ENV_ADDR
 199 *                                      ENV_AREA        128kB
 200 * 0x2206_0000
 201 *                                      FREE
 202 * 0x2280_0000  CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE
 203 *
 204 */
 205
 206#ifdef FLASH
 207# define CONFIG_SYS_FLASH_BASE          XILINX_FLASH_START
 208# define CONFIG_SYS_FLASH_SIZE          XILINX_FLASH_SIZE
 209# define CONFIG_SYS_FLASH_CFI           1
 210# define CONFIG_FLASH_CFI_DRIVER        1
 211/* ?empty sector */
 212# define CONFIG_SYS_FLASH_EMPTY_INFO    1
 213/* max number of memory banks */
 214# define CONFIG_SYS_MAX_FLASH_BANKS     1
 215/* max number of sectors on one chip */
 216# define CONFIG_SYS_MAX_FLASH_SECT      512
 217/* hardware flash protection */
 218# define CONFIG_SYS_FLASH_PROTECTION
 219
 220# ifdef RAMENV
 221#  define CONFIG_ENV_IS_NOWHERE 1
 222#  define CONFIG_ENV_SIZE       0x1000
 223#  define CONFIG_ENV_ADDR       (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
 224
 225# else  /* FLASH && !RAMENV */
 226#  define CONFIG_ENV_IS_IN_FLASH        1
 227/* 128K(one sector) for env */
 228#  define CONFIG_ENV_SECT_SIZE  0x20000
 229#  define CONFIG_ENV_ADDR \
 230                        (CONFIG_SYS_FLASH_BASE + (2 * CONFIG_ENV_SECT_SIZE))
 231#  define CONFIG_ENV_SIZE       0x20000
 232# endif /* FLASH && !RAMBOOT */
 233#else /* !FLASH */
 234
 235#ifdef SPIFLASH
 236# define CONFIG_SYS_NO_FLASH            1
 237# define CONFIG_SYS_SPI_BASE            XILINX_SPI_FLASH_BASEADDR
 238# define CONFIG_XILINX_SPI              1
 239# define CONFIG_SPI                     1
 240# define CONFIG_SPI_FLASH               1
 241# define CONFIG_SPI_FLASH_STMICRO       1
 242# define CONFIG_SF_DEFAULT_MODE         SPI_MODE_3
 243# define CONFIG_SF_DEFAULT_SPEED        XILINX_SPI_FLASH_MAX_FREQ
 244# define CONFIG_SF_DEFAULT_CS           XILINX_SPI_FLASH_CS
 245
 246# ifdef RAMENV
 247#  define CONFIG_ENV_IS_NOWHERE 1
 248#  define CONFIG_ENV_SIZE       0x1000
 249#  define CONFIG_ENV_ADDR       (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
 250
 251# else  /* SPIFLASH && !RAMENV */
 252#  define CONFIG_ENV_IS_IN_SPI_FLASH    1
 253#  define CONFIG_ENV_SPI_MODE           SPI_MODE_3
 254#  define CONFIG_ENV_SPI_MAX_HZ         CONFIG_SF_DEFAULT_SPEED
 255#  define CONFIG_ENV_SPI_CS             CONFIG_SF_DEFAULT_CS
 256/* 128K(two sectors) for env */
 257#  define CONFIG_ENV_SECT_SIZE  0x10000
 258#  define CONFIG_ENV_SIZE       (2 * CONFIG_ENV_SECT_SIZE)
 259/* Warning: adjust the offset in respect of other flash content and size */
 260#  define CONFIG_ENV_OFFSET     (128 * CONFIG_ENV_SECT_SIZE) /* at 8MB */
 261# endif /* SPIFLASH && !RAMBOOT */
 262#else /* !SPIFLASH */
 263
 264/* ENV in RAM */
 265# define CONFIG_SYS_NO_FLASH    1
 266# define CONFIG_ENV_IS_NOWHERE  1
 267# define CONFIG_ENV_SIZE        0x1000
 268# define CONFIG_ENV_ADDR        (CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SIZE)
 269#endif /* !SPIFLASH */
 270#endif /* !FLASH */
 271
 272/* system ace */
 273#ifdef XILINX_SYSACE_BASEADDR
 274# define CONFIG_SYSTEMACE
 275/* #define DEBUG_SYSTEMACE */
 276# define SYSTEMACE_CONFIG_FPGA
 277# define CONFIG_SYS_SYSTEMACE_BASE      XILINX_SYSACE_BASEADDR
 278# define CONFIG_SYS_SYSTEMACE_WIDTH     XILINX_SYSACE_MEM_WIDTH
 279# define CONFIG_DOS_PARTITION
 280#endif
 281
 282#if defined(XILINX_USE_ICACHE)
 283# define CONFIG_ICACHE
 284#else
 285# undef CONFIG_ICACHE
 286#endif
 287
 288#if defined(XILINX_USE_DCACHE)
 289# define CONFIG_DCACHE
 290#else
 291# undef CONFIG_DCACHE
 292#endif
 293
 294#ifndef XILINX_DCACHE_BYTE_SIZE
 295#define XILINX_DCACHE_BYTE_SIZE 32768
 296#endif
 297
 298/*
 299 * BOOTP options
 300 */
 301#define CONFIG_BOOTP_BOOTFILESIZE
 302#define CONFIG_BOOTP_BOOTPATH
 303#define CONFIG_BOOTP_GATEWAY
 304#define CONFIG_BOOTP_HOSTNAME
 305
 306/*
 307 * Command line configuration.
 308 */
 309#include <config_cmd_default.h>
 310
 311#define CONFIG_CMD_ASKENV
 312#define CONFIG_CMD_IRQ
 313#define CONFIG_CMD_MFSL
 314#define CONFIG_CMD_ECHO
 315#define CONFIG_CMD_GPIO
 316
 317#if defined(CONFIG_DCACHE) || defined(CONFIG_ICACHE)
 318# define CONFIG_CMD_CACHE
 319#else
 320# undef CONFIG_CMD_CACHE
 321#endif
 322
 323#ifndef CONFIG_SYS_ENET
 324# undef CONFIG_CMD_NET
 325# undef CONFIG_CMD_NFS
 326#else
 327# define CONFIG_CMD_PING
 328# define CONFIG_CMD_DHCP
 329# define CONFIG_CMD_TFTPPUT
 330#endif
 331
 332#if defined(CONFIG_SYSTEMACE)
 333# define CONFIG_CMD_EXT2
 334# define CONFIG_CMD_FAT
 335#endif
 336
 337#if defined(FLASH)
 338# define CONFIG_CMD_ECHO
 339# define CONFIG_CMD_FLASH
 340# define CONFIG_CMD_IMLS
 341# define CONFIG_CMD_JFFS2
 342# define CONFIG_CMD_UBI
 343# undef CONFIG_CMD_UBIFS
 344
 345# if !defined(RAMENV)
 346#  define CONFIG_CMD_SAVEENV
 347#  define CONFIG_CMD_SAVES
 348# endif
 349
 350#else
 351#if defined(SPIFLASH)
 352# define CONFIG_CMD_SF
 353
 354# if !defined(RAMENV)
 355#  define CONFIG_CMD_SAVEENV
 356#  define CONFIG_CMD_SAVES
 357# endif
 358#else
 359# undef CONFIG_CMD_IMLS
 360# undef CONFIG_CMD_FLASH
 361# undef CONFIG_CMD_JFFS2
 362# undef CONFIG_CMD_UBI
 363# undef CONFIG_CMD_UBIFS
 364#endif
 365#endif
 366
 367#if defined(CONFIG_CMD_JFFS2)
 368# define CONFIG_MTD_PARTITIONS
 369#endif
 370
 371#if defined(CONFIG_CMD_UBIFS)
 372# define CONFIG_CMD_UBI
 373# define CONFIG_LZO
 374#endif
 375
 376#if defined(CONFIG_CMD_UBI)
 377# define CONFIG_MTD_PARTITIONS
 378# define CONFIG_RBTREE
 379#endif
 380
 381#if defined(CONFIG_MTD_PARTITIONS)
 382/* MTD partitions */
 383#define CONFIG_CMD_MTDPARTS     /* mtdparts command line support */
 384#define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 385#define CONFIG_FLASH_CFI_MTD
 386#define MTDIDS_DEFAULT          "nor0=flash-0"
 387
 388/* default mtd partition table */
 389#define MTDPARTS_DEFAULT        "mtdparts=flash-0:256k(u-boot),"\
 390                                "256k(env),3m(kernel),1m(romfs),"\
 391                                "1m(cramfs),-(jffs2)"
 392#endif
 393
 394/* Miscellaneous configurable options */
 395#define CONFIG_SYS_PROMPT       "U-Boot-mONStR> "
 396/* size of console buffer */
 397#define CONFIG_SYS_CBSIZE       512
 398 /* print buffer size */
 399#define CONFIG_SYS_PBSIZE \
 400                (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 401/* max number of command args */
 402#define CONFIG_SYS_MAXARGS      15
 403#define CONFIG_SYS_LONGHELP
 404/* default load address */
 405#define CONFIG_SYS_LOAD_ADDR    XILINX_RAM_START
 406
 407#define CONFIG_BOOTDELAY        -1      /* -1 disables auto-boot */
 408#define CONFIG_BOOTARGS         "root=romfs"
 409#define CONFIG_HOSTNAME         XILINX_BOARD_NAME
 410#define CONFIG_BOOTCOMMAND      "base 0;tftp 11000000 image.img;bootm"
 411#define CONFIG_IPADDR           192.168.0.3
 412#define CONFIG_SERVERIP         192.168.0.5
 413#define CONFIG_GATEWAYIP        192.168.0.1
 414#define CONFIG_ETHADDR          00:E0:0C:00:00:FD
 415
 416/* architecture dependent code */
 417#define CONFIG_SYS_USR_EXCEP    /* user exception */
 418#define CONFIG_SYS_HZ   1000
 419
 420#define CONFIG_PREBOOT  "echo U-BOOT for ${hostname};setenv preboot;echo"
 421
 422#define CONFIG_EXTRA_ENV_SETTINGS       "unlock=yes\0" \
 423                                        "nor0=flash-0\0"\
 424                                        "mtdparts=mtdparts=flash-0:"\
 425                                        "256k(u-boot),256k(env),3m(kernel),"\
 426                                        "1m(romfs),1m(cramfs),-(jffs2)\0"\
 427                                        "nc=setenv stdout nc;"\
 428                                        "setenv stdin nc\0" \
 429                                        "serial=setenv stdout serial;"\
 430                                        "setenv stdin serial\0"
 431
 432#define CONFIG_CMDLINE_EDITING
 433
 434#define CONFIG_NETCONSOLE
 435#define CONFIG_SYS_CONSOLE_IS_IN_ENV
 436
 437/* Use the HUSH parser */
 438#define CONFIG_SYS_HUSH_PARSER
 439
 440/* Enable flat device tree support */
 441#define CONFIG_LMB              1
 442#define CONFIG_FIT              1
 443#define CONFIG_OF_LIBFDT        1
 444
 445#if defined(CONFIG_XILINX_LL_TEMAC) || defined(CONFIG_XILINX_AXIEMAC)
 446# define CONFIG_MII             1
 447# define CONFIG_CMD_MII         1
 448# define CONFIG_PHY_GIGE        1
 449# define CONFIG_SYS_FAULT_ECHO_LINK_DOWN        1
 450# define CONFIG_PHYLIB          1
 451# define CONFIG_PHY_ATHEROS     1
 452# define CONFIG_PHY_BROADCOM    1
 453# define CONFIG_PHY_DAVICOM     1
 454# define CONFIG_PHY_LXT         1
 455# define CONFIG_PHY_MARVELL     1
 456# define CONFIG_PHY_MICREL      1
 457# define CONFIG_PHY_NATSEMI     1
 458# define CONFIG_PHY_REALTEK     1
 459# define CONFIG_PHY_VITESSE     1
 460#else
 461# undef CONFIG_MII
 462# undef CONFIG_CMD_MII
 463# undef CONFIG_PHYLIB
 464#endif
 465
 466#endif  /* __CONFIG_H */
 467