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6#ifndef __BFIN_CDEF_ADSP_BF522_proc__
7#define __BFIN_CDEF_ADSP_BF522_proc__
8
9#include "../mach-common/ADSP-EDN-core_cdef.h"
10
11#define bfin_read_PLL_CTL() bfin_read16(PLL_CTL)
12#define bfin_write_PLL_CTL(val) bfin_write16(PLL_CTL, val)
13#define bfin_read_PLL_DIV() bfin_read16(PLL_DIV)
14#define bfin_write_PLL_DIV(val) bfin_write16(PLL_DIV, val)
15#define bfin_read_VR_CTL() bfin_read16(VR_CTL)
16#define bfin_write_VR_CTL(val) bfin_write16(VR_CTL, val)
17#define bfin_read_PLL_STAT() bfin_read16(PLL_STAT)
18#define bfin_write_PLL_STAT(val) bfin_write16(PLL_STAT, val)
19#define bfin_read_PLL_LOCKCNT() bfin_read16(PLL_LOCKCNT)
20#define bfin_write_PLL_LOCKCNT(val) bfin_write16(PLL_LOCKCNT, val)
21#define bfin_read_CHIPID() bfin_read32(CHIPID)
22#define bfin_write_CHIPID(val) bfin_write32(CHIPID, val)
23#define bfin_read_SWRST() bfin_read16(SWRST)
24#define bfin_write_SWRST(val) bfin_write16(SWRST, val)
25#define bfin_read_SYSCR() bfin_read16(SYSCR)
26#define bfin_write_SYSCR(val) bfin_write16(SYSCR, val)
27#define bfin_read_SIC_RVECT() bfin_read16(SIC_RVECT)
28#define bfin_write_SIC_RVECT(val) bfin_write16(SIC_RVECT, val)
29#define bfin_read_SIC_IMASK0() bfin_read32(SIC_IMASK0)
30#define bfin_write_SIC_IMASK0(val) bfin_write32(SIC_IMASK0, val)
31#define bfin_read_SIC_IAR0() bfin_read32(SIC_IAR0)
32#define bfin_write_SIC_IAR0(val) bfin_write32(SIC_IAR0, val)
33#define bfin_read_SIC_IAR1() bfin_read32(SIC_IAR1)
34#define bfin_write_SIC_IAR1(val) bfin_write32(SIC_IAR1, val)
35#define bfin_read_SIC_IAR2() bfin_read32(SIC_IAR2)
36#define bfin_write_SIC_IAR2(val) bfin_write32(SIC_IAR2, val)
37#define bfin_read_SIC_IAR3() bfin_read32(SIC_IAR3)
38#define bfin_write_SIC_IAR3(val) bfin_write32(SIC_IAR3, val)
39#define bfin_read_SIC_ISR0() bfin_read32(SIC_ISR0)
40#define bfin_write_SIC_ISR0(val) bfin_write32(SIC_ISR0, val)
41#define bfin_read_SIC_IWR0() bfin_read32(SIC_IWR0)
42#define bfin_write_SIC_IWR0(val) bfin_write32(SIC_IWR0, val)
43#define bfin_read_SIC_IMASK1() bfin_read32(SIC_IMASK1)
44#define bfin_write_SIC_IMASK1(val) bfin_write32(SIC_IMASK1, val)
45#define bfin_read_SIC_IAR4() bfin_read32(SIC_IAR4)
46#define bfin_write_SIC_IAR4(val) bfin_write32(SIC_IAR4, val)
47#define bfin_read_SIC_IAR5() bfin_read32(SIC_IAR5)
48#define bfin_write_SIC_IAR5(val) bfin_write32(SIC_IAR5, val)
49#define bfin_read_SIC_IAR6() bfin_read32(SIC_IAR6)
50#define bfin_write_SIC_IAR6(val) bfin_write32(SIC_IAR6, val)
51#define bfin_read_SIC_IAR7() bfin_read32(SIC_IAR7)
52#define bfin_write_SIC_IAR7(val) bfin_write32(SIC_IAR7, val)
53#define bfin_read_SIC_ISR1() bfin_read32(SIC_ISR1)
54#define bfin_write_SIC_ISR1(val) bfin_write32(SIC_ISR1, val)
55#define bfin_read_SIC_IWR1() bfin_read32(SIC_IWR1)
56#define bfin_write_SIC_IWR1(val) bfin_write32(SIC_IWR1, val)
57#define bfin_read_WDOG_CTL() bfin_read16(WDOG_CTL)
58#define bfin_write_WDOG_CTL(val) bfin_write16(WDOG_CTL, val)
59#define bfin_read_WDOG_CNT() bfin_read32(WDOG_CNT)
60#define bfin_write_WDOG_CNT(val) bfin_write32(WDOG_CNT, val)
61#define bfin_read_WDOG_STAT() bfin_read32(WDOG_STAT)
62#define bfin_write_WDOG_STAT(val) bfin_write32(WDOG_STAT, val)
63#define bfin_read_RTC_STAT() bfin_read32(RTC_STAT)
64#define bfin_write_RTC_STAT(val) bfin_write32(RTC_STAT, val)
65#define bfin_read_RTC_ICTL() bfin_read16(RTC_ICTL)
66#define bfin_write_RTC_ICTL(val) bfin_write16(RTC_ICTL, val)
67#define bfin_read_RTC_ISTAT() bfin_read16(RTC_ISTAT)
68#define bfin_write_RTC_ISTAT(val) bfin_write16(RTC_ISTAT, val)
69#define bfin_read_RTC_SWCNT() bfin_read16(RTC_SWCNT)
70#define bfin_write_RTC_SWCNT(val) bfin_write16(RTC_SWCNT, val)
71#define bfin_read_RTC_ALARM() bfin_read32(RTC_ALARM)
72#define bfin_write_RTC_ALARM(val) bfin_write32(RTC_ALARM, val)
73#define bfin_read_RTC_PREN() bfin_read16(RTC_PREN)
74#define bfin_write_RTC_PREN(val) bfin_write16(RTC_PREN, val)
75#define bfin_read_UART0_THR() bfin_read16(UART0_THR)
76#define bfin_write_UART0_THR(val) bfin_write16(UART0_THR, val)
77#define bfin_read_UART0_RBR() bfin_read16(UART0_RBR)
78#define bfin_write_UART0_RBR(val) bfin_write16(UART0_RBR, val)
79#define bfin_read_UART0_DLL() bfin_read16(UART0_DLL)
80#define bfin_write_UART0_DLL(val) bfin_write16(UART0_DLL, val)
81#define bfin_read_UART0_IER() bfin_read16(UART0_IER)
82#define bfin_write_UART0_IER(val) bfin_write16(UART0_IER, val)
83#define bfin_read_UART0_DLH() bfin_read16(UART0_DLH)
84#define bfin_write_UART0_DLH(val) bfin_write16(UART0_DLH, val)
85#define bfin_read_UART0_IIR() bfin_read16(UART0_IIR)
86#define bfin_write_UART0_IIR(val) bfin_write16(UART0_IIR, val)
87#define bfin_read_UART0_LCR() bfin_read16(UART0_LCR)
88#define bfin_write_UART0_LCR(val) bfin_write16(UART0_LCR, val)
89#define bfin_read_UART0_MCR() bfin_read16(UART0_MCR)
90#define bfin_write_UART0_MCR(val) bfin_write16(UART0_MCR, val)
91#define bfin_read_UART0_LSR() bfin_read16(UART0_LSR)
92#define bfin_write_UART0_LSR(val) bfin_write16(UART0_LSR, val)
93#define bfin_read_UART0_MSR() bfin_read16(UART0_MSR)
94#define bfin_write_UART0_MSR(val) bfin_write16(UART0_MSR, val)
95#define bfin_read_UART0_SCR() bfin_read16(UART0_SCR)
96#define bfin_write_UART0_SCR(val) bfin_write16(UART0_SCR, val)
97#define bfin_read_UART0_GCTL() bfin_read16(UART0_GCTL)
98#define bfin_write_UART0_GCTL(val) bfin_write16(UART0_GCTL, val)
99#define bfin_read_SPI_CTL() bfin_read16(SPI_CTL)
100#define bfin_write_SPI_CTL(val) bfin_write16(SPI_CTL, val)
101#define bfin_read_SPI_FLG() bfin_read16(SPI_FLG)
102#define bfin_write_SPI_FLG(val) bfin_write16(SPI_FLG, val)
103#define bfin_read_SPI_STAT() bfin_read16(SPI_STAT)
104#define bfin_write_SPI_STAT(val) bfin_write16(SPI_STAT, val)
105#define bfin_read_SPI_TDBR() bfin_read16(SPI_TDBR)
106#define bfin_write_SPI_TDBR(val) bfin_write16(SPI_TDBR, val)
107#define bfin_read_SPI_RDBR() bfin_read16(SPI_RDBR)
108#define bfin_write_SPI_RDBR(val) bfin_write16(SPI_RDBR, val)
109#define bfin_read_SPI_BAUD() bfin_read16(SPI_BAUD)
110#define bfin_write_SPI_BAUD(val) bfin_write16(SPI_BAUD, val)
111#define bfin_read_SPI_SHADOW() bfin_read16(SPI_SHADOW)
112#define bfin_write_SPI_SHADOW(val) bfin_write16(SPI_SHADOW, val)
113#define bfin_read_TIMER0_CONFIG() bfin_read16(TIMER0_CONFIG)
114#define bfin_write_TIMER0_CONFIG(val) bfin_write16(TIMER0_CONFIG, val)
115#define bfin_read_TIMER0_COUNTER() bfin_read32(TIMER0_COUNTER)
116#define bfin_write_TIMER0_COUNTER(val) bfin_write32(TIMER0_COUNTER, val)
117#define bfin_read_TIMER0_PERIOD() bfin_read32(TIMER0_PERIOD)
118#define bfin_write_TIMER0_PERIOD(val) bfin_write32(TIMER0_PERIOD, val)
119#define bfin_read_TIMER0_WIDTH() bfin_read32(TIMER0_WIDTH)
120#define bfin_write_TIMER0_WIDTH(val) bfin_write32(TIMER0_WIDTH, val)
121#define bfin_read_TIMER1_CONFIG() bfin_read16(TIMER1_CONFIG)
122#define bfin_write_TIMER1_CONFIG(val) bfin_write16(TIMER1_CONFIG, val)
123#define bfin_read_TIMER1_COUNTER() bfin_read32(TIMER1_COUNTER)
124#define bfin_write_TIMER1_COUNTER(val) bfin_write32(TIMER1_COUNTER, val)
125#define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
126#define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD, val)
127#define bfin_read_TIMER1_WIDTH() bfin_read32(TIMER1_WIDTH)
128#define bfin_write_TIMER1_WIDTH(val) bfin_write32(TIMER1_WIDTH, val)
129#define bfin_read_TIMER2_CONFIG() bfin_read16(TIMER2_CONFIG)
130#define bfin_write_TIMER2_CONFIG(val) bfin_write16(TIMER2_CONFIG, val)
131#define bfin_read_TIMER2_COUNTER() bfin_read32(TIMER2_COUNTER)
132#define bfin_write_TIMER2_COUNTER(val) bfin_write32(TIMER2_COUNTER, val)
133#define bfin_read_TIMER2_PERIOD() bfin_read32(TIMER2_PERIOD)
134#define bfin_write_TIMER2_PERIOD(val) bfin_write32(TIMER2_PERIOD, val)
135#define bfin_read_TIMER2_WIDTH() bfin_read32(TIMER2_WIDTH)
136#define bfin_write_TIMER2_WIDTH(val) bfin_write32(TIMER2_WIDTH, val)
137#define bfin_read_TIMER3_CONFIG() bfin_read16(TIMER3_CONFIG)
138#define bfin_write_TIMER3_CONFIG(val) bfin_write16(TIMER3_CONFIG, val)
139#define bfin_read_TIMER3_COUNTER() bfin_read32(TIMER3_COUNTER)
140#define bfin_write_TIMER3_COUNTER(val) bfin_write32(TIMER3_COUNTER, val)
141#define bfin_read_TIMER3_PERIOD() bfin_read32(TIMER3_PERIOD)
142#define bfin_write_TIMER3_PERIOD(val) bfin_write32(TIMER3_PERIOD, val)
143#define bfin_read_TIMER3_WIDTH() bfin_read32(TIMER3_WIDTH)
144#define bfin_write_TIMER3_WIDTH(val) bfin_write32(TIMER3_WIDTH, val)
145#define bfin_read_TIMER4_CONFIG() bfin_read16(TIMER4_CONFIG)
146#define bfin_write_TIMER4_CONFIG(val) bfin_write16(TIMER4_CONFIG, val)
147#define bfin_read_TIMER4_COUNTER() bfin_read32(TIMER4_COUNTER)
148#define bfin_write_TIMER4_COUNTER(val) bfin_write32(TIMER4_COUNTER, val)
149#define bfin_read_TIMER4_PERIOD() bfin_read32(TIMER4_PERIOD)
150#define bfin_write_TIMER4_PERIOD(val) bfin_write32(TIMER4_PERIOD, val)
151#define bfin_read_TIMER4_WIDTH() bfin_read32(TIMER4_WIDTH)
152#define bfin_write_TIMER4_WIDTH(val) bfin_write32(TIMER4_WIDTH, val)
153#define bfin_read_TIMER5_CONFIG() bfin_read16(TIMER5_CONFIG)
154#define bfin_write_TIMER5_CONFIG(val) bfin_write16(TIMER5_CONFIG, val)
155#define bfin_read_TIMER5_COUNTER() bfin_read32(TIMER5_COUNTER)
156#define bfin_write_TIMER5_COUNTER(val) bfin_write32(TIMER5_COUNTER, val)
157#define bfin_read_TIMER5_PERIOD() bfin_read32(TIMER5_PERIOD)
158#define bfin_write_TIMER5_PERIOD(val) bfin_write32(TIMER5_PERIOD, val)
159#define bfin_read_TIMER5_WIDTH() bfin_read32(TIMER5_WIDTH)
160#define bfin_write_TIMER5_WIDTH(val) bfin_write32(TIMER5_WIDTH, val)
161#define bfin_read_TIMER6_CONFIG() bfin_read16(TIMER6_CONFIG)
162#define bfin_write_TIMER6_CONFIG(val) bfin_write16(TIMER6_CONFIG, val)
163#define bfin_read_TIMER6_COUNTER() bfin_read32(TIMER6_COUNTER)
164#define bfin_write_TIMER6_COUNTER(val) bfin_write32(TIMER6_COUNTER, val)
165#define bfin_read_TIMER6_PERIOD() bfin_read32(TIMER6_PERIOD)
166#define bfin_write_TIMER6_PERIOD(val) bfin_write32(TIMER6_PERIOD, val)
167#define bfin_read_TIMER6_WIDTH() bfin_read32(TIMER6_WIDTH)
168#define bfin_write_TIMER6_WIDTH(val) bfin_write32(TIMER6_WIDTH, val)
169#define bfin_read_TIMER7_CONFIG() bfin_read16(TIMER7_CONFIG)
170#define bfin_write_TIMER7_CONFIG(val) bfin_write16(TIMER7_CONFIG, val)
171#define bfin_read_TIMER7_COUNTER() bfin_read32(TIMER7_COUNTER)
172#define bfin_write_TIMER7_COUNTER(val) bfin_write32(TIMER7_COUNTER, val)
173#define bfin_read_TIMER7_PERIOD() bfin_read32(TIMER7_PERIOD)
174#define bfin_write_TIMER7_PERIOD(val) bfin_write32(TIMER7_PERIOD, val)
175#define bfin_read_TIMER7_WIDTH() bfin_read32(TIMER7_WIDTH)
176#define bfin_write_TIMER7_WIDTH(val) bfin_write32(TIMER7_WIDTH, val)
177#define bfin_read_TIMER_ENABLE() bfin_read16(TIMER_ENABLE)
178#define bfin_write_TIMER_ENABLE(val) bfin_write16(TIMER_ENABLE, val)
179#define bfin_read_TIMER_DISABLE() bfin_read16(TIMER_DISABLE)
180#define bfin_write_TIMER_DISABLE(val) bfin_write16(TIMER_DISABLE, val)
181#define bfin_read_TIMER_STATUS() bfin_read32(TIMER_STATUS)
182#define bfin_write_TIMER_STATUS(val) bfin_write32(TIMER_STATUS, val)
183#define bfin_read_PORTFIO() bfin_read16(PORTFIO)
184#define bfin_write_PORTFIO(val) bfin_write16(PORTFIO, val)
185#define bfin_read_PORTFIO_CLEAR() bfin_read16(PORTFIO_CLEAR)
186#define bfin_write_PORTFIO_CLEAR(val) bfin_write16(PORTFIO_CLEAR, val)
187#define bfin_read_PORTFIO_SET() bfin_read16(PORTFIO_SET)
188#define bfin_write_PORTFIO_SET(val) bfin_write16(PORTFIO_SET, val)
189#define bfin_read_PORTFIO_TOGGLE() bfin_read16(PORTFIO_TOGGLE)
190#define bfin_write_PORTFIO_TOGGLE(val) bfin_write16(PORTFIO_TOGGLE, val)
191#define bfin_read_PORTFIO_MASKA() bfin_read16(PORTFIO_MASKA)
192#define bfin_write_PORTFIO_MASKA(val) bfin_write16(PORTFIO_MASKA, val)
193#define bfin_read_PORTFIO_MASKA_CLEAR() bfin_read16(PORTFIO_MASKA_CLEAR)
194#define bfin_write_PORTFIO_MASKA_CLEAR(val) bfin_write16(PORTFIO_MASKA_CLEAR, val)
195#define bfin_read_PORTFIO_MASKA_SET() bfin_read16(PORTFIO_MASKA_SET)
196#define bfin_write_PORTFIO_MASKA_SET(val) bfin_write16(PORTFIO_MASKA_SET, val)
197#define bfin_read_PORTFIO_MASKA_TOGGLE() bfin_read16(PORTFIO_MASKA_TOGGLE)
198#define bfin_write_PORTFIO_MASKA_TOGGLE(val) bfin_write16(PORTFIO_MASKA_TOGGLE, val)
199#define bfin_read_PORTFIO_MASKB() bfin_read16(PORTFIO_MASKB)
200#define bfin_write_PORTFIO_MASKB(val) bfin_write16(PORTFIO_MASKB, val)
201#define bfin_read_PORTFIO_MASKB_CLEAR() bfin_read16(PORTFIO_MASKB_CLEAR)
202#define bfin_write_PORTFIO_MASKB_CLEAR(val) bfin_write16(PORTFIO_MASKB_CLEAR, val)
203#define bfin_read_PORTFIO_MASKB_SET() bfin_read16(PORTFIO_MASKB_SET)
204#define bfin_write_PORTFIO_MASKB_SET(val) bfin_write16(PORTFIO_MASKB_SET, val)
205#define bfin_read_PORTFIO_MASKB_TOGGLE() bfin_read16(PORTFIO_MASKB_TOGGLE)
206#define bfin_write_PORTFIO_MASKB_TOGGLE(val) bfin_write16(PORTFIO_MASKB_TOGGLE, val)
207#define bfin_read_PORTFIO_DIR() bfin_read16(PORTFIO_DIR)
208#define bfin_write_PORTFIO_DIR(val) bfin_write16(PORTFIO_DIR, val)
209#define bfin_read_PORTFIO_POLAR() bfin_read16(PORTFIO_POLAR)
210#define bfin_write_PORTFIO_POLAR(val) bfin_write16(PORTFIO_POLAR, val)
211#define bfin_read_PORTFIO_EDGE() bfin_read16(PORTFIO_EDGE)
212#define bfin_write_PORTFIO_EDGE(val) bfin_write16(PORTFIO_EDGE, val)
213#define bfin_read_PORTFIO_BOTH() bfin_read16(PORTFIO_BOTH)
214#define bfin_write_PORTFIO_BOTH(val) bfin_write16(PORTFIO_BOTH, val)
215#define bfin_read_PORTFIO_INEN() bfin_read16(PORTFIO_INEN)
216#define bfin_write_PORTFIO_INEN(val) bfin_write16(PORTFIO_INEN, val)
217#define bfin_read_SPORT0_TCR1() bfin_read16(SPORT0_TCR1)
218#define bfin_write_SPORT0_TCR1(val) bfin_write16(SPORT0_TCR1, val)
219#define bfin_read_SPORT0_TCR2() bfin_read16(SPORT0_TCR2)
220#define bfin_write_SPORT0_TCR2(val) bfin_write16(SPORT0_TCR2, val)
221#define bfin_read_SPORT0_TCLKDIV() bfin_read16(SPORT0_TCLKDIV)
222#define bfin_write_SPORT0_TCLKDIV(val) bfin_write16(SPORT0_TCLKDIV, val)
223#define bfin_read_SPORT0_TFSDIV() bfin_read16(SPORT0_TFSDIV)
224#define bfin_write_SPORT0_TFSDIV(val) bfin_write16(SPORT0_TFSDIV, val)
225#define bfin_write_SPORT0_TX(val) bfin_write32(SPORT0_TX, val)
226#define bfin_read_SPORT0_RX() bfin_read32(SPORT0_RX)
227#define bfin_write_SPORT0_RX(val) bfin_write32(SPORT0_RX, val)
228#define bfin_read_SPORT0_RCR1() bfin_read16(SPORT0_RCR1)
229#define bfin_write_SPORT0_RCR1(val) bfin_write16(SPORT0_RCR1, val)
230#define bfin_read_SPORT0_RCR2() bfin_read16(SPORT0_RCR2)
231#define bfin_write_SPORT0_RCR2(val) bfin_write16(SPORT0_RCR2, val)
232#define bfin_read_SPORT0_RCLKDIV() bfin_read16(SPORT0_RCLKDIV)
233#define bfin_write_SPORT0_RCLKDIV(val) bfin_write16(SPORT0_RCLKDIV, val)
234#define bfin_read_SPORT0_RFSDIV() bfin_read16(SPORT0_RFSDIV)
235#define bfin_write_SPORT0_RFSDIV(val) bfin_write16(SPORT0_RFSDIV, val)
236#define bfin_read_SPORT0_STAT() bfin_read16(SPORT0_STAT)
237#define bfin_write_SPORT0_STAT(val) bfin_write16(SPORT0_STAT, val)
238#define bfin_read_SPORT0_CHNL() bfin_read16(SPORT0_CHNL)
239#define bfin_write_SPORT0_CHNL(val) bfin_write16(SPORT0_CHNL, val)
240#define bfin_read_SPORT0_MCMC1() bfin_read16(SPORT0_MCMC1)
241#define bfin_write_SPORT0_MCMC1(val) bfin_write16(SPORT0_MCMC1, val)
242#define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2)
243#define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2, val)
244#define bfin_read_SPORT0_MTCS0() bfin_read32(SPORT0_MTCS0)
245#define bfin_write_SPORT0_MTCS0(val) bfin_write32(SPORT0_MTCS0, val)
246#define bfin_read_SPORT0_MTCS1() bfin_read32(SPORT0_MTCS1)
247#define bfin_write_SPORT0_MTCS1(val) bfin_write32(SPORT0_MTCS1, val)
248#define bfin_read_SPORT0_MTCS2() bfin_read32(SPORT0_MTCS2)
249#define bfin_write_SPORT0_MTCS2(val) bfin_write32(SPORT0_MTCS2, val)
250#define bfin_read_SPORT0_MTCS3() bfin_read32(SPORT0_MTCS3)
251#define bfin_write_SPORT0_MTCS3(val) bfin_write32(SPORT0_MTCS3, val)
252#define bfin_read_SPORT0_MRCS0() bfin_read32(SPORT0_MRCS0)
253#define bfin_write_SPORT0_MRCS0(val) bfin_write32(SPORT0_MRCS0, val)
254#define bfin_read_SPORT0_MRCS1() bfin_read32(SPORT0_MRCS1)
255#define bfin_write_SPORT0_MRCS1(val) bfin_write32(SPORT0_MRCS1, val)
256#define bfin_read_SPORT0_MRCS2() bfin_read32(SPORT0_MRCS2)
257#define bfin_write_SPORT0_MRCS2(val) bfin_write32(SPORT0_MRCS2, val)
258#define bfin_read_SPORT0_MRCS3() bfin_read32(SPORT0_MRCS3)
259#define bfin_write_SPORT0_MRCS3(val) bfin_write32(SPORT0_MRCS3, val)
260#define bfin_read_SPORT1_TCR1() bfin_read16(SPORT1_TCR1)
261#define bfin_write_SPORT1_TCR1(val) bfin_write16(SPORT1_TCR1, val)
262#define bfin_read_SPORT1_TCR2() bfin_read16(SPORT1_TCR2)
263#define bfin_write_SPORT1_TCR2(val) bfin_write16(SPORT1_TCR2, val)
264#define bfin_read_SPORT1_TCLKDIV() bfin_read16(SPORT1_TCLKDIV)
265#define bfin_write_SPORT1_TCLKDIV(val) bfin_write16(SPORT1_TCLKDIV, val)
266#define bfin_read_SPORT1_TFSDIV() bfin_read16(SPORT1_TFSDIV)
267#define bfin_write_SPORT1_TFSDIV(val) bfin_write16(SPORT1_TFSDIV, val)
268#define bfin_write_SPORT1_TX(val) bfin_write32(SPORT1_TX, val)
269#define bfin_read_SPORT1_RX() bfin_read32(SPORT1_RX)
270#define bfin_write_SPORT1_RX(val) bfin_write32(SPORT1_RX, val)
271#define bfin_read_SPORT1_RCR1() bfin_read16(SPORT1_RCR1)
272#define bfin_write_SPORT1_RCR1(val) bfin_write16(SPORT1_RCR1, val)
273#define bfin_read_SPORT1_RCR2() bfin_read16(SPORT1_RCR2)
274#define bfin_write_SPORT1_RCR2(val) bfin_write16(SPORT1_RCR2, val)
275#define bfin_read_SPORT1_RCLKDIV() bfin_read16(SPORT1_RCLKDIV)
276#define bfin_write_SPORT1_RCLKDIV(val) bfin_write16(SPORT1_RCLKDIV, val)
277#define bfin_read_SPORT1_RFSDIV() bfin_read16(SPORT1_RFSDIV)
278#define bfin_write_SPORT1_RFSDIV(val) bfin_write16(SPORT1_RFSDIV, val)
279#define bfin_read_SPORT1_STAT() bfin_read16(SPORT1_STAT)
280#define bfin_write_SPORT1_STAT(val) bfin_write16(SPORT1_STAT, val)
281#define bfin_read_SPORT1_CHNL() bfin_read16(SPORT1_CHNL)
282#define bfin_write_SPORT1_CHNL(val) bfin_write16(SPORT1_CHNL, val)
283#define bfin_read_SPORT1_MCMC1() bfin_read16(SPORT1_MCMC1)
284#define bfin_write_SPORT1_MCMC1(val) bfin_write16(SPORT1_MCMC1, val)
285#define bfin_read_SPORT1_MCMC2() bfin_read16(SPORT1_MCMC2)
286#define bfin_write_SPORT1_MCMC2(val) bfin_write16(SPORT1_MCMC2, val)
287#define bfin_read_SPORT1_MTCS0() bfin_read32(SPORT1_MTCS0)
288#define bfin_write_SPORT1_MTCS0(val) bfin_write32(SPORT1_MTCS0, val)
289#define bfin_read_SPORT1_MTCS1() bfin_read32(SPORT1_MTCS1)
290#define bfin_write_SPORT1_MTCS1(val) bfin_write32(SPORT1_MTCS1, val)
291#define bfin_read_SPORT1_MTCS2() bfin_read32(SPORT1_MTCS2)
292#define bfin_write_SPORT1_MTCS2(val) bfin_write32(SPORT1_MTCS2, val)
293#define bfin_read_SPORT1_MTCS3() bfin_read32(SPORT1_MTCS3)
294#define bfin_write_SPORT1_MTCS3(val) bfin_write32(SPORT1_MTCS3, val)
295#define bfin_read_SPORT1_MRCS0() bfin_read32(SPORT1_MRCS0)
296#define bfin_write_SPORT1_MRCS0(val) bfin_write32(SPORT1_MRCS0, val)
297#define bfin_read_SPORT1_MRCS1() bfin_read32(SPORT1_MRCS1)
298#define bfin_write_SPORT1_MRCS1(val) bfin_write32(SPORT1_MRCS1, val)
299#define bfin_read_SPORT1_MRCS2() bfin_read32(SPORT1_MRCS2)
300#define bfin_write_SPORT1_MRCS2(val) bfin_write32(SPORT1_MRCS2, val)
301#define bfin_read_SPORT1_MRCS3() bfin_read32(SPORT1_MRCS3)
302#define bfin_write_SPORT1_MRCS3(val) bfin_write32(SPORT1_MRCS3, val)
303#define bfin_read_EBIU_AMGCTL() bfin_read16(EBIU_AMGCTL)
304#define bfin_write_EBIU_AMGCTL(val) bfin_write16(EBIU_AMGCTL, val)
305#define bfin_read_EBIU_AMBCTL0() bfin_read32(EBIU_AMBCTL0)
306#define bfin_write_EBIU_AMBCTL0(val) bfin_write32(EBIU_AMBCTL0, val)
307#define bfin_read_EBIU_AMBCTL1() bfin_read32(EBIU_AMBCTL1)
308#define bfin_write_EBIU_AMBCTL1(val) bfin_write32(EBIU_AMBCTL1, val)
309#define bfin_read_EBIU_SDGCTL() bfin_read32(EBIU_SDGCTL)
310#define bfin_write_EBIU_SDGCTL(val) bfin_write32(EBIU_SDGCTL, val)
311#define bfin_read_EBIU_SDBCTL() bfin_read16(EBIU_SDBCTL)
312#define bfin_write_EBIU_SDBCTL(val) bfin_write16(EBIU_SDBCTL, val)
313#define bfin_read_EBIU_SDRRC() bfin_read16(EBIU_SDRRC)
314#define bfin_write_EBIU_SDRRC(val) bfin_write16(EBIU_SDRRC, val)
315#define bfin_read_EBIU_SDSTAT() bfin_read16(EBIU_SDSTAT)
316#define bfin_write_EBIU_SDSTAT(val) bfin_write16(EBIU_SDSTAT, val)
317#define bfin_read_DMA0_NEXT_DESC_PTR() bfin_readPTR(DMA0_NEXT_DESC_PTR)
318#define bfin_write_DMA0_NEXT_DESC_PTR(val) bfin_writePTR(DMA0_NEXT_DESC_PTR, val)
319#define bfin_read_DMA0_START_ADDR() bfin_readPTR(DMA0_START_ADDR)
320#define bfin_write_DMA0_START_ADDR(val) bfin_writePTR(DMA0_START_ADDR, val)
321#define bfin_read_DMA0_CONFIG() bfin_read16(DMA0_CONFIG)
322#define bfin_write_DMA0_CONFIG(val) bfin_write16(DMA0_CONFIG, val)
323#define bfin_read_DMA0_X_COUNT() bfin_read16(DMA0_X_COUNT)
324#define bfin_write_DMA0_X_COUNT(val) bfin_write16(DMA0_X_COUNT, val)
325#define bfin_read_DMA0_X_MODIFY() bfin_read16(DMA0_X_MODIFY)
326#define bfin_write_DMA0_X_MODIFY(val) bfin_write16(DMA0_X_MODIFY, val)
327#define bfin_read_DMA0_Y_COUNT() bfin_read16(DMA0_Y_COUNT)
328#define bfin_write_DMA0_Y_COUNT(val) bfin_write16(DMA0_Y_COUNT, val)
329#define bfin_read_DMA0_Y_MODIFY() bfin_read16(DMA0_Y_MODIFY)
330#define bfin_write_DMA0_Y_MODIFY(val) bfin_write16(DMA0_Y_MODIFY, val)
331#define bfin_read_DMA0_CURR_DESC_PTR() bfin_readPTR(DMA0_CURR_DESC_PTR)
332#define bfin_write_DMA0_CURR_DESC_PTR(val) bfin_writePTR(DMA0_CURR_DESC_PTR, val)
333#define bfin_read_DMA0_CURR_ADDR() bfin_readPTR(DMA0_CURR_ADDR)
334#define bfin_write_DMA0_CURR_ADDR(val) bfin_writePTR(DMA0_CURR_ADDR, val)
335#define bfin_read_DMA0_IRQ_STATUS() bfin_read16(DMA0_IRQ_STATUS)
336#define bfin_write_DMA0_IRQ_STATUS(val) bfin_write16(DMA0_IRQ_STATUS, val)
337#define bfin_read_DMA0_PERIPHERAL_MAP() bfin_read16(DMA0_PERIPHERAL_MAP)
338#define bfin_write_DMA0_PERIPHERAL_MAP(val) bfin_write16(DMA0_PERIPHERAL_MAP, val)
339#define bfin_read_DMA0_CURR_X_COUNT() bfin_read16(DMA0_CURR_X_COUNT)
340#define bfin_write_DMA0_CURR_X_COUNT(val) bfin_write16(DMA0_CURR_X_COUNT, val)
341#define bfin_read_DMA0_CURR_Y_COUNT() bfin_read16(DMA0_CURR_Y_COUNT)
342#define bfin_write_DMA0_CURR_Y_COUNT(val) bfin_write16(DMA0_CURR_Y_COUNT, val)
343#define bfin_read_DMA1_NEXT_DESC_PTR() bfin_readPTR(DMA1_NEXT_DESC_PTR)
344#define bfin_write_DMA1_NEXT_DESC_PTR(val) bfin_writePTR(DMA1_NEXT_DESC_PTR, val)
345#define bfin_read_DMA1_START_ADDR() bfin_readPTR(DMA1_START_ADDR)
346#define bfin_write_DMA1_START_ADDR(val) bfin_writePTR(DMA1_START_ADDR, val)
347#define bfin_read_DMA1_CONFIG() bfin_read16(DMA1_CONFIG)
348#define bfin_write_DMA1_CONFIG(val) bfin_write16(DMA1_CONFIG, val)
349#define bfin_read_DMA1_X_COUNT() bfin_read16(DMA1_X_COUNT)
350#define bfin_write_DMA1_X_COUNT(val) bfin_write16(DMA1_X_COUNT, val)
351#define bfin_read_DMA1_X_MODIFY() bfin_read16(DMA1_X_MODIFY)
352#define bfin_write_DMA1_X_MODIFY(val) bfin_write16(DMA1_X_MODIFY, val)
353#define bfin_read_DMA1_Y_COUNT() bfin_read16(DMA1_Y_COUNT)
354#define bfin_write_DMA1_Y_COUNT(val) bfin_write16(DMA1_Y_COUNT, val)
355#define bfin_read_DMA1_Y_MODIFY() bfin_read16(DMA1_Y_MODIFY)
356#define bfin_write_DMA1_Y_MODIFY(val) bfin_write16(DMA1_Y_MODIFY, val)
357#define bfin_read_DMA1_CURR_DESC_PTR() bfin_readPTR(DMA1_CURR_DESC_PTR)
358#define bfin_write_DMA1_CURR_DESC_PTR(val) bfin_writePTR(DMA1_CURR_DESC_PTR, val)
359#define bfin_read_DMA1_CURR_ADDR() bfin_readPTR(DMA1_CURR_ADDR)
360#define bfin_write_DMA1_CURR_ADDR(val) bfin_writePTR(DMA1_CURR_ADDR, val)
361#define bfin_read_DMA1_IRQ_STATUS() bfin_read16(DMA1_IRQ_STATUS)
362#define bfin_write_DMA1_IRQ_STATUS(val) bfin_write16(DMA1_IRQ_STATUS, val)
363#define bfin_read_DMA1_PERIPHERAL_MAP() bfin_read16(DMA1_PERIPHERAL_MAP)
364#define bfin_write_DMA1_PERIPHERAL_MAP(val) bfin_write16(DMA1_PERIPHERAL_MAP, val)
365#define bfin_read_DMA1_CURR_X_COUNT() bfin_read16(DMA1_CURR_X_COUNT)
366#define bfin_write_DMA1_CURR_X_COUNT(val) bfin_write16(DMA1_CURR_X_COUNT, val)
367#define bfin_read_DMA1_CURR_Y_COUNT() bfin_read16(DMA1_CURR_Y_COUNT)
368#define bfin_write_DMA1_CURR_Y_COUNT(val) bfin_write16(DMA1_CURR_Y_COUNT, val)
369#define bfin_read_DMA2_NEXT_DESC_PTR() bfin_readPTR(DMA2_NEXT_DESC_PTR)
370#define bfin_write_DMA2_NEXT_DESC_PTR(val) bfin_writePTR(DMA2_NEXT_DESC_PTR, val)
371#define bfin_read_DMA2_START_ADDR() bfin_readPTR(DMA2_START_ADDR)
372#define bfin_write_DMA2_START_ADDR(val) bfin_writePTR(DMA2_START_ADDR, val)
373#define bfin_read_DMA2_CONFIG() bfin_read16(DMA2_CONFIG)
374#define bfin_write_DMA2_CONFIG(val) bfin_write16(DMA2_CONFIG, val)
375#define bfin_read_DMA2_X_COUNT() bfin_read16(DMA2_X_COUNT)
376#define bfin_write_DMA2_X_COUNT(val) bfin_write16(DMA2_X_COUNT, val)
377#define bfin_read_DMA2_X_MODIFY() bfin_read16(DMA2_X_MODIFY)
378#define bfin_write_DMA2_X_MODIFY(val) bfin_write16(DMA2_X_MODIFY, val)
379#define bfin_read_DMA2_Y_COUNT() bfin_read16(DMA2_Y_COUNT)
380#define bfin_write_DMA2_Y_COUNT(val) bfin_write16(DMA2_Y_COUNT, val)
381#define bfin_read_DMA2_Y_MODIFY() bfin_read16(DMA2_Y_MODIFY)
382#define bfin_write_DMA2_Y_MODIFY(val) bfin_write16(DMA2_Y_MODIFY, val)
383#define bfin_read_DMA2_CURR_DESC_PTR() bfin_readPTR(DMA2_CURR_DESC_PTR)
384#define bfin_write_DMA2_CURR_DESC_PTR(val) bfin_writePTR(DMA2_CURR_DESC_PTR, val)
385#define bfin_read_DMA2_CURR_ADDR() bfin_readPTR(DMA2_CURR_ADDR)
386#define bfin_write_DMA2_CURR_ADDR(val) bfin_writePTR(DMA2_CURR_ADDR, val)
387#define bfin_read_DMA2_IRQ_STATUS() bfin_read16(DMA2_IRQ_STATUS)
388#define bfin_write_DMA2_IRQ_STATUS(val) bfin_write16(DMA2_IRQ_STATUS, val)
389#define bfin_read_DMA2_PERIPHERAL_MAP() bfin_read16(DMA2_PERIPHERAL_MAP)
390#define bfin_write_DMA2_PERIPHERAL_MAP(val) bfin_write16(DMA2_PERIPHERAL_MAP, val)
391#define bfin_read_DMA2_CURR_X_COUNT() bfin_read16(DMA2_CURR_X_COUNT)
392#define bfin_write_DMA2_CURR_X_COUNT(val) bfin_write16(DMA2_CURR_X_COUNT, val)
393#define bfin_read_DMA2_CURR_Y_COUNT() bfin_read16(DMA2_CURR_Y_COUNT)
394#define bfin_write_DMA2_CURR_Y_COUNT(val) bfin_write16(DMA2_CURR_Y_COUNT, val)
395#define bfin_read_DMA3_NEXT_DESC_PTR() bfin_readPTR(DMA3_NEXT_DESC_PTR)
396#define bfin_write_DMA3_NEXT_DESC_PTR(val) bfin_writePTR(DMA3_NEXT_DESC_PTR, val)
397#define bfin_read_DMA3_START_ADDR() bfin_readPTR(DMA3_START_ADDR)
398#define bfin_write_DMA3_START_ADDR(val) bfin_writePTR(DMA3_START_ADDR, val)
399#define bfin_read_DMA3_CONFIG() bfin_read16(DMA3_CONFIG)
400#define bfin_write_DMA3_CONFIG(val) bfin_write16(DMA3_CONFIG, val)
401#define bfin_read_DMA3_X_COUNT() bfin_read16(DMA3_X_COUNT)
402#define bfin_write_DMA3_X_COUNT(val) bfin_write16(DMA3_X_COUNT, val)
403#define bfin_read_DMA3_X_MODIFY() bfin_read16(DMA3_X_MODIFY)
404#define bfin_write_DMA3_X_MODIFY(val) bfin_write16(DMA3_X_MODIFY, val)
405#define bfin_read_DMA3_Y_COUNT() bfin_read16(DMA3_Y_COUNT)
406#define bfin_write_DMA3_Y_COUNT(val) bfin_write16(DMA3_Y_COUNT, val)
407#define bfin_read_DMA3_Y_MODIFY() bfin_read16(DMA3_Y_MODIFY)
408#define bfin_write_DMA3_Y_MODIFY(val) bfin_write16(DMA3_Y_MODIFY, val)
409#define bfin_read_DMA3_CURR_DESC_PTR() bfin_readPTR(DMA3_CURR_DESC_PTR)
410#define bfin_write_DMA3_CURR_DESC_PTR(val) bfin_writePTR(DMA3_CURR_DESC_PTR, val)
411#define bfin_read_DMA3_CURR_ADDR() bfin_readPTR(DMA3_CURR_ADDR)
412#define bfin_write_DMA3_CURR_ADDR(val) bfin_writePTR(DMA3_CURR_ADDR, val)
413#define bfin_read_DMA3_IRQ_STATUS() bfin_read16(DMA3_IRQ_STATUS)
414#define bfin_write_DMA3_IRQ_STATUS(val) bfin_write16(DMA3_IRQ_STATUS, val)
415#define bfin_read_DMA3_PERIPHERAL_MAP() bfin_read16(DMA3_PERIPHERAL_MAP)
416#define bfin_write_DMA3_PERIPHERAL_MAP(val) bfin_write16(DMA3_PERIPHERAL_MAP, val)
417#define bfin_read_DMA3_CURR_X_COUNT() bfin_read16(DMA3_CURR_X_COUNT)
418#define bfin_write_DMA3_CURR_X_COUNT(val) bfin_write16(DMA3_CURR_X_COUNT, val)
419#define bfin_read_DMA3_CURR_Y_COUNT() bfin_read16(DMA3_CURR_Y_COUNT)
420#define bfin_write_DMA3_CURR_Y_COUNT(val) bfin_write16(DMA3_CURR_Y_COUNT, val)
421#define bfin_read_DMA4_NEXT_DESC_PTR() bfin_readPTR(DMA4_NEXT_DESC_PTR)
422#define bfin_write_DMA4_NEXT_DESC_PTR(val) bfin_writePTR(DMA4_NEXT_DESC_PTR, val)
423#define bfin_read_DMA4_START_ADDR() bfin_readPTR(DMA4_START_ADDR)
424#define bfin_write_DMA4_START_ADDR(val) bfin_writePTR(DMA4_START_ADDR, val)
425#define bfin_read_DMA4_CONFIG() bfin_read16(DMA4_CONFIG)
426#define bfin_write_DMA4_CONFIG(val) bfin_write16(DMA4_CONFIG, val)
427#define bfin_read_DMA4_X_COUNT() bfin_read16(DMA4_X_COUNT)
428#define bfin_write_DMA4_X_COUNT(val) bfin_write16(DMA4_X_COUNT, val)
429#define bfin_read_DMA4_X_MODIFY() bfin_read16(DMA4_X_MODIFY)
430#define bfin_write_DMA4_X_MODIFY(val) bfin_write16(DMA4_X_MODIFY, val)
431#define bfin_read_DMA4_Y_COUNT() bfin_read16(DMA4_Y_COUNT)
432#define bfin_write_DMA4_Y_COUNT(val) bfin_write16(DMA4_Y_COUNT, val)
433#define bfin_read_DMA4_Y_MODIFY() bfin_read16(DMA4_Y_MODIFY)
434#define bfin_write_DMA4_Y_MODIFY(val) bfin_write16(DMA4_Y_MODIFY, val)
435#define bfin_read_DMA4_CURR_DESC_PTR() bfin_readPTR(DMA4_CURR_DESC_PTR)
436#define bfin_write_DMA4_CURR_DESC_PTR(val) bfin_writePTR(DMA4_CURR_DESC_PTR, val)
437#define bfin_read_DMA4_CURR_ADDR() bfin_readPTR(DMA4_CURR_ADDR)
438#define bfin_write_DMA4_CURR_ADDR(val) bfin_writePTR(DMA4_CURR_ADDR, val)
439#define bfin_read_DMA4_IRQ_STATUS() bfin_read16(DMA4_IRQ_STATUS)
440#define bfin_write_DMA4_IRQ_STATUS(val) bfin_write16(DMA4_IRQ_STATUS, val)
441#define bfin_read_DMA4_PERIPHERAL_MAP() bfin_read16(DMA4_PERIPHERAL_MAP)
442#define bfin_write_DMA4_PERIPHERAL_MAP(val) bfin_write16(DMA4_PERIPHERAL_MAP, val)
443#define bfin_read_DMA4_CURR_X_COUNT() bfin_read16(DMA4_CURR_X_COUNT)
444#define bfin_write_DMA4_CURR_X_COUNT(val) bfin_write16(DMA4_CURR_X_COUNT, val)
445#define bfin_read_DMA4_CURR_Y_COUNT() bfin_read16(DMA4_CURR_Y_COUNT)
446#define bfin_write_DMA4_CURR_Y_COUNT(val) bfin_write16(DMA4_CURR_Y_COUNT, val)
447#define bfin_read_DMA5_NEXT_DESC_PTR() bfin_readPTR(DMA5_NEXT_DESC_PTR)
448#define bfin_write_DMA5_NEXT_DESC_PTR(val) bfin_writePTR(DMA5_NEXT_DESC_PTR, val)
449#define bfin_read_DMA5_START_ADDR() bfin_readPTR(DMA5_START_ADDR)
450#define bfin_write_DMA5_START_ADDR(val) bfin_writePTR(DMA5_START_ADDR, val)
451#define bfin_read_DMA5_CONFIG() bfin_read16(DMA5_CONFIG)
452#define bfin_write_DMA5_CONFIG(val) bfin_write16(DMA5_CONFIG, val)
453#define bfin_read_DMA5_X_COUNT() bfin_read16(DMA5_X_COUNT)
454#define bfin_write_DMA5_X_COUNT(val) bfin_write16(DMA5_X_COUNT, val)
455#define bfin_read_DMA5_X_MODIFY() bfin_read16(DMA5_X_MODIFY)
456#define bfin_write_DMA5_X_MODIFY(val) bfin_write16(DMA5_X_MODIFY, val)
457#define bfin_read_DMA5_Y_COUNT() bfin_read16(DMA5_Y_COUNT)
458#define bfin_write_DMA5_Y_COUNT(val) bfin_write16(DMA5_Y_COUNT, val)
459#define bfin_read_DMA5_Y_MODIFY() bfin_read16(DMA5_Y_MODIFY)
460#define bfin_write_DMA5_Y_MODIFY(val) bfin_write16(DMA5_Y_MODIFY, val)
461#define bfin_read_DMA5_CURR_DESC_PTR() bfin_readPTR(DMA5_CURR_DESC_PTR)
462#define bfin_write_DMA5_CURR_DESC_PTR(val) bfin_writePTR(DMA5_CURR_DESC_PTR, val)
463#define bfin_read_DMA5_CURR_ADDR() bfin_readPTR(DMA5_CURR_ADDR)
464#define bfin_write_DMA5_CURR_ADDR(val) bfin_writePTR(DMA5_CURR_ADDR, val)
465#define bfin_read_DMA5_IRQ_STATUS() bfin_read16(DMA5_IRQ_STATUS)
466#define bfin_write_DMA5_IRQ_STATUS(val) bfin_write16(DMA5_IRQ_STATUS, val)
467#define bfin_read_DMA5_PERIPHERAL_MAP() bfin_read16(DMA5_PERIPHERAL_MAP)
468#define bfin_write_DMA5_PERIPHERAL_MAP(val) bfin_write16(DMA5_PERIPHERAL_MAP, val)
469#define bfin_read_DMA5_CURR_X_COUNT() bfin_read16(DMA5_CURR_X_COUNT)
470#define bfin_write_DMA5_CURR_X_COUNT(val) bfin_write16(DMA5_CURR_X_COUNT, val)
471#define bfin_read_DMA5_CURR_Y_COUNT() bfin_read16(DMA5_CURR_Y_COUNT)
472#define bfin_write_DMA5_CURR_Y_COUNT(val) bfin_write16(DMA5_CURR_Y_COUNT, val)
473#define bfin_read_DMA6_NEXT_DESC_PTR() bfin_read32(DMA6_NEXT_DESC_PTR)
474#define bfin_write_DMA6_NEXT_DESC_PTR(val) bfin_write32(DMA6_NEXT_DESC_PTR, val)
475#define bfin_read_DMA6_START_ADDR() bfin_readPTR(DMA6_START_ADDR)
476#define bfin_write_DMA6_START_ADDR(val) bfin_writePTR(DMA6_START_ADDR, val)
477#define bfin_read_DMA6_CONFIG() bfin_read16(DMA6_CONFIG)
478#define bfin_write_DMA6_CONFIG(val) bfin_write16(DMA6_CONFIG, val)
479#define bfin_read_DMA6_X_COUNT() bfin_read16(DMA6_X_COUNT)
480#define bfin_write_DMA6_X_COUNT(val) bfin_write16(DMA6_X_COUNT, val)
481#define bfin_read_DMA6_X_MODIFY() bfin_read16(DMA6_X_MODIFY)
482#define bfin_write_DMA6_X_MODIFY(val) bfin_write16(DMA6_X_MODIFY, val)
483#define bfin_read_DMA6_Y_COUNT() bfin_read16(DMA6_Y_COUNT)
484#define bfin_write_DMA6_Y_COUNT(val) bfin_write16(DMA6_Y_COUNT, val)
485#define bfin_read_DMA6_Y_MODIFY() bfin_read16(DMA6_Y_MODIFY)
486#define bfin_write_DMA6_Y_MODIFY(val) bfin_write16(DMA6_Y_MODIFY, val)
487#define bfin_read_DMA6_CURR_DESC_PTR() bfin_readPTR(DMA6_CURR_DESC_PTR)
488#define bfin_write_DMA6_CURR_DESC_PTR(val) bfin_writePTR(DMA6_CURR_DESC_PTR, val)
489#define bfin_read_DMA6_CURR_ADDR() bfin_readPTR(DMA6_CURR_ADDR)
490#define bfin_write_DMA6_CURR_ADDR(val) bfin_writePTR(DMA6_CURR_ADDR, val)
491#define bfin_read_DMA6_IRQ_STATUS() bfin_read16(DMA6_IRQ_STATUS)
492#define bfin_write_DMA6_IRQ_STATUS(val) bfin_write16(DMA6_IRQ_STATUS, val)
493#define bfin_read_DMA6_PERIPHERAL_MAP() bfin_read16(DMA6_PERIPHERAL_MAP)
494#define bfin_write_DMA6_PERIPHERAL_MAP(val) bfin_write16(DMA6_PERIPHERAL_MAP, val)
495#define bfin_read_DMA6_CURR_X_COUNT() bfin_read16(DMA6_CURR_X_COUNT)
496#define bfin_write_DMA6_CURR_X_COUNT(val) bfin_write16(DMA6_CURR_X_COUNT, val)
497#define bfin_read_DMA6_CURR_Y_COUNT() bfin_read16(DMA6_CURR_Y_COUNT)
498#define bfin_write_DMA6_CURR_Y_COUNT(val) bfin_write16(DMA6_CURR_Y_COUNT, val)
499#define bfin_read_DMA7_NEXT_DESC_PTR() bfin_readPTR(DMA7_NEXT_DESC_PTR)
500#define bfin_write_DMA7_NEXT_DESC_PTR(val) bfin_writePTR(DMA7_NEXT_DESC_PTR, val)
501#define bfin_read_DMA7_START_ADDR() bfin_readPTR(DMA7_START_ADDR)
502#define bfin_write_DMA7_START_ADDR(val) bfin_writePTR(DMA7_START_ADDR, val)
503#define bfin_read_DMA7_CONFIG() bfin_read16(DMA7_CONFIG)
504#define bfin_write_DMA7_CONFIG(val) bfin_write16(DMA7_CONFIG, val)
505#define bfin_read_DMA7_X_COUNT() bfin_read16(DMA7_X_COUNT)
506#define bfin_write_DMA7_X_COUNT(val) bfin_write16(DMA7_X_COUNT, val)
507#define bfin_read_DMA7_X_MODIFY() bfin_read16(DMA7_X_MODIFY)
508#define bfin_write_DMA7_X_MODIFY(val) bfin_write16(DMA7_X_MODIFY, val)
509#define bfin_read_DMA7_Y_COUNT() bfin_read16(DMA7_Y_COUNT)
510#define bfin_write_DMA7_Y_COUNT(val) bfin_write16(DMA7_Y_COUNT, val)
511#define bfin_read_DMA7_Y_MODIFY() bfin_read16(DMA7_Y_MODIFY)
512#define bfin_write_DMA7_Y_MODIFY(val) bfin_write16(DMA7_Y_MODIFY, val)
513#define bfin_read_DMA7_CURR_DESC_PTR() bfin_readPTR(DMA7_CURR_DESC_PTR)
514#define bfin_write_DMA7_CURR_DESC_PTR(val) bfin_writePTR(DMA7_CURR_DESC_PTR, val)
515#define bfin_read_DMA7_CURR_ADDR() bfin_readPTR(DMA7_CURR_ADDR)
516#define bfin_write_DMA7_CURR_ADDR(val) bfin_writePTR(DMA7_CURR_ADDR, val)
517#define bfin_read_DMA7_IRQ_STATUS() bfin_read16(DMA7_IRQ_STATUS)
518#define bfin_write_DMA7_IRQ_STATUS(val) bfin_write16(DMA7_IRQ_STATUS, val)
519#define bfin_read_DMA7_PERIPHERAL_MAP() bfin_read16(DMA7_PERIPHERAL_MAP)
520#define bfin_write_DMA7_PERIPHERAL_MAP(val) bfin_write16(DMA7_PERIPHERAL_MAP, val)
521#define bfin_read_DMA7_CURR_X_COUNT() bfin_read16(DMA7_CURR_X_COUNT)
522#define bfin_write_DMA7_CURR_X_COUNT(val) bfin_write16(DMA7_CURR_X_COUNT, val)
523#define bfin_read_DMA7_CURR_Y_COUNT() bfin_read16(DMA7_CURR_Y_COUNT)
524#define bfin_write_DMA7_CURR_Y_COUNT(val) bfin_write16(DMA7_CURR_Y_COUNT, val)
525#define bfin_read_DMA8_NEXT_DESC_PTR() bfin_readPTR(DMA8_NEXT_DESC_PTR)
526#define bfin_write_DMA8_NEXT_DESC_PTR(val) bfin_writePTR(DMA8_NEXT_DESC_PTR, val)
527#define bfin_read_DMA8_START_ADDR() bfin_readPTR(DMA8_START_ADDR)
528#define bfin_write_DMA8_START_ADDR(val) bfin_writePTR(DMA8_START_ADDR, val)
529#define bfin_read_DMA8_CONFIG() bfin_read16(DMA8_CONFIG)
530#define bfin_write_DMA8_CONFIG(val) bfin_write16(DMA8_CONFIG, val)
531#define bfin_read_DMA8_X_COUNT() bfin_read16(DMA8_X_COUNT)
532#define bfin_write_DMA8_X_COUNT(val) bfin_write16(DMA8_X_COUNT, val)
533#define bfin_read_DMA8_X_MODIFY() bfin_read16(DMA8_X_MODIFY)
534#define bfin_write_DMA8_X_MODIFY(val) bfin_write16(DMA8_X_MODIFY, val)
535#define bfin_read_DMA8_Y_COUNT() bfin_read16(DMA8_Y_COUNT)
536#define bfin_write_DMA8_Y_COUNT(val) bfin_write16(DMA8_Y_COUNT, val)
537#define bfin_read_DMA8_Y_MODIFY() bfin_read16(DMA8_Y_MODIFY)
538#define bfin_write_DMA8_Y_MODIFY(val) bfin_write16(DMA8_Y_MODIFY, val)
539#define bfin_read_DMA8_CURR_DESC_PTR() bfin_readPTR(DMA8_CURR_DESC_PTR)
540#define bfin_write_DMA8_CURR_DESC_PTR(val) bfin_writePTR(DMA8_CURR_DESC_PTR, val)
541#define bfin_read_DMA8_CURR_ADDR() bfin_readPTR(DMA8_CURR_ADDR)
542#define bfin_write_DMA8_CURR_ADDR(val) bfin_writePTR(DMA8_CURR_ADDR, val)
543#define bfin_read_DMA8_IRQ_STATUS() bfin_read16(DMA8_IRQ_STATUS)
544#define bfin_write_DMA8_IRQ_STATUS(val) bfin_write16(DMA8_IRQ_STATUS, val)
545#define bfin_read_DMA8_PERIPHERAL_MAP() bfin_read16(DMA8_PERIPHERAL_MAP)
546#define bfin_write_DMA8_PERIPHERAL_MAP(val) bfin_write16(DMA8_PERIPHERAL_MAP, val)
547#define bfin_read_DMA8_CURR_X_COUNT() bfin_read16(DMA8_CURR_X_COUNT)
548#define bfin_write_DMA8_CURR_X_COUNT(val) bfin_write16(DMA8_CURR_X_COUNT, val)
549#define bfin_read_DMA8_CURR_Y_COUNT() bfin_read16(DMA8_CURR_Y_COUNT)
550#define bfin_write_DMA8_CURR_Y_COUNT(val) bfin_write16(DMA8_CURR_Y_COUNT, val)
551#define bfin_read_DMA9_NEXT_DESC_PTR() bfin_readPTR(DMA9_NEXT_DESC_PTR)
552#define bfin_write_DMA9_NEXT_DESC_PTR(val) bfin_writePTR(DMA9_NEXT_DESC_PTR, val)
553#define bfin_read_DMA9_START_ADDR() bfin_readPTR(DMA9_START_ADDR)
554#define bfin_write_DMA9_START_ADDR(val) bfin_writePTR(DMA9_START_ADDR, val)
555#define bfin_read_DMA9_CONFIG() bfin_read16(DMA9_CONFIG)
556#define bfin_write_DMA9_CONFIG(val) bfin_write16(DMA9_CONFIG, val)
557#define bfin_read_DMA9_X_COUNT() bfin_read16(DMA9_X_COUNT)
558#define bfin_write_DMA9_X_COUNT(val) bfin_write16(DMA9_X_COUNT, val)
559#define bfin_read_DMA9_X_MODIFY() bfin_read16(DMA9_X_MODIFY)
560#define bfin_write_DMA9_X_MODIFY(val) bfin_write16(DMA9_X_MODIFY, val)
561#define bfin_read_DMA9_Y_COUNT() bfin_read16(DMA9_Y_COUNT)
562#define bfin_write_DMA9_Y_COUNT(val) bfin_write16(DMA9_Y_COUNT, val)
563#define bfin_read_DMA9_Y_MODIFY() bfin_read16(DMA9_Y_MODIFY)
564#define bfin_write_DMA9_Y_MODIFY(val) bfin_write16(DMA9_Y_MODIFY, val)
565#define bfin_read_DMA9_CURR_DESC_PTR() bfin_readPTR(DMA9_CURR_DESC_PTR)
566#define bfin_write_DMA9_CURR_DESC_PTR(val) bfin_writePTR(DMA9_CURR_DESC_PTR, val)
567#define bfin_read_DMA9_CURR_ADDR() bfin_readPTR(DMA9_CURR_ADDR)
568#define bfin_write_DMA9_CURR_ADDR(val) bfin_writePTR(DMA9_CURR_ADDR, val)
569#define bfin_read_DMA9_IRQ_STATUS() bfin_read16(DMA9_IRQ_STATUS)
570#define bfin_write_DMA9_IRQ_STATUS(val) bfin_write16(DMA9_IRQ_STATUS, val)
571#define bfin_read_DMA9_PERIPHERAL_MAP() bfin_read16(DMA9_PERIPHERAL_MAP)
572#define bfin_write_DMA9_PERIPHERAL_MAP(val) bfin_write16(DMA9_PERIPHERAL_MAP, val)
573#define bfin_read_DMA9_CURR_X_COUNT() bfin_read16(DMA9_CURR_X_COUNT)
574#define bfin_write_DMA9_CURR_X_COUNT(val) bfin_write16(DMA9_CURR_X_COUNT, val)
575#define bfin_read_DMA9_CURR_Y_COUNT() bfin_read16(DMA9_CURR_Y_COUNT)
576#define bfin_write_DMA9_CURR_Y_COUNT(val) bfin_write16(DMA9_CURR_Y_COUNT, val)
577#define bfin_read_DMA10_NEXT_DESC_PTR() bfin_readPTR(DMA10_NEXT_DESC_PTR)
578#define bfin_write_DMA10_NEXT_DESC_PTR(val) bfin_writePTR(DMA10_NEXT_DESC_PTR, val)
579#define bfin_read_DMA10_START_ADDR() bfin_readPTR(DMA10_START_ADDR)
580#define bfin_write_DMA10_START_ADDR(val) bfin_writePTR(DMA10_START_ADDR, val)
581#define bfin_read_DMA10_CONFIG() bfin_read16(DMA10_CONFIG)
582#define bfin_write_DMA10_CONFIG(val) bfin_write16(DMA10_CONFIG, val)
583#define bfin_read_DMA10_X_COUNT() bfin_read16(DMA10_X_COUNT)
584#define bfin_write_DMA10_X_COUNT(val) bfin_write16(DMA10_X_COUNT, val)
585#define bfin_read_DMA10_X_MODIFY() bfin_read16(DMA10_X_MODIFY)
586#define bfin_write_DMA10_X_MODIFY(val) bfin_write16(DMA10_X_MODIFY, val)
587#define bfin_read_DMA10_Y_COUNT() bfin_read16(DMA10_Y_COUNT)
588#define bfin_write_DMA10_Y_COUNT(val) bfin_write16(DMA10_Y_COUNT, val)
589#define bfin_read_DMA10_Y_MODIFY() bfin_read16(DMA10_Y_MODIFY)
590#define bfin_write_DMA10_Y_MODIFY(val) bfin_write16(DMA10_Y_MODIFY, val)
591#define bfin_read_DMA10_CURR_DESC_PTR() bfin_readPTR(DMA10_CURR_DESC_PTR)
592#define bfin_write_DMA10_CURR_DESC_PTR(val) bfin_writePTR(DMA10_CURR_DESC_PTR, val)
593#define bfin_read_DMA10_CURR_ADDR() bfin_readPTR(DMA10_CURR_ADDR)
594#define bfin_write_DMA10_CURR_ADDR(val) bfin_writePTR(DMA10_CURR_ADDR, val)
595#define bfin_read_DMA10_IRQ_STATUS() bfin_read16(DMA10_IRQ_STATUS)
596#define bfin_write_DMA10_IRQ_STATUS(val) bfin_write16(DMA10_IRQ_STATUS, val)
597#define bfin_read_DMA10_PERIPHERAL_MAP() bfin_read16(DMA10_PERIPHERAL_MAP)
598#define bfin_write_DMA10_PERIPHERAL_MAP(val) bfin_write16(DMA10_PERIPHERAL_MAP, val)
599#define bfin_read_DMA10_CURR_X_COUNT() bfin_read16(DMA10_CURR_X_COUNT)
600#define bfin_write_DMA10_CURR_X_COUNT(val) bfin_write16(DMA10_CURR_X_COUNT, val)
601#define bfin_read_DMA10_CURR_Y_COUNT() bfin_read16(DMA10_CURR_Y_COUNT)
602#define bfin_write_DMA10_CURR_Y_COUNT(val) bfin_write16(DMA10_CURR_Y_COUNT, val)
603#define bfin_read_DMA11_NEXT_DESC_PTR() bfin_readPTR(DMA11_NEXT_DESC_PTR)
604#define bfin_write_DMA11_NEXT_DESC_PTR(val) bfin_writePTR(DMA11_NEXT_DESC_PTR, val)
605#define bfin_read_DMA11_START_ADDR() bfin_readPTR(DMA11_START_ADDR)
606#define bfin_write_DMA11_START_ADDR(val) bfin_writePTR(DMA11_START_ADDR, val)
607#define bfin_read_DMA11_CONFIG() bfin_read16(DMA11_CONFIG)
608#define bfin_write_DMA11_CONFIG(val) bfin_write16(DMA11_CONFIG, val)
609#define bfin_read_DMA11_X_COUNT() bfin_read16(DMA11_X_COUNT)
610#define bfin_write_DMA11_X_COUNT(val) bfin_write16(DMA11_X_COUNT, val)
611#define bfin_read_DMA11_X_MODIFY() bfin_read16(DMA11_X_MODIFY)
612#define bfin_write_DMA11_X_MODIFY(val) bfin_write16(DMA11_X_MODIFY, val)
613#define bfin_read_DMA11_Y_COUNT() bfin_read16(DMA11_Y_COUNT)
614#define bfin_write_DMA11_Y_COUNT(val) bfin_write16(DMA11_Y_COUNT, val)
615#define bfin_read_DMA11_Y_MODIFY() bfin_read16(DMA11_Y_MODIFY)
616#define bfin_write_DMA11_Y_MODIFY(val) bfin_write16(DMA11_Y_MODIFY, val)
617#define bfin_read_DMA11_CURR_DESC_PTR() bfin_readPTR(DMA11_CURR_DESC_PTR)
618#define bfin_write_DMA11_CURR_DESC_PTR(val) bfin_writePTR(DMA11_CURR_DESC_PTR, val)
619#define bfin_read_DMA11_CURR_ADDR() bfin_readPTR(DMA11_CURR_ADDR)
620#define bfin_write_DMA11_CURR_ADDR(val) bfin_writePTR(DMA11_CURR_ADDR, val)
621#define bfin_read_DMA11_IRQ_STATUS() bfin_read16(DMA11_IRQ_STATUS)
622#define bfin_write_DMA11_IRQ_STATUS(val) bfin_write16(DMA11_IRQ_STATUS, val)
623#define bfin_read_DMA11_PERIPHERAL_MAP() bfin_read16(DMA11_PERIPHERAL_MAP)
624#define bfin_write_DMA11_PERIPHERAL_MAP(val) bfin_write16(DMA11_PERIPHERAL_MAP, val)
625#define bfin_read_DMA11_CURR_X_COUNT() bfin_read16(DMA11_CURR_X_COUNT)
626#define bfin_write_DMA11_CURR_X_COUNT(val) bfin_write16(DMA11_CURR_X_COUNT, val)
627#define bfin_read_DMA11_CURR_Y_COUNT() bfin_read16(DMA11_CURR_Y_COUNT)
628#define bfin_write_DMA11_CURR_Y_COUNT(val) bfin_write16(DMA11_CURR_Y_COUNT, val)
629#define bfin_read_MDMA_S0_NEXT_DESC_PTR() bfin_readPTR(MDMA_S0_NEXT_DESC_PTR)
630#define bfin_write_MDMA_S0_NEXT_DESC_PTR(val) bfin_writePTR(MDMA_S0_NEXT_DESC_PTR, val)
631#define bfin_read_MDMA_S0_START_ADDR() bfin_readPTR(MDMA_S0_START_ADDR)
632#define bfin_write_MDMA_S0_START_ADDR(val) bfin_writePTR(MDMA_S0_START_ADDR, val)
633#define bfin_read_MDMA_S0_CONFIG() bfin_read16(MDMA_S0_CONFIG)
634#define bfin_write_MDMA_S0_CONFIG(val) bfin_write16(MDMA_S0_CONFIG, val)
635#define bfin_read_MDMA_S0_X_COUNT() bfin_read16(MDMA_S0_X_COUNT)
636#define bfin_write_MDMA_S0_X_COUNT(val) bfin_write16(MDMA_S0_X_COUNT, val)
637#define bfin_read_MDMA_S0_X_MODIFY() bfin_read16(MDMA_S0_X_MODIFY)
638#define bfin_write_MDMA_S0_X_MODIFY(val) bfin_write16(MDMA_S0_X_MODIFY, val)
639#define bfin_read_MDMA_S0_Y_COUNT() bfin_read16(MDMA_S0_Y_COUNT)
640#define bfin_write_MDMA_S0_Y_COUNT(val) bfin_write16(MDMA_S0_Y_COUNT, val)
641#define bfin_read_MDMA_S0_Y_MODIFY() bfin_read16(MDMA_S0_Y_MODIFY)
642#define bfin_write_MDMA_S0_Y_MODIFY(val) bfin_write16(MDMA_S0_Y_MODIFY, val)
643#define bfin_read_MDMA_S0_CURR_DESC_PTR() bfin_readPTR(MDMA_S0_CURR_DESC_PTR)
644#define bfin_write_MDMA_S0_CURR_DESC_PTR(val) bfin_writePTR(MDMA_S0_CURR_DESC_PTR, val)
645#define bfin_read_MDMA_S0_CURR_ADDR() bfin_readPTR(MDMA_S0_CURR_ADDR)
646#define bfin_write_MDMA_S0_CURR_ADDR(val) bfin_writePTR(MDMA_S0_CURR_ADDR, val)
647#define bfin_read_MDMA_S0_IRQ_STATUS() bfin_read16(MDMA_S0_IRQ_STATUS)
648#define bfin_write_MDMA_S0_IRQ_STATUS(val) bfin_write16(MDMA_S0_IRQ_STATUS, val)
649#define bfin_read_MDMA_S0_PERIPHERAL_MAP() bfin_read16(MDMA_S0_PERIPHERAL_MAP)
650#define bfin_write_MDMA_S0_PERIPHERAL_MAP(val) bfin_write16(MDMA_S0_PERIPHERAL_MAP, val)
651#define bfin_read_MDMA_S0_CURR_X_COUNT() bfin_read16(MDMA_S0_CURR_X_COUNT)
652#define bfin_write_MDMA_S0_CURR_X_COUNT(val) bfin_write16(MDMA_S0_CURR_X_COUNT, val)
653#define bfin_read_MDMA_S0_CURR_Y_COUNT() bfin_read16(MDMA_S0_CURR_Y_COUNT)
654#define bfin_write_MDMA_S0_CURR_Y_COUNT(val) bfin_write16(MDMA_S0_CURR_Y_COUNT, val)
655#define bfin_read_MDMA_D0_NEXT_DESC_PTR() bfin_readPTR(MDMA_D0_NEXT_DESC_PTR)
656#define bfin_write_MDMA_D0_NEXT_DESC_PTR(val) bfin_writePTR(MDMA_D0_NEXT_DESC_PTR, val)
657#define bfin_read_MDMA_D0_START_ADDR() bfin_readPTR(MDMA_D0_START_ADDR)
658#define bfin_write_MDMA_D0_START_ADDR(val) bfin_writePTR(MDMA_D0_START_ADDR, val)
659#define bfin_read_MDMA_D0_CONFIG() bfin_read16(MDMA_D0_CONFIG)
660#define bfin_write_MDMA_D0_CONFIG(val) bfin_write16(MDMA_D0_CONFIG, val)
661#define bfin_read_MDMA_D0_X_COUNT() bfin_read16(MDMA_D0_X_COUNT)
662#define bfin_write_MDMA_D0_X_COUNT(val) bfin_write16(MDMA_D0_X_COUNT, val)
663#define bfin_read_MDMA_D0_X_MODIFY() bfin_read16(MDMA_D0_X_MODIFY)
664#define bfin_write_MDMA_D0_X_MODIFY(val) bfin_write16(MDMA_D0_X_MODIFY, val)
665#define bfin_read_MDMA_D0_Y_COUNT() bfin_read16(MDMA_D0_Y_COUNT)
666#define bfin_write_MDMA_D0_Y_COUNT(val) bfin_write16(MDMA_D0_Y_COUNT, val)
667#define bfin_read_MDMA_D0_Y_MODIFY() bfin_read16(MDMA_D0_Y_MODIFY)
668#define bfin_write_MDMA_D0_Y_MODIFY(val) bfin_write16(MDMA_D0_Y_MODIFY, val)
669#define bfin_read_MDMA_D0_CURR_DESC_PTR() bfin_readPTR(MDMA_D0_CURR_DESC_PTR)
670#define bfin_write_MDMA_D0_CURR_DESC_PTR(val) bfin_writePTR(MDMA_D0_CURR_DESC_PTR, val)
671#define bfin_read_MDMA_D0_CURR_ADDR() bfin_readPTR(MDMA_D0_CURR_ADDR)
672#define bfin_write_MDMA_D0_CURR_ADDR(val) bfin_writePTR(MDMA_D0_CURR_ADDR, val)
673#define bfin_read_MDMA_D0_IRQ_STATUS() bfin_read16(MDMA_D0_IRQ_STATUS)
674#define bfin_write_MDMA_D0_IRQ_STATUS(val) bfin_write16(MDMA_D0_IRQ_STATUS, val)
675#define bfin_read_MDMA_D0_PERIPHERAL_MAP() bfin_read16(MDMA_D0_PERIPHERAL_MAP)
676#define bfin_write_MDMA_D0_PERIPHERAL_MAP(val) bfin_write16(MDMA_D0_PERIPHERAL_MAP, val)
677#define bfin_read_MDMA_D0_CURR_X_COUNT() bfin_read16(MDMA_D0_CURR_X_COUNT)
678#define bfin_write_MDMA_D0_CURR_X_COUNT(val) bfin_write16(MDMA_D0_CURR_X_COUNT, val)
679#define bfin_read_MDMA_D0_CURR_Y_COUNT() bfin_read16(MDMA_D0_CURR_Y_COUNT)
680#define bfin_write_MDMA_D0_CURR_Y_COUNT(val) bfin_write16(MDMA_D0_CURR_Y_COUNT, val)
681#define bfin_read_MDMA_S1_NEXT_DESC_PTR() bfin_readPTR(MDMA_S1_NEXT_DESC_PTR)
682#define bfin_write_MDMA_S1_NEXT_DESC_PTR(val) bfin_writePTR(MDMA_S1_NEXT_DESC_PTR, val)
683#define bfin_read_MDMA_S1_START_ADDR() bfin_readPTR(MDMA_S1_START_ADDR)
684#define bfin_write_MDMA_S1_START_ADDR(val) bfin_writePTR(MDMA_S1_START_ADDR, val)
685#define bfin_read_MDMA_S1_CONFIG() bfin_read16(MDMA_S1_CONFIG)
686#define bfin_write_MDMA_S1_CONFIG(val) bfin_write16(MDMA_S1_CONFIG, val)
687#define bfin_read_MDMA_S1_X_COUNT() bfin_read16(MDMA_S1_X_COUNT)
688#define bfin_write_MDMA_S1_X_COUNT(val) bfin_write16(MDMA_S1_X_COUNT, val)
689#define bfin_read_MDMA_S1_X_MODIFY() bfin_read16(MDMA_S1_X_MODIFY)
690#define bfin_write_MDMA_S1_X_MODIFY(val) bfin_write16(MDMA_S1_X_MODIFY, val)
691#define bfin_read_MDMA_S1_Y_COUNT() bfin_read16(MDMA_S1_Y_COUNT)
692#define bfin_write_MDMA_S1_Y_COUNT(val) bfin_write16(MDMA_S1_Y_COUNT, val)
693#define bfin_read_MDMA_S1_Y_MODIFY() bfin_read16(MDMA_S1_Y_MODIFY)
694#define bfin_write_MDMA_S1_Y_MODIFY(val) bfin_write16(MDMA_S1_Y_MODIFY, val)
695#define bfin_read_MDMA_S1_CURR_DESC_PTR() bfin_readPTR(MDMA_S1_CURR_DESC_PTR)
696#define bfin_write_MDMA_S1_CURR_DESC_PTR(val) bfin_writePTR(MDMA_S1_CURR_DESC_PTR, val)
697#define bfin_read_MDMA_S1_CURR_ADDR() bfin_readPTR(MDMA_S1_CURR_ADDR)
698#define bfin_write_MDMA_S1_CURR_ADDR(val) bfin_writePTR(MDMA_S1_CURR_ADDR, val)
699#define bfin_read_MDMA_S1_IRQ_STATUS() bfin_read16(MDMA_S1_IRQ_STATUS)
700#define bfin_write_MDMA_S1_IRQ_STATUS(val) bfin_write16(MDMA_S1_IRQ_STATUS, val)
701#define bfin_read_MDMA_S1_PERIPHERAL_MAP() bfin_read16(MDMA_S1_PERIPHERAL_MAP)
702#define bfin_write_MDMA_S1_PERIPHERAL_MAP(val) bfin_write16(MDMA_S1_PERIPHERAL_MAP, val)
703#define bfin_read_MDMA_S1_CURR_X_COUNT() bfin_read16(MDMA_S1_CURR_X_COUNT)
704#define bfin_write_MDMA_S1_CURR_X_COUNT(val) bfin_write16(MDMA_S1_CURR_X_COUNT, val)
705#define bfin_read_MDMA_S1_CURR_Y_COUNT() bfin_read16(MDMA_S1_CURR_Y_COUNT)
706#define bfin_write_MDMA_S1_CURR_Y_COUNT(val) bfin_write16(MDMA_S1_CURR_Y_COUNT, val)
707#define bfin_read_MDMA_D1_NEXT_DESC_PTR() bfin_readPTR(MDMA_D1_NEXT_DESC_PTR)
708#define bfin_write_MDMA_D1_NEXT_DESC_PTR(val) bfin_writePTR(MDMA_D1_NEXT_DESC_PTR, val)
709#define bfin_read_MDMA_D1_START_ADDR() bfin_readPTR(MDMA_D1_START_ADDR)
710#define bfin_write_MDMA_D1_START_ADDR(val) bfin_writePTR(MDMA_D1_START_ADDR, val)
711#define bfin_read_MDMA_D1_CONFIG() bfin_read16(MDMA_D1_CONFIG)
712#define bfin_write_MDMA_D1_CONFIG(val) bfin_write16(MDMA_D1_CONFIG, val)
713#define bfin_read_MDMA_D1_X_COUNT() bfin_read16(MDMA_D1_X_COUNT)
714#define bfin_write_MDMA_D1_X_COUNT(val) bfin_write16(MDMA_D1_X_COUNT, val)
715#define bfin_read_MDMA_D1_X_MODIFY() bfin_read16(MDMA_D1_X_MODIFY)
716#define bfin_write_MDMA_D1_X_MODIFY(val) bfin_write16(MDMA_D1_X_MODIFY, val)
717#define bfin_read_MDMA_D1_Y_COUNT() bfin_read16(MDMA_D1_Y_COUNT)
718#define bfin_write_MDMA_D1_Y_COUNT(val) bfin_write16(MDMA_D1_Y_COUNT, val)
719#define bfin_read_MDMA_D1_Y_MODIFY() bfin_read16(MDMA_D1_Y_MODIFY)
720#define bfin_write_MDMA_D1_Y_MODIFY(val) bfin_write16(MDMA_D1_Y_MODIFY, val)
721#define bfin_read_MDMA_D1_CURR_DESC_PTR() bfin_readPTR(MDMA_D1_CURR_DESC_PTR)
722#define bfin_write_MDMA_D1_CURR_DESC_PTR(val) bfin_writePTR(MDMA_D1_CURR_DESC_PTR, val)
723#define bfin_read_MDMA_D1_CURR_ADDR() bfin_readPTR(MDMA_D1_CURR_ADDR)
724#define bfin_write_MDMA_D1_CURR_ADDR(val) bfin_writePTR(MDMA_D1_CURR_ADDR, val)
725#define bfin_read_MDMA_D1_IRQ_STATUS() bfin_read16(MDMA_D1_IRQ_STATUS)
726#define bfin_write_MDMA_D1_IRQ_STATUS(val) bfin_write16(MDMA_D1_IRQ_STATUS, val)
727#define bfin_read_MDMA_D1_PERIPHERAL_MAP() bfin_read16(MDMA_D1_PERIPHERAL_MAP)
728#define bfin_write_MDMA_D1_PERIPHERAL_MAP(val) bfin_write16(MDMA_D1_PERIPHERAL_MAP, val)
729#define bfin_read_MDMA_D1_CURR_X_COUNT() bfin_read16(MDMA_D1_CURR_X_COUNT)
730#define bfin_write_MDMA_D1_CURR_X_COUNT(val) bfin_write16(MDMA_D1_CURR_X_COUNT, val)
731#define bfin_read_MDMA_D1_CURR_Y_COUNT() bfin_read16(MDMA_D1_CURR_Y_COUNT)
732#define bfin_write_MDMA_D1_CURR_Y_COUNT(val) bfin_write16(MDMA_D1_CURR_Y_COUNT, val)
733#define bfin_read_PPI_CONTROL() bfin_read16(PPI_CONTROL)
734#define bfin_write_PPI_CONTROL(val) bfin_write16(PPI_CONTROL, val)
735#define bfin_read_PPI_STATUS() bfin_read16(PPI_STATUS)
736#define bfin_write_PPI_STATUS(val) bfin_write16(PPI_STATUS, val)
737#define bfin_read_PPI_COUNT() bfin_read16(PPI_COUNT)
738#define bfin_write_PPI_COUNT(val) bfin_write16(PPI_COUNT, val)
739#define bfin_read_PPI_DELAY() bfin_read16(PPI_DELAY)
740#define bfin_write_PPI_DELAY(val) bfin_write16(PPI_DELAY, val)
741#define bfin_read_PPI_FRAME() bfin_read16(PPI_FRAME)
742#define bfin_write_PPI_FRAME(val) bfin_write16(PPI_FRAME, val)
743#define bfin_read_TWI_CLKDIV() bfin_read16(TWI_CLKDIV)
744#define bfin_write_TWI_CLKDIV(val) bfin_write16(TWI_CLKDIV, val)
745#define bfin_read_TWI_CONTROL() bfin_read16(TWI_CONTROL)
746#define bfin_write_TWI_CONTROL(val) bfin_write16(TWI_CONTROL, val)
747#define bfin_read_TWI_SLAVE_CTL() bfin_read16(TWI_SLAVE_CTL)
748#define bfin_write_TWI_SLAVE_CTL(val) bfin_write16(TWI_SLAVE_CTL, val)
749#define bfin_read_TWI_SLAVE_STAT() bfin_read16(TWI_SLAVE_STAT)
750#define bfin_write_TWI_SLAVE_STAT(val) bfin_write16(TWI_SLAVE_STAT, val)
751#define bfin_read_TWI_SLAVE_ADDR() bfin_read16(TWI_SLAVE_ADDR)
752#define bfin_write_TWI_SLAVE_ADDR(val) bfin_write16(TWI_SLAVE_ADDR, val)
753#define bfin_read_TWI_MASTER_CTL() bfin_read16(TWI_MASTER_CTL)
754#define bfin_write_TWI_MASTER_CTL(val) bfin_write16(TWI_MASTER_CTL, val)
755#define bfin_read_TWI_MASTER_STAT() bfin_read16(TWI_MASTER_STAT)
756#define bfin_write_TWI_MASTER_STAT(val) bfin_write16(TWI_MASTER_STAT, val)
757#define bfin_read_TWI_MASTER_ADDR() bfin_read16(TWI_MASTER_ADDR)
758#define bfin_write_TWI_MASTER_ADDR(val) bfin_write16(TWI_MASTER_ADDR, val)
759#define bfin_read_TWI_INT_STAT() bfin_read16(TWI_INT_STAT)
760#define bfin_write_TWI_INT_STAT(val) bfin_write16(TWI_INT_STAT, val)
761#define bfin_read_TWI_INT_MASK() bfin_read16(TWI_INT_MASK)
762#define bfin_write_TWI_INT_MASK(val) bfin_write16(TWI_INT_MASK, val)
763#define bfin_read_TWI_FIFO_CTL() bfin_read16(TWI_FIFO_CTL)
764#define bfin_write_TWI_FIFO_CTL(val) bfin_write16(TWI_FIFO_CTL, val)
765#define bfin_read_TWI_FIFO_STAT() bfin_read16(TWI_FIFO_STAT)
766#define bfin_write_TWI_FIFO_STAT(val) bfin_write16(TWI_FIFO_STAT, val)
767#define bfin_read_TWI_XMT_DATA8() bfin_read16(TWI_XMT_DATA8)
768#define bfin_write_TWI_XMT_DATA8(val) bfin_write16(TWI_XMT_DATA8, val)
769#define bfin_read_TWI_XMT_DATA16() bfin_read16(TWI_XMT_DATA16)
770#define bfin_write_TWI_XMT_DATA16(val) bfin_write16(TWI_XMT_DATA16, val)
771#define bfin_read_TWI_RCV_DATA8() bfin_read16(TWI_RCV_DATA8)
772#define bfin_write_TWI_RCV_DATA8(val) bfin_write16(TWI_RCV_DATA8, val)
773#define bfin_read_TWI_RCV_DATA16() bfin_read16(TWI_RCV_DATA16)
774#define bfin_write_TWI_RCV_DATA16(val) bfin_write16(TWI_RCV_DATA16, val)
775#define bfin_read_PORTGIO() bfin_read16(PORTGIO)
776#define bfin_write_PORTGIO(val) bfin_write16(PORTGIO, val)
777#define bfin_read_PORTGIO_CLEAR() bfin_read16(PORTGIO_CLEAR)
778#define bfin_write_PORTGIO_CLEAR(val) bfin_write16(PORTGIO_CLEAR, val)
779#define bfin_read_PORTGIO_SET() bfin_read16(PORTGIO_SET)
780#define bfin_write_PORTGIO_SET(val) bfin_write16(PORTGIO_SET, val)
781#define bfin_read_PORTGIO_TOGGLE() bfin_read16(PORTGIO_TOGGLE)
782#define bfin_write_PORTGIO_TOGGLE(val) bfin_write16(PORTGIO_TOGGLE, val)
783#define bfin_read_PORTGIO_MASKA() bfin_read16(PORTGIO_MASKA)
784#define bfin_write_PORTGIO_MASKA(val) bfin_write16(PORTGIO_MASKA, val)
785#define bfin_read_PORTGIO_MASKA_CLEAR() bfin_read16(PORTGIO_MASKA_CLEAR)
786#define bfin_write_PORTGIO_MASKA_CLEAR(val) bfin_write16(PORTGIO_MASKA_CLEAR, val)
787#define bfin_read_PORTGIO_MASKA_SET() bfin_read16(PORTGIO_MASKA_SET)
788#define bfin_write_PORTGIO_MASKA_SET(val) bfin_write16(PORTGIO_MASKA_SET, val)
789#define bfin_read_PORTGIO_MASKA_TOGGLE() bfin_read16(PORTGIO_MASKA_TOGGLE)
790#define bfin_write_PORTGIO_MASKA_TOGGLE(val) bfin_write16(PORTGIO_MASKA_TOGGLE, val)
791#define bfin_read_PORTGIO_MASKB() bfin_read16(PORTGIO_MASKB)
792#define bfin_write_PORTGIO_MASKB(val) bfin_write16(PORTGIO_MASKB, val)
793#define bfin_read_PORTGIO_MASKB_CLEAR() bfin_read16(PORTGIO_MASKB_CLEAR)
794#define bfin_write_PORTGIO_MASKB_CLEAR(val) bfin_write16(PORTGIO_MASKB_CLEAR, val)
795#define bfin_read_PORTGIO_MASKB_SET() bfin_read16(PORTGIO_MASKB_SET)
796#define bfin_write_PORTGIO_MASKB_SET(val) bfin_write16(PORTGIO_MASKB_SET, val)
797#define bfin_read_PORTGIO_MASKB_TOGGLE() bfin_read16(PORTGIO_MASKB_TOGGLE)
798#define bfin_write_PORTGIO_MASKB_TOGGLE(val) bfin_write16(PORTGIO_MASKB_TOGGLE, val)
799#define bfin_read_PORTGIO_DIR() bfin_read16(PORTGIO_DIR)
800#define bfin_write_PORTGIO_DIR(val) bfin_write16(PORTGIO_DIR, val)
801#define bfin_read_PORTGIO_POLAR() bfin_read16(PORTGIO_POLAR)
802#define bfin_write_PORTGIO_POLAR(val) bfin_write16(PORTGIO_POLAR, val)
803#define bfin_read_PORTGIO_EDGE() bfin_read16(PORTGIO_EDGE)
804#define bfin_write_PORTGIO_EDGE(val) bfin_write16(PORTGIO_EDGE, val)
805#define bfin_read_PORTGIO_BOTH() bfin_read16(PORTGIO_BOTH)
806#define bfin_write_PORTGIO_BOTH(val) bfin_write16(PORTGIO_BOTH, val)
807#define bfin_read_PORTGIO_INEN() bfin_read16(PORTGIO_INEN)
808#define bfin_write_PORTGIO_INEN(val) bfin_write16(PORTGIO_INEN, val)
809#define bfin_read_PORTHIO() bfin_read16(PORTHIO)
810#define bfin_write_PORTHIO(val) bfin_write16(PORTHIO, val)
811#define bfin_read_PORTHIO_CLEAR() bfin_read16(PORTHIO_CLEAR)
812#define bfin_write_PORTHIO_CLEAR(val) bfin_write16(PORTHIO_CLEAR, val)
813#define bfin_read_PORTHIO_SET() bfin_read16(PORTHIO_SET)
814#define bfin_write_PORTHIO_SET(val) bfin_write16(PORTHIO_SET, val)
815#define bfin_read_PORTHIO_TOGGLE() bfin_read16(PORTHIO_TOGGLE)
816#define bfin_write_PORTHIO_TOGGLE(val) bfin_write16(PORTHIO_TOGGLE, val)
817#define bfin_read_PORTHIO_MASKA() bfin_read16(PORTHIO_MASKA)
818#define bfin_write_PORTHIO_MASKA(val) bfin_write16(PORTHIO_MASKA, val)
819#define bfin_read_PORTHIO_MASKA_CLEAR() bfin_read16(PORTHIO_MASKA_CLEAR)
820#define bfin_write_PORTHIO_MASKA_CLEAR(val) bfin_write16(PORTHIO_MASKA_CLEAR, val)
821#define bfin_read_PORTHIO_MASKA_SET() bfin_read16(PORTHIO_MASKA_SET)
822#define bfin_write_PORTHIO_MASKA_SET(val) bfin_write16(PORTHIO_MASKA_SET, val)
823#define bfin_read_PORTHIO_MASKA_TOGGLE() bfin_read16(PORTHIO_MASKA_TOGGLE)
824#define bfin_write_PORTHIO_MASKA_TOGGLE(val) bfin_write16(PORTHIO_MASKA_TOGGLE, val)
825#define bfin_read_PORTHIO_MASKB() bfin_read16(PORTHIO_MASKB)
826#define bfin_write_PORTHIO_MASKB(val) bfin_write16(PORTHIO_MASKB, val)
827#define bfin_read_PORTHIO_MASKB_CLEAR() bfin_read16(PORTHIO_MASKB_CLEAR)
828#define bfin_write_PORTHIO_MASKB_CLEAR(val) bfin_write16(PORTHIO_MASKB_CLEAR, val)
829#define bfin_read_PORTHIO_MASKB_SET() bfin_read16(PORTHIO_MASKB_SET)
830#define bfin_write_PORTHIO_MASKB_SET(val) bfin_write16(PORTHIO_MASKB_SET, val)
831#define bfin_read_PORTHIO_MASKB_TOGGLE() bfin_read16(PORTHIO_MASKB_TOGGLE)
832#define bfin_write_PORTHIO_MASKB_TOGGLE(val) bfin_write16(PORTHIO_MASKB_TOGGLE, val)
833#define bfin_read_PORTHIO_DIR() bfin_read16(PORTHIO_DIR)
834#define bfin_write_PORTHIO_DIR(val) bfin_write16(PORTHIO_DIR, val)
835#define bfin_read_PORTHIO_POLAR() bfin_read16(PORTHIO_POLAR)
836#define bfin_write_PORTHIO_POLAR(val) bfin_write16(PORTHIO_POLAR, val)
837#define bfin_read_PORTHIO_EDGE() bfin_read16(PORTHIO_EDGE)
838#define bfin_write_PORTHIO_EDGE(val) bfin_write16(PORTHIO_EDGE, val)
839#define bfin_read_PORTHIO_BOTH() bfin_read16(PORTHIO_BOTH)
840#define bfin_write_PORTHIO_BOTH(val) bfin_write16(PORTHIO_BOTH, val)
841#define bfin_read_PORTHIO_INEN() bfin_read16(PORTHIO_INEN)
842#define bfin_write_PORTHIO_INEN(val) bfin_write16(PORTHIO_INEN, val)
843#define bfin_read_UART1_THR() bfin_read16(UART1_THR)
844#define bfin_write_UART1_THR(val) bfin_write16(UART1_THR, val)
845#define bfin_read_UART1_RBR() bfin_read16(UART1_RBR)
846#define bfin_write_UART1_RBR(val) bfin_write16(UART1_RBR, val)
847#define bfin_read_UART1_DLL() bfin_read16(UART1_DLL)
848#define bfin_write_UART1_DLL(val) bfin_write16(UART1_DLL, val)
849#define bfin_read_UART1_IER() bfin_read16(UART1_IER)
850#define bfin_write_UART1_IER(val) bfin_write16(UART1_IER, val)
851#define bfin_read_UART1_DLH() bfin_read16(UART1_DLH)
852#define bfin_write_UART1_DLH(val) bfin_write16(UART1_DLH, val)
853#define bfin_read_UART1_IIR() bfin_read16(UART1_IIR)
854#define bfin_write_UART1_IIR(val) bfin_write16(UART1_IIR, val)
855#define bfin_read_UART1_LCR() bfin_read16(UART1_LCR)
856#define bfin_write_UART1_LCR(val) bfin_write16(UART1_LCR, val)
857#define bfin_read_UART1_MCR() bfin_read16(UART1_MCR)
858#define bfin_write_UART1_MCR(val) bfin_write16(UART1_MCR, val)
859#define bfin_read_UART1_LSR() bfin_read16(UART1_LSR)
860#define bfin_write_UART1_LSR(val) bfin_write16(UART1_LSR, val)
861#define bfin_read_UART1_MSR() bfin_read16(UART1_MSR)
862#define bfin_write_UART1_MSR(val) bfin_write16(UART1_MSR, val)
863#define bfin_read_UART1_SCR() bfin_read16(UART1_SCR)
864#define bfin_write_UART1_SCR(val) bfin_write16(UART1_SCR, val)
865#define bfin_read_UART1_GCTL() bfin_read16(UART1_GCTL)
866#define bfin_write_UART1_GCTL(val) bfin_write16(UART1_GCTL, val)
867#define bfin_read_PORTF_FER() bfin_read16(PORTF_FER)
868#define bfin_write_PORTF_FER(val) bfin_write16(PORTF_FER, val)
869#define bfin_read_PORTG_FER() bfin_read16(PORTG_FER)
870#define bfin_write_PORTG_FER(val) bfin_write16(PORTG_FER, val)
871#define bfin_read_PORTH_FER() bfin_read16(PORTH_FER)
872#define bfin_write_PORTH_FER(val) bfin_write16(PORTH_FER, val)
873#define bfin_read_HMDMA0_CONTROL() bfin_read16(HMDMA0_CONTROL)
874#define bfin_write_HMDMA0_CONTROL(val) bfin_write16(HMDMA0_CONTROL, val)
875#define bfin_read_HMDMA0_ECINIT() bfin_read16(HMDMA0_ECINIT)
876#define bfin_write_HMDMA0_ECINIT(val) bfin_write16(HMDMA0_ECINIT, val)
877#define bfin_read_HMDMA0_BCINIT() bfin_read16(HMDMA0_BCINIT)
878#define bfin_write_HMDMA0_BCINIT(val) bfin_write16(HMDMA0_BCINIT, val)
879#define bfin_read_HMDMA0_ECURGENT() bfin_read16(HMDMA0_ECURGENT)
880#define bfin_write_HMDMA0_ECURGENT(val) bfin_write16(HMDMA0_ECURGENT, val)
881#define bfin_read_HMDMA0_ECOVERFLOW() bfin_read16(HMDMA0_ECOVERFLOW)
882#define bfin_write_HMDMA0_ECOVERFLOW(val) bfin_write16(HMDMA0_ECOVERFLOW, val)
883#define bfin_read_HMDMA0_ECOUNT() bfin_read16(HMDMA0_ECOUNT)
884#define bfin_write_HMDMA0_ECOUNT(val) bfin_write16(HMDMA0_ECOUNT, val)
885#define bfin_read_HMDMA0_BCOUNT() bfin_read16(HMDMA0_BCOUNT)
886#define bfin_write_HMDMA0_BCOUNT(val) bfin_write16(HMDMA0_BCOUNT, val)
887#define bfin_read_HMDMA1_CONTROL() bfin_read16(HMDMA1_CONTROL)
888#define bfin_write_HMDMA1_CONTROL(val) bfin_write16(HMDMA1_CONTROL, val)
889#define bfin_read_HMDMA1_ECINIT() bfin_read16(HMDMA1_ECINIT)
890#define bfin_write_HMDMA1_ECINIT(val) bfin_write16(HMDMA1_ECINIT, val)
891#define bfin_read_HMDMA1_BCINIT() bfin_read16(HMDMA1_BCINIT)
892#define bfin_write_HMDMA1_BCINIT(val) bfin_write16(HMDMA1_BCINIT, val)
893#define bfin_read_HMDMA1_ECURGENT() bfin_read16(HMDMA1_ECURGENT)
894#define bfin_write_HMDMA1_ECURGENT(val) bfin_write16(HMDMA1_ECURGENT, val)
895#define bfin_read_HMDMA1_ECOVERFLOW() bfin_read16(HMDMA1_ECOVERFLOW)
896#define bfin_write_HMDMA1_ECOVERFLOW(val) bfin_write16(HMDMA1_ECOVERFLOW, val)
897#define bfin_read_HMDMA1_ECOUNT() bfin_read16(HMDMA1_ECOUNT)
898#define bfin_write_HMDMA1_ECOUNT(val) bfin_write16(HMDMA1_ECOUNT, val)
899#define bfin_read_HMDMA1_BCOUNT() bfin_read16(HMDMA1_BCOUNT)
900#define bfin_write_HMDMA1_BCOUNT(val) bfin_write16(HMDMA1_BCOUNT, val)
901#define bfin_read_PORTF_MUX() bfin_read16(PORTF_MUX)
902#define bfin_write_PORTF_MUX(val) bfin_write16(PORTF_MUX, val)
903#define bfin_read_PORTG_MUX() bfin_read16(PORTG_MUX)
904#define bfin_write_PORTG_MUX(val) bfin_write16(PORTG_MUX, val)
905#define bfin_read_PORTH_MUX() bfin_read16(PORTH_MUX)
906#define bfin_write_PORTH_MUX(val) bfin_write16(PORTH_MUX, val)
907#define bfin_read_PORTF_DRIVE() bfin_read16(PORTF_DRIVE)
908#define bfin_write_PORTF_DRIVE(val) bfin_write16(PORTF_DRIVE, val)
909#define bfin_read_PORTG_DRIVE() bfin_read16(PORTG_DRIVE)
910#define bfin_write_PORTG_DRIVE(val) bfin_write16(PORTG_DRIVE, val)
911#define bfin_read_PORTH_DRIVE() bfin_read16(PORTH_DRIVE)
912#define bfin_write_PORTH_DRIVE(val) bfin_write16(PORTH_DRIVE, val)
913#define bfin_read_PORTF_SLEW() bfin_read16(PORTF_SLEW)
914#define bfin_write_PORTF_SLEW(val) bfin_write16(PORTF_SLEW, val)
915#define bfin_read_PORTG_SLEW() bfin_read16(PORTG_SLEW)
916#define bfin_write_PORTG_SLEW(val) bfin_write16(PORTG_SLEW, val)
917#define bfin_read_PORTH_SLEW() bfin_read16(PORTH_SLEW)
918#define bfin_write_PORTH_SLEW(val) bfin_write16(PORTH_SLEW, val)
919#define bfin_read_PORTF_HYSTERESIS() bfin_read16(PORTF_HYSTERESIS)
920#define bfin_write_PORTF_HYSTERESIS(val) bfin_write16(PORTF_HYSTERESIS, val)
921#define bfin_read_PORTG_HYSTERESIS() bfin_read16(PORTG_HYSTERESIS)
922#define bfin_write_PORTG_HYSTERESIS(val) bfin_write16(PORTG_HYSTERESIS, val)
923#define bfin_read_PORTH_HYSTERESIS() bfin_read16(PORTH_HYSTERESIS)
924#define bfin_write_PORTH_HYSTERESIS(val) bfin_write16(PORTH_HYSTERESIS, val)
925#define bfin_read_NONGPIO_DRIVE() bfin_read16(NONGPIO_DRIVE)
926#define bfin_write_NONGPIO_DRIVE(val) bfin_write16(NONGPIO_DRIVE, val)
927#define bfin_read_NONGPIO_SLEW() bfin_read16(NONGPIO_SLEW)
928#define bfin_write_NONGPIO_SLEW(val) bfin_write16(NONGPIO_SLEW, val)
929#define bfin_read_NONGPIO_HYSTERESIS() bfin_read16(NONGPIO_HYSTERESIS)
930#define bfin_write_NONGPIO_HYSTERESIS(val) bfin_write16(NONGPIO_HYSTERESIS, val)
931#define bfin_read_HOST_CONTROL() bfin_read16(HOST_CONTROL)
932#define bfin_write_HOST_CONTROL(val) bfin_write16(HOST_CONTROL, val)
933#define bfin_read_HOST_STATUS() bfin_read16(HOST_STATUS)
934#define bfin_write_HOST_STATUS(val) bfin_write16(HOST_STATUS, val)
935#define bfin_read_HOST_TIMEOUT() bfin_read16(HOST_TIMEOUT)
936#define bfin_write_HOST_TIMEOUT(val) bfin_write16(HOST_TIMEOUT, val)
937#define bfin_read_CNT_CONFIG() bfin_read16(CNT_CONFIG)
938#define bfin_write_CNT_CONFIG(val) bfin_write16(CNT_CONFIG, val)
939#define bfin_read_CNT_IMASK() bfin_read16(CNT_IMASK)
940#define bfin_write_CNT_IMASK(val) bfin_write16(CNT_IMASK, val)
941#define bfin_read_CNT_STATUS() bfin_read16(CNT_STATUS)
942#define bfin_write_CNT_STATUS(val) bfin_write16(CNT_STATUS, val)
943#define bfin_read_CNT_COMMAND() bfin_read16(CNT_COMMAND)
944#define bfin_write_CNT_COMMAND(val) bfin_write16(CNT_COMMAND, val)
945#define bfin_read_CNT_DEBOUNCE() bfin_read16(CNT_DEBOUNCE)
946#define bfin_write_CNT_DEBOUNCE(val) bfin_write16(CNT_DEBOUNCE, val)
947#define bfin_read_CNT_COUNTER() bfin_read32(CNT_COUNTER)
948#define bfin_write_CNT_COUNTER(val) bfin_write32(CNT_COUNTER, val)
949#define bfin_read_CNT_MAX() bfin_read32(CNT_MAX)
950#define bfin_write_CNT_MAX(val) bfin_write32(CNT_MAX, val)
951#define bfin_read_CNT_MIN() bfin_read32(CNT_MIN)
952#define bfin_write_CNT_MIN(val) bfin_write32(CNT_MIN, val)
953#define bfin_read_OTP_CONTROL() bfin_read16(OTP_CONTROL)
954#define bfin_write_OTP_CONTROL(val) bfin_write16(OTP_CONTROL, val)
955#define bfin_read_OTP_BEN() bfin_read16(OTP_BEN)
956#define bfin_write_OTP_BEN(val) bfin_write16(OTP_BEN, val)
957#define bfin_read_OTP_STATUS() bfin_read16(OTP_STATUS)
958#define bfin_write_OTP_STATUS(val) bfin_write16(OTP_STATUS, val)
959#define bfin_read_OTP_TIMING() bfin_read32(OTP_TIMING)
960#define bfin_write_OTP_TIMING(val) bfin_write32(OTP_TIMING, val)
961#define bfin_read_SECURE_SYSSWT() bfin_read32(SECURE_SYSSWT)
962#define bfin_write_SECURE_SYSSWT(val) bfin_write32(SECURE_SYSSWT, val)
963#define bfin_read_SECURE_CONTROL() bfin_read16(SECURE_CONTROL)
964#define bfin_write_SECURE_CONTROL(val) bfin_write16(SECURE_CONTROL, val)
965#define bfin_read_SECURE_STATUS() bfin_read16(SECURE_STATUS)
966#define bfin_write_SECURE_STATUS(val) bfin_write16(SECURE_STATUS, val)
967#define bfin_read_OTP_DATA0() bfin_read32(OTP_DATA0)
968#define bfin_write_OTP_DATA0(val) bfin_write32(OTP_DATA0, val)
969#define bfin_read_OTP_DATA1() bfin_read32(OTP_DATA1)
970#define bfin_write_OTP_DATA1(val) bfin_write32(OTP_DATA1, val)
971#define bfin_read_OTP_DATA2() bfin_read32(OTP_DATA2)
972#define bfin_write_OTP_DATA2(val) bfin_write32(OTP_DATA2, val)
973#define bfin_read_OTP_DATA3() bfin_read32(OTP_DATA3)
974#define bfin_write_OTP_DATA3(val) bfin_write32(OTP_DATA3, val)
975#define bfin_read_NFC_CTL() bfin_read16(NFC_CTL)
976#define bfin_write_NFC_CTL(val) bfin_write16(NFC_CTL, val)
977#define bfin_read_NFC_STAT() bfin_read16(NFC_STAT)
978#define bfin_write_NFC_STAT(val) bfin_write16(NFC_STAT, val)
979#define bfin_read_NFC_IRQSTAT() bfin_read16(NFC_IRQSTAT)
980#define bfin_write_NFC_IRQSTAT(val) bfin_write16(NFC_IRQSTAT, val)
981#define bfin_read_NFC_IRQMASK() bfin_read16(NFC_IRQMASK)
982#define bfin_write_NFC_IRQMASK(val) bfin_write16(NFC_IRQMASK, val)
983#define bfin_read_NFC_ECC0() bfin_read16(NFC_ECC0)
984#define bfin_write_NFC_ECC0(val) bfin_write16(NFC_ECC0, val)
985#define bfin_read_NFC_ECC1() bfin_read16(NFC_ECC1)
986#define bfin_write_NFC_ECC1(val) bfin_write16(NFC_ECC1, val)
987#define bfin_read_NFC_ECC2() bfin_read16(NFC_ECC2)
988#define bfin_write_NFC_ECC2(val) bfin_write16(NFC_ECC2, val)
989#define bfin_read_NFC_ECC3() bfin_read16(NFC_ECC3)
990#define bfin_write_NFC_ECC3(val) bfin_write16(NFC_ECC3, val)
991#define bfin_read_NFC_COUNT() bfin_read16(NFC_COUNT)
992#define bfin_write_NFC_COUNT(val) bfin_write16(NFC_COUNT, val)
993#define bfin_read_NFC_RST() bfin_read16(NFC_RST)
994#define bfin_write_NFC_RST(val) bfin_write16(NFC_RST, val)
995#define bfin_read_NFC_PGCTL() bfin_read16(NFC_PGCTL)
996#define bfin_write_NFC_PGCTL(val) bfin_write16(NFC_PGCTL, val)
997#define bfin_read_NFC_READ() bfin_read16(NFC_READ)
998#define bfin_write_NFC_READ(val) bfin_write16(NFC_READ, val)
999#define bfin_read_NFC_ADDR() bfin_read16(NFC_ADDR)
1000#define bfin_write_NFC_ADDR(val) bfin_write16(NFC_ADDR, val)
1001#define bfin_read_NFC_CMD() bfin_read16(NFC_CMD)
1002#define bfin_write_NFC_CMD(val) bfin_write16(NFC_CMD, val)
1003#define bfin_read_NFC_DATA_WR() bfin_read16(NFC_DATA_WR)
1004#define bfin_write_NFC_DATA_WR(val) bfin_write16(NFC_DATA_WR, val)
1005#define bfin_read_NFC_DATA_RD() bfin_read16(NFC_DATA_RD)
1006#define bfin_write_NFC_DATA_RD(val) bfin_write16(NFC_DATA_RD, val)
1007#define bfin_read_DMA_TC_CNT() bfin_read16(DMA_TC_CNT)
1008#define bfin_write_DMA_TC_CNT(val) bfin_write16(DMA_TC_CNT, val)
1009#define bfin_read_DMA_TC_PER() bfin_read16(DMA_TC_PER)
1010#define bfin_write_DMA_TC_PER(val) bfin_write16(DMA_TC_PER, val)
1011
1012#endif
1013
