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22#include <common.h>
23
24#ifdef CONFIG_USB_OHCI
25
26#include <malloc.h>
27#include <usb.h>
28#include "usb_ohci.h"
29
30#define OHCI_USE_NPS
31#undef OHCI_VERBOSE_DEBUG
32#undef DEBUG
33#undef SHOW_INFO
34#undef OHCI_FILL_TRACE
35
36
37#define OHCI_CONTROL_INIT \
38 (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
39
40#define readl(a) (*((volatile u32 *)(a)))
41#define writel(a, b) (*((volatile u32 *)(b)) = ((volatile u32)a))
42
43#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
44
45#ifdef DEBUG
46#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
47#else
48#define dbg(format, arg...) do {} while(0)
49#endif
50#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
51#ifdef SHOW_INFO
52#define info(format, arg...) printf("INFO: " format "\n", ## arg)
53#else
54#define info(format, arg...) do {} while(0)
55#endif
56
57#define m16_swap(x) swap_16(x)
58#define m32_swap(x) swap_32(x)
59
60#if defined(CONFIG_405EZ) || defined(CONFIG_440EP) || defined(CONFIG_440EPX)
61#define ohci_cpu_to_le16(x) (x)
62#define ohci_cpu_to_le32(x) (x)
63#else
64#define ohci_cpu_to_le16(x) swap_16(x)
65#define ohci_cpu_to_le32(x) swap_32(x)
66#endif
67
68
69static ohci_t gohci;
70
71struct ohci_hcca ghcca[1];
72
73struct ohci_hcca *phcca;
74
75struct ohci_device ohci_dev;
76
77urb_priv_t urb_priv;
78
79int got_rhsc;
80
81struct usb_device *devgone;
82
83int urb_finished = 0;
84
85
86
87
88
89
90
91#define OHCI_QUIRK_AMD756 0xabcd
92#define read_roothub(hc, register, mask) ({ \
93 u32 temp = readl (&hc->regs->roothub.register); \
94 if (hc->flags & OHCI_QUIRK_AMD756) \
95 while (temp & mask) \
96 temp = readl (&hc->regs->roothub.register); \
97 temp; })
98
99static u32 roothub_a (struct ohci *hc)
100 { return read_roothub (hc, a, 0xfc0fe000); }
101static inline u32 roothub_b (struct ohci *hc)
102 { return readl (&hc->regs->roothub.b); }
103static inline u32 roothub_status (struct ohci *hc)
104 { return readl (&hc->regs->roothub.status); }
105static u32 roothub_portstatus (struct ohci *hc, int i)
106 { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
107
108
109
110static int hc_interrupt (void);
111static void
112td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
113 int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
114
115
116
117
118
119
120
121static void urb_free_priv (urb_priv_t * urb)
122{
123 int i;
124 int last;
125 struct td * td;
126
127 last = urb->length - 1;
128 if (last >= 0) {
129 for (i = 0; i <= last; i++) {
130 td = urb->td[i];
131 if (td) {
132 td->usb_dev = NULL;
133 urb->td[i] = NULL;
134 }
135 }
136 }
137}
138
139
140
141#ifdef DEBUG
142static int sohci_get_current_frame_number (struct usb_device * dev);
143
144
145
146
147static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
148 int transfer_len, struct devrequest * setup, char * str, int small)
149{
150 urb_priv_t * purb = &urb_priv;
151
152 dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
153 str,
154 sohci_get_current_frame_number (dev),
155 usb_pipedevice (pipe),
156 usb_pipeendpoint (pipe),
157 usb_pipeout (pipe)? 'O': 'I',
158 usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
159 (usb_pipecontrol (pipe)? "CTRL": "BULK"),
160 purb->actual_length,
161 transfer_len, dev->status);
162#ifdef OHCI_VERBOSE_DEBUG
163 if (!small) {
164 int i, len;
165
166 if (usb_pipecontrol (pipe)) {
167 printf (__FILE__ ": cmd(8):");
168 for (i = 0; i < 8 ; i++)
169 printf (" %02x", ((__u8 *) setup) [i]);
170 printf ("\n");
171 }
172 if (transfer_len > 0 && buffer) {
173 printf (__FILE__ ": data(%d/%d):",
174 purb->actual_length,
175 transfer_len);
176 len = usb_pipeout (pipe)?
177 transfer_len: purb->actual_length;
178 for (i = 0; i < 16 && i < len; i++)
179 printf (" %02x", ((__u8 *) buffer) [i]);
180 printf ("%s\n", i < len? "...": "");
181 }
182 }
183#endif
184}
185
186
187void ep_print_int_eds (ohci_t *ohci, char * str) {
188 int i, j;
189 __u32 * ed_p;
190 for (i= 0; i < 32; i++) {
191 j = 5;
192 ed_p = &(ohci->hcca->int_table [i]);
193 if (*ed_p == 0)
194 continue;
195 printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
196 while (*ed_p != 0 && j--) {
197 ed_t *ed = (ed_t *)ohci_cpu_to_le32(ed_p);
198 printf (" ed: %4x;", ed->hwINFO);
199 ed_p = &ed->hwNextED;
200 }
201 printf ("\n");
202 }
203}
204
205static void ohci_dump_intr_mask (char *label, __u32 mask)
206{
207 dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
208 label,
209 mask,
210 (mask & OHCI_INTR_MIE) ? " MIE" : "",
211 (mask & OHCI_INTR_OC) ? " OC" : "",
212 (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
213 (mask & OHCI_INTR_FNO) ? " FNO" : "",
214 (mask & OHCI_INTR_UE) ? " UE" : "",
215 (mask & OHCI_INTR_RD) ? " RD" : "",
216 (mask & OHCI_INTR_SF) ? " SF" : "",
217 (mask & OHCI_INTR_WDH) ? " WDH" : "",
218 (mask & OHCI_INTR_SO) ? " SO" : ""
219 );
220}
221
222static void maybe_print_eds (char *label, __u32 value)
223{
224 ed_t *edp = (ed_t *)value;
225
226 if (value) {
227 dbg ("%s %08x", label, value);
228 dbg ("%08x", edp->hwINFO);
229 dbg ("%08x", edp->hwTailP);
230 dbg ("%08x", edp->hwHeadP);
231 dbg ("%08x", edp->hwNextED);
232 }
233}
234
235static char * hcfs2string (int state)
236{
237 switch (state) {
238 case OHCI_USB_RESET: return "reset";
239 case OHCI_USB_RESUME: return "resume";
240 case OHCI_USB_OPER: return "operational";
241 case OHCI_USB_SUSPEND: return "suspend";
242 }
243 return "?";
244}
245
246
247static void ohci_dump_status (ohci_t *controller)
248{
249 struct ohci_regs *regs = controller->regs;
250 __u32 temp;
251
252 temp = readl (®s->revision) & 0xff;
253 if (temp != 0x10)
254 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
255
256 temp = readl (®s->control);
257 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
258 (temp & OHCI_CTRL_RWE) ? " RWE" : "",
259 (temp & OHCI_CTRL_RWC) ? " RWC" : "",
260 (temp & OHCI_CTRL_IR) ? " IR" : "",
261 hcfs2string (temp & OHCI_CTRL_HCFS),
262 (temp & OHCI_CTRL_BLE) ? " BLE" : "",
263 (temp & OHCI_CTRL_CLE) ? " CLE" : "",
264 (temp & OHCI_CTRL_IE) ? " IE" : "",
265 (temp & OHCI_CTRL_PLE) ? " PLE" : "",
266 temp & OHCI_CTRL_CBSR
267 );
268
269 temp = readl (®s->cmdstatus);
270 dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
271 (temp & OHCI_SOC) >> 16,
272 (temp & OHCI_OCR) ? " OCR" : "",
273 (temp & OHCI_BLF) ? " BLF" : "",
274 (temp & OHCI_CLF) ? " CLF" : "",
275 (temp & OHCI_HCR) ? " HCR" : ""
276 );
277
278 ohci_dump_intr_mask ("intrstatus", readl (®s->intrstatus));
279 ohci_dump_intr_mask ("intrenable", readl (®s->intrenable));
280
281 maybe_print_eds ("ed_periodcurrent", readl (®s->ed_periodcurrent));
282
283 maybe_print_eds ("ed_controlhead", readl (®s->ed_controlhead));
284 maybe_print_eds ("ed_controlcurrent", readl (®s->ed_controlcurrent));
285
286 maybe_print_eds ("ed_bulkhead", readl (®s->ed_bulkhead));
287 maybe_print_eds ("ed_bulkcurrent", readl (®s->ed_bulkcurrent));
288
289 maybe_print_eds ("donehead", readl (®s->donehead));
290}
291
292static void ohci_dump_roothub (ohci_t *controller, int verbose)
293{
294 __u32 temp, ndp, i;
295
296 temp = roothub_a (controller);
297 ndp = (temp & RH_A_NDP);
298
299 if (verbose) {
300 dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
301 ((temp & RH_A_POTPGT) >> 24) & 0xff,
302 (temp & RH_A_NOCP) ? " NOCP" : "",
303 (temp & RH_A_OCPM) ? " OCPM" : "",
304 (temp & RH_A_DT) ? " DT" : "",
305 (temp & RH_A_NPS) ? " NPS" : "",
306 (temp & RH_A_PSM) ? " PSM" : "",
307 ndp
308 );
309 temp = roothub_b (controller);
310 dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
311 temp,
312 (temp & RH_B_PPCM) >> 16,
313 (temp & RH_B_DR)
314 );
315 temp = roothub_status (controller);
316 dbg ("roothub.status: %08x%s%s%s%s%s%s",
317 temp,
318 (temp & RH_HS_CRWE) ? " CRWE" : "",
319 (temp & RH_HS_OCIC) ? " OCIC" : "",
320 (temp & RH_HS_LPSC) ? " LPSC" : "",
321 (temp & RH_HS_DRWE) ? " DRWE" : "",
322 (temp & RH_HS_OCI) ? " OCI" : "",
323 (temp & RH_HS_LPS) ? " LPS" : ""
324 );
325 }
326
327 for (i = 0; i < ndp; i++) {
328 temp = roothub_portstatus (controller, i);
329 dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
330 i,
331 temp,
332 (temp & RH_PS_PRSC) ? " PRSC" : "",
333 (temp & RH_PS_OCIC) ? " OCIC" : "",
334 (temp & RH_PS_PSSC) ? " PSSC" : "",
335 (temp & RH_PS_PESC) ? " PESC" : "",
336 (temp & RH_PS_CSC) ? " CSC" : "",
337
338 (temp & RH_PS_LSDA) ? " LSDA" : "",
339 (temp & RH_PS_PPS) ? " PPS" : "",
340 (temp & RH_PS_PRS) ? " PRS" : "",
341 (temp & RH_PS_POCI) ? " POCI" : "",
342 (temp & RH_PS_PSS) ? " PSS" : "",
343
344 (temp & RH_PS_PES) ? " PES" : "",
345 (temp & RH_PS_CCS) ? " CCS" : ""
346 );
347 }
348}
349
350static void ohci_dump (ohci_t *controller, int verbose)
351{
352 dbg ("OHCI controller usb-%s state", controller->slot_name);
353
354
355 ohci_dump_status (controller);
356 if (verbose)
357 ep_print_int_eds (controller, "hcca");
358 dbg ("hcca frame #%04x", controller->hcca->frame_no);
359 ohci_dump_roothub (controller, 1);
360}
361
362
363#endif
364
365
366
367
368
369
370
371int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
372 int transfer_len, struct devrequest *setup, int interval)
373{
374 ohci_t *ohci;
375 ed_t * ed;
376 urb_priv_t *purb_priv;
377 int i, size = 0;
378
379 ohci = &gohci;
380
381
382
383 if (ohci->disabled) {
384 err("sohci_submit_job: EPIPE");
385 return -1;
386 }
387
388
389
390
391 if (!urb_finished) {
392 err("sohci_submit_job: URB NOT FINISHED");
393 return -1;
394 }
395
396 urb_finished = 0;
397
398
399 if (!(ed = ep_add_ed (dev, pipe))) {
400 err("sohci_submit_job: ENOMEM");
401 return -1;
402 }
403
404
405 switch (usb_pipetype (pipe)) {
406 case PIPE_BULK:
407 size = (transfer_len - 1) / 4096 + 1;
408 break;
409 case PIPE_CONTROL:
410 size = (transfer_len == 0)? 2:
411 (transfer_len - 1) / 4096 + 3;
412 break;
413 }
414
415 if (size >= (N_URB_TD - 1)) {
416 err("need %d TDs, only have %d", size, N_URB_TD);
417 return -1;
418 }
419 purb_priv = &urb_priv;
420 purb_priv->pipe = pipe;
421
422
423 purb_priv->length = size;
424 purb_priv->ed = ed;
425 purb_priv->actual_length = 0;
426
427
428
429 for (i = 0; i < size; i++) {
430 purb_priv->td[i] = td_alloc (dev);
431 if (!purb_priv->td[i]) {
432 purb_priv->length = i;
433 urb_free_priv (purb_priv);
434 err("sohci_submit_job: ENOMEM");
435 return -1;
436 }
437 }
438
439 if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
440 urb_free_priv (purb_priv);
441 err("sohci_submit_job: EINVAL");
442 return -1;
443 }
444
445
446 if (ed->state != ED_OPER)
447 ep_link (ohci, ed);
448
449
450 td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
451
452 return 0;
453}
454
455
456
457#ifdef DEBUG
458
459
460static int sohci_get_current_frame_number (struct usb_device *usb_dev)
461{
462 ohci_t *ohci = &gohci;
463
464 return ohci_cpu_to_le16 (ohci->hcca->frame_no);
465}
466#endif
467
468
469
470
471
472
473
474static int ep_link (ohci_t *ohci, ed_t *edi)
475{
476 volatile ed_t *ed = edi;
477
478 ed->state = ED_OPER;
479
480 switch (ed->type) {
481 case PIPE_CONTROL:
482 ed->hwNextED = 0;
483 if (ohci->ed_controltail == NULL) {
484 writel (ed, &ohci->regs->ed_controlhead);
485 } else {
486 ohci->ed_controltail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
487 }
488 ed->ed_prev = ohci->ed_controltail;
489 if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
490 !ohci->ed_rm_list[1] && !ohci->sleeping) {
491 ohci->hc_control |= OHCI_CTRL_CLE;
492 writel (ohci->hc_control, &ohci->regs->control);
493 }
494 ohci->ed_controltail = edi;
495 break;
496
497 case PIPE_BULK:
498 ed->hwNextED = 0;
499 if (ohci->ed_bulktail == NULL) {
500 writel (ed, &ohci->regs->ed_bulkhead);
501 } else {
502 ohci->ed_bulktail->hwNextED = ohci_cpu_to_le32 ((unsigned long)ed);
503 }
504 ed->ed_prev = ohci->ed_bulktail;
505 if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
506 !ohci->ed_rm_list[1] && !ohci->sleeping) {
507 ohci->hc_control |= OHCI_CTRL_BLE;
508 writel (ohci->hc_control, &ohci->regs->control);
509 }
510 ohci->ed_bulktail = edi;
511 break;
512 }
513 return 0;
514}
515
516
517
518
519
520
521
522
523static int ep_unlink (ohci_t *ohci, ed_t *edi)
524{
525 volatile ed_t *ed = edi;
526
527 ed->hwINFO |= ohci_cpu_to_le32 (OHCI_ED_SKIP);
528
529 switch (ed->type) {
530 case PIPE_CONTROL:
531 if (ed->ed_prev == NULL) {
532 if (!ed->hwNextED) {
533 ohci->hc_control &= ~OHCI_CTRL_CLE;
534 writel (ohci->hc_control, &ohci->regs->control);
535 }
536 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
537 } else {
538 ed->ed_prev->hwNextED = ed->hwNextED;
539 }
540 if (ohci->ed_controltail == ed) {
541 ohci->ed_controltail = ed->ed_prev;
542 } else {
543 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
544 }
545 break;
546
547 case PIPE_BULK:
548 if (ed->ed_prev == NULL) {
549 if (!ed->hwNextED) {
550 ohci->hc_control &= ~OHCI_CTRL_BLE;
551 writel (ohci->hc_control, &ohci->regs->control);
552 }
553 writel (ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
554 } else {
555 ed->ed_prev->hwNextED = ed->hwNextED;
556 }
557 if (ohci->ed_bulktail == ed) {
558 ohci->ed_bulktail = ed->ed_prev;
559 } else {
560 ((ed_t *)ohci_cpu_to_le32 (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
561 }
562 break;
563 }
564 ed->state = ED_UNLINK;
565 return 0;
566}
567
568
569
570
571
572
573
574
575
576
577static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
578{
579 td_t *td;
580 ed_t *ed_ret;
581 volatile ed_t *ed;
582
583 ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
584 (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
585
586 if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
587 err("ep_add_ed: pending delete");
588
589 return NULL;
590 }
591
592 if (ed->state == ED_NEW) {
593 ed->hwINFO = ohci_cpu_to_le32 (OHCI_ED_SKIP);
594
595 td = td_alloc (usb_dev);
596 ed->hwTailP = ohci_cpu_to_le32 ((unsigned long)td);
597 ed->hwHeadP = ed->hwTailP;
598 ed->state = ED_UNLINK;
599 ed->type = usb_pipetype (pipe);
600 ohci_dev.ed_cnt++;
601 }
602
603 ed->hwINFO = ohci_cpu_to_le32 (usb_pipedevice (pipe)
604 | usb_pipeendpoint (pipe) << 7
605 | (usb_pipeisoc (pipe)? 0x8000: 0)
606 | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
607 | (usb_dev->speed == USB_SPEED_LOW) << 13
608 | usb_maxpacket (usb_dev, pipe) << 16);
609
610 return ed_ret;
611}
612
613
614
615
616
617
618
619static void td_fill (ohci_t *ohci, unsigned int info,
620 void *data, int len,
621 struct usb_device *dev, int index, urb_priv_t *urb_priv)
622{
623 volatile td_t *td, *td_pt;
624#ifdef OHCI_FILL_TRACE
625 int i;
626#endif
627
628 if (index > urb_priv->length) {
629 err("index > length");
630 return;
631 }
632
633 td_pt = urb_priv->td [index];
634 td_pt->hwNextTD = 0;
635
636
637 td = urb_priv->td [index] = (td_t *)(ohci_cpu_to_le32 (urb_priv->ed->hwTailP) & ~0xf);
638
639 td->ed = urb_priv->ed;
640 td->next_dl_td = NULL;
641 td->index = index;
642 td->data = (__u32)data;
643#ifdef OHCI_FILL_TRACE
644 if (usb_pipebulk(urb_priv->pipe) && usb_pipeout(urb_priv->pipe)) {
645 for (i = 0; i < len; i++)
646 printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
647 printf("\n");
648 }
649#endif
650 if (!len)
651 data = 0;
652
653 td->hwINFO = ohci_cpu_to_le32 (info);
654 td->hwCBP = ohci_cpu_to_le32 ((unsigned long)data);
655 if (data)
656 td->hwBE = ohci_cpu_to_le32 ((unsigned long)(data + len - 1));
657 else
658 td->hwBE = 0;
659 td->hwNextTD = ohci_cpu_to_le32 ((unsigned long)td_pt);
660
661
662 td->ed->hwTailP = td->hwNextTD;
663}
664
665
666
667
668static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
669 int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
670{
671 ohci_t *ohci = &gohci;
672 int data_len = transfer_len;
673 void *data;
674 int cnt = 0;
675 __u32 info = 0;
676 unsigned int toggle = 0;
677
678
679 if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
680 toggle = TD_T_TOGGLE;
681 } else {
682 toggle = TD_T_DATA0;
683 usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
684 }
685 urb->td_cnt = 0;
686 if (data_len)
687 data = buffer;
688 else
689 data = 0;
690
691 switch (usb_pipetype (pipe)) {
692 case PIPE_BULK:
693 info = usb_pipeout (pipe)?
694 TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
695 while(data_len > 4096) {
696 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
697 data += 4096; data_len -= 4096; cnt++;
698 }
699 info = usb_pipeout (pipe)?
700 TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
701 td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
702 cnt++;
703
704 if (!ohci->sleeping)
705 writel (OHCI_BLF, &ohci->regs->cmdstatus);
706 break;
707
708 case PIPE_CONTROL:
709 info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
710 td_fill (ohci, info, setup, 8, dev, cnt++, urb);
711 if (data_len > 0) {
712 info = usb_pipeout (pipe)?
713 TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
714
715 td_fill (ohci, info, data, data_len, dev, cnt++, urb);
716 }
717 info = usb_pipeout (pipe)?
718 TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
719 td_fill (ohci, info, data, 0, dev, cnt++, urb);
720 if (!ohci->sleeping)
721 writel (OHCI_CLF, &ohci->regs->cmdstatus);
722 break;
723 }
724 if (urb->length != cnt)
725 dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
726}
727
728
729
730
731
732
733
734
735static void dl_transfer_length(td_t * td)
736{
737 __u32 tdBE, tdCBP;
738 urb_priv_t *lurb_priv = &urb_priv;
739
740 tdBE = ohci_cpu_to_le32 (td->hwBE);
741 tdCBP = ohci_cpu_to_le32 (td->hwCBP);
742
743
744 if (!(usb_pipecontrol(lurb_priv->pipe) &&
745 ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
746 if (tdBE != 0) {
747 if (td->hwCBP == 0)
748 lurb_priv->actual_length += tdBE - td->data + 1;
749 else
750 lurb_priv->actual_length += tdCBP - td->data;
751 }
752 }
753}
754
755
756
757
758
759
760static td_t * dl_reverse_done_list (ohci_t *ohci)
761{
762 __u32 td_list_hc;
763 td_t *td_rev = NULL;
764 td_t *td_list = NULL;
765 urb_priv_t *lurb_priv = NULL;
766
767 td_list_hc = ohci_cpu_to_le32 (ohci->hcca->done_head) & 0xfffffff0;
768 ohci->hcca->done_head = 0;
769
770 while (td_list_hc) {
771 td_list = (td_t *)td_list_hc;
772
773 if (TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO))) {
774 lurb_priv = &urb_priv;
775 dbg(" USB-error/status: %x : %p",
776 TD_CC_GET (ohci_cpu_to_le32 (td_list->hwINFO)), td_list);
777 if (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x1)) {
778 if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
779 td_list->ed->hwHeadP =
780 (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & ohci_cpu_to_le32 (0xfffffff0)) |
781 (td_list->ed->hwHeadP & ohci_cpu_to_le32 (0x2));
782 lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
783 } else
784 td_list->ed->hwHeadP &= ohci_cpu_to_le32 (0xfffffff2);
785 }
786#ifdef CONFIG_MPC5200
787 td_list->hwNextTD = 0;
788#endif
789 }
790
791 td_list->next_dl_td = td_rev;
792 td_rev = td_list;
793 td_list_hc = ohci_cpu_to_le32 (td_list->hwNextTD) & 0xfffffff0;
794 }
795 return td_list;
796}
797
798
799
800
801static int dl_done_list (ohci_t *ohci, td_t *td_list)
802{
803 td_t *td_list_next = NULL;
804 ed_t *ed;
805 int cc = 0;
806 int stat = 0;
807
808 urb_priv_t *lurb_priv;
809 __u32 tdINFO, edHeadP, edTailP;
810
811 while (td_list) {
812 td_list_next = td_list->next_dl_td;
813
814 lurb_priv = &urb_priv;
815 tdINFO = ohci_cpu_to_le32 (td_list->hwINFO);
816
817 ed = td_list->ed;
818
819 dl_transfer_length(td_list);
820
821
822 cc = TD_CC_GET (tdINFO);
823 if (++(lurb_priv->td_cnt) == lurb_priv->length) {
824 if ((ed->state & (ED_OPER | ED_UNLINK))
825 && (lurb_priv->state != URB_DEL)) {
826 dbg("ConditionCode %#x", cc);
827 stat = cc_to_error[cc];
828 urb_finished = 1;
829 }
830 }
831
832 if (ed->state != ED_NEW) {
833 edHeadP = ohci_cpu_to_le32 (ed->hwHeadP) & 0xfffffff0;
834 edTailP = ohci_cpu_to_le32 (ed->hwTailP);
835
836
837 if ((edHeadP == edTailP) && (ed->state == ED_OPER))
838 ep_unlink (ohci, ed);
839 }
840
841 td_list = td_list_next;
842 }
843 return stat;
844}
845
846
847
848
849
850
851static __u8 root_hub_dev_des[] =
852{
853 0x12,
854 0x01,
855 0x10,
856 0x01,
857 0x09,
858 0x00,
859 0x00,
860 0x08,
861 0x00,
862 0x00,
863 0x00,
864 0x00,
865 0x00,
866 0x00,
867 0x00,
868 0x01,
869 0x00,
870 0x01
871};
872
873
874
875static __u8 root_hub_config_des[] =
876{
877 0x09,
878 0x02,
879 0x19,
880 0x00,
881 0x01,
882 0x01,
883 0x00,
884 0x40,
885
886 0x00,
887
888
889 0x09,
890 0x04,
891 0x00,
892 0x00,
893 0x01,
894 0x09,
895 0x00,
896 0x00,
897 0x00,
898
899
900 0x07,
901 0x05,
902 0x81,
903 0x03,
904 0x02,
905 0x00,
906 0xff
907};
908
909static unsigned char root_hub_str_index0[] =
910{
911 0x04,
912 0x03,
913 0x09,
914 0x04,
915};
916
917static unsigned char root_hub_str_index1[] =
918{
919 28,
920 0x03,
921 'O',
922 0,
923 'H',
924 0,
925 'C',
926 0,
927 'I',
928 0,
929 ' ',
930 0,
931 'R',
932 0,
933 'o',
934 0,
935 'o',
936 0,
937 't',
938 0,
939 ' ',
940 0,
941 'H',
942 0,
943 'u',
944 0,
945 'b',
946 0,
947};
948
949
950
951
952
953
954#define OK(x) len = (x); break
955#ifdef DEBUG
956#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
957#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
958#else
959#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
960#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
961#endif
962#define RD_RH_STAT roothub_status(&gohci)
963#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
964
965
966
967int rh_check_port_status(ohci_t *controller)
968{
969 __u32 temp, ndp, i;
970 int res;
971
972 res = -1;
973 temp = roothub_a (controller);
974 ndp = (temp & RH_A_NDP);
975 for (i = 0; i < ndp; i++) {
976 temp = roothub_portstatus (controller, i);
977
978 if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
979 (RH_PS_PESC | RH_PS_CSC)) &&
980 ((temp & RH_PS_CCS) == 0)) {
981 res = i;
982 break;
983 }
984 }
985 return res;
986}
987
988static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
989 void *buffer, int transfer_len, struct devrequest *cmd)
990{
991 void * data = buffer;
992 int leni = transfer_len;
993 int len = 0;
994 int stat = 0;
995 __u32 datab[4];
996 __u8 *data_buf = (__u8 *)datab;
997 __u16 bmRType_bReq;
998 __u16 wValue;
999 __u16 wIndex;
1000 __u16 wLength;
1001
1002#ifdef DEBUG
1003urb_priv.actual_length = 0;
1004pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
1005#endif
1006 if (usb_pipeint(pipe)) {
1007 info("Root-Hub submit IRQ: NOT implemented");
1008 return 0;
1009 }
1010
1011 bmRType_bReq = cmd->requesttype | (cmd->request << 8);
1012 wValue = m16_swap (cmd->value);
1013 wIndex = m16_swap (cmd->index);
1014 wLength = m16_swap (cmd->length);
1015
1016 info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
1017 dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
1018
1019 switch (bmRType_bReq) {
1020
1021
1022
1023
1024
1025
1026
1027
1028 case RH_GET_STATUS:
1029 *(__u16 *) data_buf = m16_swap (1); OK (2);
1030 case RH_GET_STATUS | RH_INTERFACE:
1031 *(__u16 *) data_buf = m16_swap (0); OK (2);
1032 case RH_GET_STATUS | RH_ENDPOINT:
1033 *(__u16 *) data_buf = m16_swap (0); OK (2);
1034 case RH_GET_STATUS | RH_CLASS:
1035 *(__u32 *) data_buf = m32_swap (
1036 RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
1037 OK (4);
1038 case RH_GET_STATUS | RH_OTHER | RH_CLASS:
1039 *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
1040
1041 case RH_CLEAR_FEATURE | RH_ENDPOINT:
1042 switch (wValue) {
1043 case (RH_ENDPOINT_STALL): OK (0);
1044 }
1045 break;
1046
1047 case RH_CLEAR_FEATURE | RH_CLASS:
1048 switch (wValue) {
1049 case RH_C_HUB_LOCAL_POWER:
1050 OK(0);
1051 case (RH_C_HUB_OVER_CURRENT):
1052 WR_RH_STAT(RH_HS_OCIC); OK (0);
1053 }
1054 break;
1055
1056 case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
1057 switch (wValue) {
1058 case (RH_PORT_ENABLE):
1059 WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
1060 case (RH_PORT_SUSPEND):
1061 WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
1062 case (RH_PORT_POWER):
1063 WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
1064 case (RH_C_PORT_CONNECTION):
1065 WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
1066 case (RH_C_PORT_ENABLE):
1067 WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
1068 case (RH_C_PORT_SUSPEND):
1069 WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
1070 case (RH_C_PORT_OVER_CURRENT):
1071 WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
1072 case (RH_C_PORT_RESET):
1073 WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
1074 }
1075 break;
1076
1077 case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
1078 switch (wValue) {
1079 case (RH_PORT_SUSPEND):
1080 WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
1081 case (RH_PORT_RESET):
1082 if (RD_RH_PORTSTAT & RH_PS_CCS)
1083 WR_RH_PORTSTAT (RH_PS_PRS);
1084 OK (0);
1085 case (RH_PORT_POWER):
1086 WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
1087 case (RH_PORT_ENABLE):
1088 if (RD_RH_PORTSTAT & RH_PS_CCS)
1089 WR_RH_PORTSTAT (RH_PS_PES );
1090 OK (0);
1091 }
1092 break;
1093
1094 case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
1095
1096 case RH_GET_DESCRIPTOR:
1097 switch ((wValue & 0xff00) >> 8) {
1098 case (0x01):
1099 len = min_t(unsigned int,
1100 leni,
1101 min_t(unsigned int,
1102 sizeof (root_hub_dev_des),
1103 wLength));
1104 data_buf = root_hub_dev_des; OK(len);
1105 case (0x02):
1106 len = min_t(unsigned int,
1107 leni,
1108 min_t(unsigned int,
1109 sizeof (root_hub_config_des),
1110 wLength));
1111 data_buf = root_hub_config_des; OK(len);
1112 case (0x03):
1113 if(wValue==0x0300) {
1114 len = min_t(unsigned int,
1115 leni,
1116 min_t(unsigned int,
1117 sizeof (root_hub_str_index0),
1118 wLength));
1119 data_buf = root_hub_str_index0;
1120 OK(len);
1121 }
1122 if(wValue==0x0301) {
1123 len = min_t(unsigned int,
1124 leni,
1125 min_t(unsigned int,
1126 sizeof (root_hub_str_index1),
1127 wLength));
1128 data_buf = root_hub_str_index1;
1129 OK(len);
1130 }
1131 default:
1132 stat = USB_ST_STALLED;
1133 }
1134 break;
1135
1136 case RH_GET_DESCRIPTOR | RH_CLASS:
1137 {
1138 __u32 temp = roothub_a (&gohci);
1139
1140 data_buf [0] = 9;
1141 data_buf [1] = 0x29;
1142 data_buf [2] = temp & RH_A_NDP;
1143 data_buf [3] = 0;
1144 if (temp & RH_A_PSM)
1145 data_buf [3] |= 0x1;
1146 if (temp & RH_A_NOCP)
1147 data_buf [3] |= 0x10;
1148 else if (temp & RH_A_OCPM)
1149 data_buf [3] |= 0x8;
1150
1151
1152 datab [1] = 0;
1153 data_buf [5] = (temp & RH_A_POTPGT) >> 24;
1154 temp = roothub_b (&gohci);
1155 data_buf [7] = temp & RH_B_DR;
1156 if (data_buf [2] < 7) {
1157 data_buf [8] = 0xff;
1158 } else {
1159 data_buf [0] += 2;
1160 data_buf [8] = (temp & RH_B_DR) >> 8;
1161 data_buf [10] = data_buf [9] = 0xff;
1162 }
1163
1164 len = min_t(unsigned int, leni,
1165 min_t(unsigned int, data_buf [0], wLength));
1166 OK (len);
1167 }
1168
1169 case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
1170
1171 case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
1172
1173 default:
1174 dbg ("unsupported root hub command");
1175 stat = USB_ST_STALLED;
1176 }
1177
1178#ifdef DEBUG
1179 ohci_dump_roothub (&gohci, 1);
1180#endif
1181
1182 len = min_t(int, len, leni);
1183 if (data != data_buf)
1184 memcpy (data, data_buf, len);
1185 dev->act_len = len;
1186 dev->status = stat;
1187
1188#ifdef DEBUG
1189 if (transfer_len)
1190 urb_priv.actual_length = transfer_len;
1191 pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0);
1192#endif
1193
1194 return stat;
1195}
1196
1197
1198
1199
1200
1201int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1202 int transfer_len, struct devrequest *setup, int interval)
1203{
1204 int stat = 0;
1205 int maxsize = usb_maxpacket(dev, pipe);
1206 int timeout;
1207
1208
1209 if (devgone == dev) {
1210 dev->status = USB_ST_CRC_ERR;
1211 return 0;
1212 }
1213
1214#ifdef DEBUG
1215 urb_priv.actual_length = 0;
1216 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1217#endif
1218 if (!maxsize) {
1219 err("submit_common_message: pipesize for pipe %lx is zero",
1220 pipe);
1221 return -1;
1222 }
1223
1224 if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
1225 err("sohci_submit_job failed");
1226 return -1;
1227 }
1228
1229
1230#define BULK_TO 5000
1231 if (usb_pipebulk(pipe))
1232 timeout = BULK_TO;
1233 else
1234 timeout = 100;
1235
1236
1237 for (;;) {
1238
1239 stat = hc_interrupt();
1240 if (stat < 0) {
1241 stat = USB_ST_CRC_ERR;
1242 break;
1243 }
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254 if ((stat >= 0) && (stat != 0xff) && (urb_finished)) {
1255
1256 break;
1257 }
1258
1259 if (--timeout) {
1260 mdelay(1);
1261 if (!urb_finished)
1262 dbg("\%");
1263
1264 } else {
1265 err("CTL:TIMEOUT ");
1266 dbg("submit_common_msg: TO status %x\n", stat);
1267 stat = USB_ST_CRC_ERR;
1268 urb_finished = 1;
1269 break;
1270 }
1271 }
1272#if 0
1273
1274 if (got_rhsc) {
1275#ifdef DEBUG
1276 ohci_dump_roothub (&gohci, 1);
1277#endif
1278 got_rhsc = 0;
1279
1280 timeout = rh_check_port_status(&gohci);
1281 if (timeout >= 0) {
1282#if 0
1283
1284 usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
1285#endif
1286
1287
1288
1289
1290
1291 devgone = dev;
1292 }
1293 }
1294#endif
1295
1296 dev->status = stat;
1297 dev->act_len = transfer_len;
1298
1299#ifdef DEBUG
1300 pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
1301#endif
1302
1303
1304 urb_free_priv (&urb_priv);
1305 return 0;
1306}
1307
1308
1309int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1310 int transfer_len)
1311{
1312 info("submit_bulk_msg");
1313 return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
1314}
1315
1316int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1317 int transfer_len, struct devrequest *setup)
1318{
1319 int maxsize = usb_maxpacket(dev, pipe);
1320
1321 info("submit_control_msg");
1322#ifdef DEBUG
1323 urb_priv.actual_length = 0;
1324 pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
1325#endif
1326 if (!maxsize) {
1327 err("submit_control_message: pipesize for pipe %lx is zero",
1328 pipe);
1329 return -1;
1330 }
1331 if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
1332 gohci.rh.dev = dev;
1333
1334 return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
1335 setup);
1336 }
1337
1338 return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
1339}
1340
1341int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
1342 int transfer_len, int interval)
1343{
1344 info("submit_int_msg");
1345 return -1;
1346}
1347
1348
1349
1350
1351
1352
1353
1354static int hc_reset (ohci_t *ohci)
1355{
1356 int timeout = 30;
1357 int smm_timeout = 50;
1358
1359 if (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1360 writel (OHCI_OCR, &ohci->regs->cmdstatus);
1361 info("USB HC TakeOver from SMM");
1362 while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
1363 mdelay (10);
1364 if (--smm_timeout == 0) {
1365 err("USB HC TakeOver failed!");
1366 return -1;
1367 }
1368 }
1369 }
1370
1371
1372 writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
1373
1374 dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;",
1375 ohci->slot_name,
1376 readl (&ohci->regs->control));
1377
1378
1379 ohci->hc_control = 0;
1380 writel (ohci->hc_control, &ohci->regs->control);
1381
1382
1383 writel (OHCI_HCR, &ohci->regs->cmdstatus);
1384 while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
1385 if (--timeout == 0) {
1386 err("USB HC reset timed out!");
1387 return -1;
1388 }
1389 udelay (1);
1390 }
1391 return 0;
1392}
1393
1394
1395
1396
1397
1398
1399
1400static int hc_start (ohci_t * ohci)
1401{
1402 __u32 mask;
1403 unsigned int fminterval;
1404
1405 ohci->disabled = 1;
1406
1407
1408
1409
1410 writel (0, &ohci->regs->ed_controlhead);
1411 writel (0, &ohci->regs->ed_bulkhead);
1412
1413 writel ((__u32)ohci->hcca, &ohci->regs->hcca);
1414
1415 fminterval = 0x2edf;
1416 writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
1417 fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
1418 writel (fminterval, &ohci->regs->fminterval);
1419 writel (0x628, &ohci->regs->lsthresh);
1420
1421
1422 ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
1423 ohci->disabled = 0;
1424 writel (ohci->hc_control, &ohci->regs->control);
1425
1426
1427 mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
1428 OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
1429 OHCI_INTR_OC | OHCI_INTR_MIE);
1430 writel (mask, &ohci->regs->intrdisable);
1431
1432 mask &= ~OHCI_INTR_MIE;
1433 writel (mask, &ohci->regs->intrstatus);
1434
1435 mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
1436 writel (mask, &ohci->regs->intrenable);
1437
1438#ifdef OHCI_USE_NPS
1439
1440 writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
1441 &ohci->regs->roothub.a);
1442 writel (RH_HS_LPSC, &ohci->regs->roothub.status);
1443#endif
1444
1445
1446 mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
1447
1448
1449 ohci->rh.devnum = 0;
1450
1451 return 0;
1452}
1453
1454
1455
1456
1457
1458static int
1459hc_interrupt (void)
1460{
1461 ohci_t *ohci = &gohci;
1462 struct ohci_regs *regs = ohci->regs;
1463 int ints;
1464 int stat = -1;
1465
1466 if ((ohci->hcca->done_head != 0) &&
1467 !(ohci_cpu_to_le32(ohci->hcca->done_head) & 0x01)) {
1468
1469 ints = OHCI_INTR_WDH;
1470
1471 } else if ((ints = readl (®s->intrstatus)) == ~(u32)0) {
1472 ohci->disabled++;
1473 err ("%s device removed!", ohci->slot_name);
1474 return -1;
1475
1476 } else if ((ints &= readl (®s->intrenable)) == 0) {
1477 dbg("hc_interrupt: returning..\n");
1478 return 0xff;
1479 }
1480
1481
1482
1483 if (ints & OHCI_INTR_RHSC) {
1484 got_rhsc = 1;
1485 stat = 0xff;
1486 }
1487
1488 if (ints & OHCI_INTR_UE) {
1489 ohci->disabled++;
1490 err ("OHCI Unrecoverable Error, controller usb-%s disabled",
1491 ohci->slot_name);
1492
1493
1494#ifdef DEBUG
1495 ohci_dump (ohci, 1);
1496#endif
1497
1498
1499
1500
1501 hc_reset (ohci);
1502 return -1;
1503 }
1504
1505 if (ints & OHCI_INTR_WDH) {
1506 writel (OHCI_INTR_WDH, ®s->intrdisable);
1507 stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
1508 writel (OHCI_INTR_WDH, ®s->intrenable);
1509 }
1510
1511 if (ints & OHCI_INTR_SO) {
1512 dbg("USB Schedule overrun\n");
1513 writel (OHCI_INTR_SO, ®s->intrenable);
1514 stat = -1;
1515 }
1516
1517
1518 if (ints & OHCI_INTR_SF) {
1519 unsigned int frame = ohci_cpu_to_le16 (ohci->hcca->frame_no) & 1;
1520 mdelay(1);
1521 writel (OHCI_INTR_SF, ®s->intrdisable);
1522 if (ohci->ed_rm_list[frame] != NULL)
1523 writel (OHCI_INTR_SF, ®s->intrenable);
1524 stat = 0xff;
1525 }
1526
1527 writel (ints, ®s->intrstatus);
1528 return stat;
1529}
1530
1531
1532
1533
1534
1535
1536
1537static void hc_release_ohci (ohci_t *ohci)
1538{
1539 dbg ("USB HC release ohci usb-%s", ohci->slot_name);
1540
1541 if (!ohci->disabled)
1542 hc_reset (ohci);
1543}
1544
1545
1546
1547
1548
1549
1550static char ohci_inited = 0;
1551
1552int usb_lowlevel_init(int index, void **controller)
1553{
1554 memset (&gohci, 0, sizeof (ohci_t));
1555 memset (&urb_priv, 0, sizeof (urb_priv_t));
1556
1557
1558 if ((__u32)&ghcca[0] & 0xff) {
1559 err("HCCA not aligned!!");
1560 return -1;
1561 }
1562 phcca = &ghcca[0];
1563 info("aligned ghcca %p", phcca);
1564 memset(&ohci_dev, 0, sizeof(struct ohci_device));
1565 if ((__u32)&ohci_dev.ed[0] & 0x7) {
1566 err("EDs not aligned!!");
1567 return -1;
1568 }
1569 memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
1570 if ((__u32)gtd & 0x7) {
1571 err("TDs not aligned!!");
1572 return -1;
1573 }
1574 ptd = gtd;
1575 gohci.hcca = phcca;
1576 memset (phcca, 0, sizeof (struct ohci_hcca));
1577
1578 gohci.disabled = 1;
1579 gohci.sleeping = 0;
1580 gohci.irq = -1;
1581#if defined(CONFIG_440EP)
1582 gohci.regs = (struct ohci_regs *)(CONFIG_SYS_PERIPHERAL_BASE | 0x1000);
1583#elif defined(CONFIG_440EPX) || defined(CONFIG_SYS_USB_HOST)
1584 gohci.regs = (struct ohci_regs *)(CONFIG_SYS_USB_HOST);
1585#endif
1586
1587 gohci.flags = 0;
1588 gohci.slot_name = "ppc440";
1589
1590 if (hc_reset (&gohci) < 0) {
1591 hc_release_ohci (&gohci);
1592 return -1;
1593 }
1594
1595 if (hc_start (&gohci) < 0) {
1596 err ("can't start usb-%s", gohci.slot_name);
1597 hc_release_ohci (&gohci);
1598 return -1;
1599 }
1600
1601#ifdef DEBUG
1602 ohci_dump (&gohci, 1);
1603#endif
1604 ohci_inited = 1;
1605 urb_finished = 1;
1606
1607 return 0;
1608}
1609
1610int usb_lowlevel_stop(int index)
1611{
1612
1613
1614 if (!ohci_inited)
1615 return 0;
1616
1617
1618 hc_reset (&gohci);
1619 return 0;
1620}
1621
1622#endif
1623