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11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14
15
16
17#define CONFIG_SYS_USE_NAND 1
18
19
20
21
22#define CONFIG_MACH_DAVINCI_HAWK
23#define CONFIG_ARM926EJS
24#define CONFIG_SOC_DA8XX
25#define CONFIG_SOC_DA850
26#define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
27#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
28#define CONFIG_SYS_OSCIN_FREQ 24000000
29#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
30#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
31#define CONFIG_SYS_HZ 1000
32#define CONFIG_SKIP_LOWLEVEL_INIT
33#define CONFIG_BOARD_EARLY_INIT_F
34#define CONFIG_AIS_CONFIG_FILE "board/$(BOARDDIR)/hawkboard-ais-nand.cfg"
35
36#define CONFIG_SYS_DA850_SYSCFG_SUSPSRC ( \
37 DAVINCI_SYSCFG_SUSPSRC_EMAC | \
38 DAVINCI_SYSCFG_SUSPSRC_I2C | \
39 DAVINCI_SYSCFG_SUSPSRC_SPI1 | \
40 DAVINCI_SYSCFG_SUSPSRC_TIMER0 | \
41 DAVINCI_SYSCFG_SUSPSRC_UART2)
42
43#if defined(CONFIG_UART_U_BOOT)
44#define CONFIG_SYS_TEXT_BASE 0xc1080000
45#elif !defined(CONFIG_SPL_BUILD)
46#define CONFIG_SYS_TEXT_BASE 0xc1180000
47#endif
48
49
50#define CONFIG_SPL
51#define CONFIG_SPL_FRAMEWORK
52#define CONFIG_SPL_BOARD_INIT
53#define CONFIG_SPL_NAND_SUPPORT
54#define CONFIG_SPL_NAND_BASE
55#define CONFIG_SPL_NAND_DRIVERS
56#define CONFIG_SPL_NAND_ECC
57#define CONFIG_SPL_NAND_SIMPLE
58#define CONFIG_SPL_LIBGENERIC_SUPPORT
59#define CONFIG_SPL_SERIAL_SUPPORT
60#define CONFIG_SPL_LDSCRIPT "board/$(BOARDDIR)/u-boot-spl-hawk.lds"
61#define CONFIG_SPL_TEXT_BASE 0xc1080000
62#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR
63
64
65
66
67#define CONFIG_SYS_MALLOC_LEN (1*1024*1024)
68#define PHYS_SDRAM_1 DAVINCI_DDR_EMIF_DATA_BASE
69#define PHYS_SDRAM_1_SIZE (128 << 20)
70#define CONFIG_SYS_SDRAM_BASE 0xc0000000
71#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20)
72#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 -\
73 GENERATED_GBL_DATA_SIZE)
74#define CONFIG_SYS_MONITOR_LEN 0x60000
75
76
77#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1)
78
79
80#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + 16*1024*1024)
81
82#define CONFIG_NR_DRAM_BANKS 1
83
84
85
86
87#define CONFIG_SYS_NS16550
88#define CONFIG_SYS_NS16550_SERIAL
89#define CONFIG_SYS_NS16550_REG_SIZE -4
90#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE
91#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
92#define CONFIG_CONS_INDEX 1
93#define CONFIG_BAUDRATE 115200
94
95
96
97
98#define CONFIG_DRIVER_TI_EMAC
99#define CONFIG_MII
100#define CONFIG_BOOTP_DNS
101#define CONFIG_BOOTP_DNS2
102#define CONFIG_BOOTP_SEND_HOSTNAME
103#define CONFIG_NET_RETRY_COUNT 10
104
105
106
107
108#ifdef CONFIG_SYS_USE_NAND
109#define CONFIG_SYS_NO_FLASH
110#define CONFIG_ENV_IS_IN_NAND
111#define CONFIG_ENV_SIZE (128 << 10)
112#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
113#define CONFIG_CLE_MASK 0x10
114#define CONFIG_ALE_MASK 0x8
115#define CONFIG_SYS_NAND_USE_FLASH_BBT
116#define CONFIG_NAND_DAVINCI
117#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
118#define CONFIG_SYS_NAND_HW_ECC_OOBFIRST
119#define CFG_DAVINCI_STD_NAND_LAYOUT
120#define CONFIG_SYS_NAND_CS 3
121#define CONFIG_SYS_NAND_PAGE_2K
122
123#define CONFIG_SYS_MAX_NAND_DEVICE 1
124#define CONFIG_SYS_NAND_BASE_LIST { 0x62000000, }
125
126#define CONFIG_ENV_OFFSET 0x0
127
128#define CONFIG_SYS_NAND_PAGE_SIZE (2 << 10)
129#define CONFIG_SYS_NAND_BLOCK_SIZE (128 << 10)
130#define CONFIG_SYS_NAND_U_BOOT_OFFS 0xe0000
131#define CONFIG_SYS_NAND_U_BOOT_DST 0xc1180000
132#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
133#define CONFIG_SYS_NAND_U_BOOT_RELOC_SP (CONFIG_SYS_NAND_U_BOOT_DST - \
134 CONFIG_SYS_NAND_U_BOOT_SIZE - \
135 CONFIG_SYS_MALLOC_LEN - \
136 GENERATED_GBL_DATA_SIZE)
137#define CONFIG_SYS_NAND_ECCPOS { \
138 24, 25, 26, 27, 28, \
139 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, \
140 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, \
141 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, \
142 59, 60, 61, 62, 63 }
143#define CONFIG_SYS_NAND_PAGE_COUNT 64
144#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
145#define CONFIG_SYS_NAND_ECCSIZE 512
146#define CONFIG_SYS_NAND_ECCBYTES 10
147#define CONFIG_SYS_NAND_OOBSIZE 64
148
149#endif
150
151
152#define CONFIG_SYS_USB_OHCI_CPU_INIT
153#define CONFIG_USB_OHCI_NEW
154#define CONFIG_USB_OHCI_DA8XX
155#define CONFIG_USB_STORAGE
156#define CONFIG_DOS_PARTITION
157#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x01E25000
158#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 15
159#define CONFIG_SYS_USB_OHCI_SLOT_NAME "hawkboard"
160
161
162
163
164#define CONFIG_MISC_INIT_R
165#define CONFIG_BOOTFILE "uImage"
166#define CONFIG_SYS_PROMPT "hawkboard > "
167#define CONFIG_SYS_CBSIZE 1024
168#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
169#define CONFIG_SYS_MAXARGS 16
170#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
171#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
172#define CONFIG_VERSION_VARIABLE
173#define CONFIG_AUTO_COMPLETE
174#define CONFIG_SYS_HUSH_PARSER
175#define CONFIG_CMDLINE_EDITING
176#define CONFIG_SYS_LONGHELP
177#define CONFIG_CRC32_VERIFY
178#define CONFIG_MX_CYCLIC
179
180
181
182
183#define LINUX_BOOT_PARAM_ADDR (CONFIG_SYS_MEMTEST_START + 0x100)
184#define CONFIG_CMDLINE_TAG
185#define CONFIG_SETUP_MEMORY_TAGS
186#define CONFIG_BOOTARGS \
187 "mem=128M console=ttyS2,115200n8 root=/dev/ram0 rw initrd=0xc1180000,"\
188 "4M ip=static"
189#define CONFIG_BOOTDELAY 3
190
191
192
193
194#include <config_cmd_default.h>
195#define CONFIG_CMD_ENV
196#define CONFIG_CMD_ASKENV
197#define CONFIG_CMD_DHCP
198#define CONFIG_CMD_DIAG
199#define CONFIG_CMD_MII
200#define CONFIG_CMD_PING
201#define CONFIG_CMD_SAVES
202#define CONFIG_CMD_MEMORY
203#define CONFIG_CMD_USB
204#define CONFIG_CMD_EXT2
205
206#ifdef CONFIG_CMD_BDI
207#define CONFIG_CLOCKS
208#endif
209
210#ifdef CONFIG_SYS_USE_NAND
211#undef CONFIG_CMD_FLASH
212#undef CONFIG_CMD_IMLS
213#define CONFIG_CMD_NAND
214#endif
215
216#ifndef CONFIG_DRIVER_TI_EMAC
217#undef CONFIG_CMD_NET
218#undef CONFIG_CMD_DHCP
219#undef CONFIG_CMD_MII
220#undef CONFIG_CMD_PING
221#endif
222
223#endif
224