1/* 2 * Palm Tungsten|C configuration file 3 * 4 * Copyright (C) 2009-2010 Marek Vasut <marek.vasut@gmail.com> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9#ifndef __CONFIG_H 10#define __CONFIG_H 11 12#include <asm/arch/pxa-regs.h> 13 14/* 15 * High Level Board Configuration Options 16 */ 17#define CONFIG_CPU_PXA25X 1 /* Intel PXA255 CPU */ 18#define CONFIG_PALMTC 1 /* Palm Tungsten|C board */ 19 20/* we will never enable dcache, because we have to setup MMU first */ 21#define CONFIG_SYS_DCACHE_OFF 22 23/* 24 * Environment settings 25 */ 26#define CONFIG_ENV_OVERWRITE 27#define CONFIG_SYS_MALLOC_LEN (128*1024) 28#define CONFIG_SYS_TEXT_BASE 0x0 29 30#define CONFIG_BOOTCOMMAND \ 31 "if mmc init && fatload mmc 0 0xa0000000 uboot.script ; then " \ 32 "source 0xa0000000; " \ 33 "else " \ 34 "bootm 0x80000; " \ 35 "fi; " 36#define CONFIG_BOOTARGS \ 37 "console=tty0 console=ttyS0,115200" 38#define CONFIG_TIMESTAMP 39#define CONFIG_BOOTDELAY 2 /* Autoboot delay */ 40#define CONFIG_CMDLINE_TAG 41#define CONFIG_SETUP_MEMORY_TAGS 42 43#define CONFIG_LZMA /* LZMA compression support */ 44 45/* 46 * Serial Console Configuration 47 * STUART - the lower serial port on Colibri board 48 */ 49#define CONFIG_PXA_SERIAL 50#define CONFIG_FFUART 1 51#define CONFIG_CONS_INDEX 3 52#define CONFIG_BAUDRATE 115200 53 54/* 55 * Bootloader Components Configuration 56 */ 57#include <config_cmd_default.h> 58 59#undef CONFIG_CMD_NET 60#undef CONFIG_CMD_NFS 61#define CONFIG_CMD_ENV 62#define CONFIG_CMD_MMC 63#define CONFIG_LCD 64#define CONFIG_PXA_LCD 65 66/* 67 * MMC Card Configuration 68 */ 69#ifdef CONFIG_CMD_MMC 70#define CONFIG_MMC 71#define CONFIG_GENERIC_MMC 72#define CONFIG_PXA_MMC_GENERIC 73#define CONFIG_SYS_MMC_BASE 0xF0000000 74#define CONFIG_CMD_FAT 75#define CONFIG_CMD_EXT2 76#define CONFIG_DOS_PARTITION 77#endif 78 79/* 80 * LCD 81 */ 82#ifdef CONFIG_LCD 83#define CONFIG_ACX517AKN 84#define CONFIG_VIDEO_LOGO 85#define CONFIG_CMD_BMP 86#define CONFIG_SPLASH_SCREEN 87#define CONFIG_SPLASH_SCREEN_ALIGN 88#define CONFIG_VIDEO_BMP_GZIP 89#define CONFIG_VIDEO_BMP_RLE8 90#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE (2 << 20) 91#endif 92 93/* 94 * KGDB 95 */ 96#ifdef CONFIG_CMD_KGDB 97#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */ 98#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */ 99#endif 100 101/* 102 * HUSH Shell Configuration 103 */ 104#define CONFIG_SYS_HUSH_PARSER 1 105 106#define CONFIG_SYS_LONGHELP 107#ifdef CONFIG_SYS_HUSH_PARSER 108#define CONFIG_SYS_PROMPT "$ " 109#else 110#define CONFIG_SYS_PROMPT "=> " 111#endif 112#define CONFIG_SYS_CBSIZE 256 113#define CONFIG_SYS_PBSIZE \ 114 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 115#define CONFIG_SYS_MAXARGS 16 116#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 117#define CONFIG_SYS_DEVICE_NULLDEV 1 118 119/* 120 * Clock Configuration 121 */ 122#undef CONFIG_SYS_CLKS_IN_HZ 123#define CONFIG_SYS_HZ 3686400 /* Timer @ 3686400 Hz */ 124#define CONFIG_SYS_CPUSPEED 0x161 /* 400MHz;L=1 M=3 T=1 */ 125 126/* 127 * DRAM Map 128 */ 129#define CONFIG_NR_DRAM_BANKS 1 /* 1 bank of DRAM */ 130#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */ 131#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */ 132 133#define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */ 134#define CONFIG_SYS_DRAM_SIZE 0x04000000 /* 64 MB DRAM */ 135 136#define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */ 137#define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */ 138 139#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_DRAM_BASE 140 141#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 142#define CONFIG_SYS_INIT_SP_ADDR 0xfffff800 143 144/* 145 * NOR FLASH 146 */ 147#ifdef CONFIG_CMD_FLASH 148#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */ 149#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */ 150#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 151 152#define CONFIG_SYS_FLASH_CFI 153#define CONFIG_FLASH_CFI_DRIVER 1 154#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT 155 156#define CONFIG_SYS_MAX_FLASH_BANKS 1 157#define CONFIG_SYS_MAX_FLASH_SECT 64 158 159#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 160 161#define CONFIG_SYS_FLASH_ERASE_TOUT (2*CONFIG_SYS_HZ) 162#define CONFIG_SYS_FLASH_WRITE_TOUT (2*CONFIG_SYS_HZ) 163#define CONFIG_SYS_FLASH_LOCK_TOUT (2*CONFIG_SYS_HZ) 164#define CONFIG_SYS_FLASH_UNLOCK_TOUT (2*CONFIG_SYS_HZ) 165#define CONFIG_SYS_FLASH_PROTECTION 166 167#define CONFIG_ENV_IS_IN_FLASH 1 168#define CONFIG_ENV_SECT_SIZE 0x40000 169#else 170#define CONFIG_SYS_NO_FLASH 171#define CONFIG_ENV_IS_NOWHERE 172#endif 173 174#define CONFIG_SYS_MONITOR_BASE 0x0 175#define CONFIG_SYS_MONITOR_LEN 0x40000 176 177#define CONFIG_ENV_SIZE 0x4000 178#define CONFIG_ENV_ADDR 0x40000 179 180/* 181 * GPIO settings 182 */ 183#define CONFIG_SYS_GAFR0_L_VAL 0x00011004 184#define CONFIG_SYS_GAFR0_U_VAL 0xa5000008 185#define CONFIG_SYS_GAFR1_L_VAL 0x60888050 186#define CONFIG_SYS_GAFR1_U_VAL 0xaaa50aaa 187#define CONFIG_SYS_GAFR2_L_VAL 0x0aaaaaaa 188#define CONFIG_SYS_GAFR2_U_VAL 0x00000000 189#define CONFIG_SYS_GPCR0_VAL 0x0 190#define CONFIG_SYS_GPCR1_VAL 0x0 191#define CONFIG_SYS_GPCR2_VAL 0x0 192#define CONFIG_SYS_GPDR0_VAL 0xcfff8140 193#define CONFIG_SYS_GPDR1_VAL 0xfcbfbef3 194#define CONFIG_SYS_GPDR2_VAL 0x0001ffff 195#define CONFIG_SYS_GPSR0_VAL 0x00010f8f 196#define CONFIG_SYS_GPSR1_VAL 0x00bf5de5 197#define CONFIG_SYS_GPSR2_VAL 0x03fe0800 198 199#define CONFIG_SYS_PSSR_VAL PSSR_RDH 200 201/* Clock setup: 202 * CKEN[1] - PWM1 ; CKEN[6] - FFUART 203 * CKEN[12] - MMC ; CKEN[16] - LCD 204 */ 205#define CONFIG_SYS_CKEN 0x00011042 206#define CONFIG_SYS_CCCR 0x00000161 207 208/* 209 * Memory settings 210 */ 211#define CONFIG_SYS_MSC0_VAL 0x800092c2 212#define CONFIG_SYS_MSC1_VAL 0x80008000 213#define CONFIG_SYS_MSC2_VAL 0x80008000 214#define CONFIG_SYS_MDCNFG_VAL 0x00001ac9 215#define CONFIG_SYS_MDREFR_VAL 0x00118018 216#define CONFIG_SYS_MDMRS_VAL 0x00220032 217#define CONFIG_SYS_FLYCNFG_VAL 0x01fe01fe 218#define CONFIG_SYS_SXCNFG_VAL 0x00000000 219 220/* 221 * PCMCIA and CF Interfaces 222 */ 223#define CONFIG_SYS_MECR_VAL 0x00000000 224#define CONFIG_SYS_MCMEM0_VAL 0x00010504 225#define CONFIG_SYS_MCMEM1_VAL 0x00010504 226#define CONFIG_SYS_MCATT0_VAL 0x00010504 227#define CONFIG_SYS_MCATT1_VAL 0x00010504 228#define CONFIG_SYS_MCIO0_VAL 0x00010e04 229#define CONFIG_SYS_MCIO1_VAL 0x00010e04 230 231#endif /* __CONFIG_H */ 232