1/* 2 * Configuation settings for the Renesas RSK2+SH7269 board 3 * 4 * Copyright (C) 2012 Renesas Electronics Europe Ltd. 5 * Copyright (C) 2012 Phil Edworthy 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10#ifndef __RSK7269_H 11#define __RSK7269_H 12 13#undef DEBUG 14#define CONFIG_SH 1 15#define CONFIG_SH2 1 16#define CONFIG_SH2A 1 17#define CONFIG_CPU_SH7269 1 18#define CONFIG_RSK7269 1 19 20#ifndef _CONFIG_CMD_DEFAULT_H 21# include <config_cmd_default.h> 22#endif 23 24#define CONFIG_BAUDRATE 115200 25#define CONFIG_BOOTARGS "console=ttySC7,115200" 26#define CONFIG_BOOTDELAY 3 27#define CONFIG_SYS_BAUDRATE_TABLE { CONFIG_BAUDRATE } 28 29#define CONFIG_SYS_LONGHELP /* undef to save memory */ 30#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ 31#define CONFIG_SYS_CBSIZE 256 /* Boot Argument Buffer Size */ 32#define CONFIG_SYS_PBSIZE 256 /* Print Buffer Size */ 33#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 34 35/* Serial */ 36#define CONFIG_SCIF_CONSOLE 37#define CONFIG_CONS_SCIF7 38 39/* Memory */ 40/* u-boot relocated to top 256KB of ram */ 41#define CONFIG_SYS_TEXT_BASE 0x0DFC0000 42#define CONFIG_SYS_SDRAM_BASE 0x0C000000 43#define CONFIG_SYS_SDRAM_SIZE (32 * 1024 * 1024) 44 45#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 46#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000) 47#define CONFIG_SYS_MALLOC_LEN (256 * 1024) 48#define CONFIG_SYS_MONITOR_LEN (128 * 1024) 49#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4*1024*1024) 50 51/* NOR Flash */ 52#define CONFIG_FLASH_CFI_DRIVER 53#define CONFIG_SYS_FLASH_CFI 54#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 55#define CONFIG_SYS_FLASH_BASE 0x20000000 /* Non-cached */ 56#define CONFIG_SYS_MAX_FLASH_BANKS 1 57#define CONFIG_SYS_MAX_FLASH_SECT 512 58 59#define CONFIG_ENV_IS_IN_FLASH 1 60#define CONFIG_ENV_OFFSET (128 * 1024) 61#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) 62#define CONFIG_ENV_SECT_SIZE (64 * 1024) 63#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 64 65/* Board Clock */ 66#define CONFIG_SYS_CLK_FREQ 66125000 67#define CMT_CLK_DIVIDER 32 /* 8 (default), 32, 128 or 512 */ 68#define CONFIG_SYS_HZ (CONFIG_SYS_CLK_FREQ / CMT_CLK_DIVIDER) 69 70/* Network interface */ 71#define CONFIG_SMC911X 72#define CONFIG_SMC911X_16_BIT 73#define CONFIG_SMC911X_BASE 0x24000000 74 75#endif /* __RSK7269_H */ 76