1/* 2 * ti816x_evm.h 3 * 4 * Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com> 5 * Antoine Tenart, <atenart@adeneo-embedded.com> 6 * 7 * SPDX-License-Identifier: GPL-2.0+ 8 */ 9 10#ifndef __CONFIG_TI816X_EVM_H 11#define __CONFIG_TI816X_EVM_H 12 13#define CONFIG_TI81XX 14#define CONFIG_TI816X 15#define CONFIG_SYS_NO_FLASH 16#define CONFIG_OMAP 17#define CONFIG_OMAP_COMMON 18 19#define CONFIG_ARCH_CPU_INIT 20 21#include <asm/arch/omap.h> 22 23#define CONFIG_ENV_SIZE 0x2000 24#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (32 * 1024)) 25#define CONFIG_SYS_LONGHELP /* undef save memory */ 26#define CONFIG_SYS_HUSH_PARSER 27#define CONFIG_SYS_PROMPT "u-boot/ti816x# " 28#define CONFIG_MACH_TYPE MACH_TYPE_TI8168EVM 29 30#define CONFIG_OF_LIBFDT 31#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 32#define CONFIG_SETUP_MEMORY_TAGS 33#define CONFIG_INITRD_TAG /* required for ramdisk support */ 34 35#include <config_cmd_default.h> /* u-boot default commands */ 36 37#define CONFIG_VERSION_VARIABLE 38#define CONFIG_DISPLAY_CPUINFO 39 40#define CONFIG_BOOTDELAY 3 /* set negative for no autoboot */ 41#define CONFIG_EXTRA_ENV_SETTINGS \ 42 "loadaddr=0x81000000\0" \ 43 44#define CONFIG_BOOTCOMMAND \ 45 "mmc rescan;" \ 46 "fatload mmc 0 ${loadaddr} uImage;" \ 47 "bootm ${loadaddr}" \ 48 49#define CONFIG_BOOTARGS "console=ttyO2,115200n8 noinitrd earlyprintk" 50 51/* Clock Defines */ 52#define V_OSCK 24000000 /* Clock output from T2 */ 53#define V_SCLK (V_OSCK >> 1) 54 55#define CONFIG_SYS_MAXARGS 32 56#define CONFIG_SYS_CBSIZE 512 /* console I/O buffer size */ 57#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE \ 58 + sizeof(CONFIG_SYS_PROMPT) + 16) /* print buffer size */ 59#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* boot arg buffer size */ 60 61#undef CONFIG_SYS_CLKS_IN_HZ 62#define CONFIG_SYS_LOAD_ADDR 0x81000000 /* Default load address */ 63#define CONFIG_SYS_HZ 1000 /* 1ms clock */ 64 65#define CONFIG_CMD_ASKEN 66#define CONFIG_CMD_ECHO 67#define CONFIG_OMAP_GPIO 68#define CONFIG_MMC 69#define CONFIG_GENERIC_MMC 70#define CONFIG_OMAP_HSMMC 71#define CONFIG_CMD_MMC 72#define CONFIG_DOS_PARTITION 73#define CONFIG_CMD_FAT 74#define CONFIG_CMD_EXT2 75 76#define CONFIG_FS_FAT 77 78/* 79 * Only one of the following two options (DDR3/DDR2) should be enabled 80 * CONFIG_TI816X_EVM_DDR2 81 * CONFIG_TI816X_EVM_DDR3 82 */ 83#define CONFIG_TI816X_EVM_DDR3 84 85/* 86 * Supported values: 400, 531, 675 or 796 MHz 87 */ 88#define CONFIG_TI816X_DDR_PLL_796 89 90#define CONFIG_TI816X_USE_EMIF0 1 91#define CONFIG_TI816X_USE_EMIF1 1 92 93 94#define CONFIG_NR_DRAM_BANKS 2 /* we have 2 banks of DRAM */ 95#define PHYS_DRAM_1 0x80000000 /* DRAM Bank #1 */ 96#define PHYS_DRAM_1_SIZE 0x40000000 /* 1 GB */ 97#define PHYS_DRAM_2 0xC0000000 /* DRAM Bank #2 */ 98#define PHYS_DRAM_2_SIZE 0x40000000 /* 1 GB */ 99 100#define CONFIG_MAX_RAM_BANK_SIZE (2048 << 20) /* 2048MB */ 101#define CONFIG_SYS_SDRAM_BASE PHYS_DRAM_1 102#define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \ 103 GENERATED_GBL_DATA_SIZE) 104 105/** 106 * Platform/Board specific defs 107 */ 108#define CONFIG_SYS_CLK_FREQ 27000000 109#define CONFIG_SYS_TIMERBASE 0x4802E000 110#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ 111 112#undef CONFIG_NAND_OMAP_GPMC 113 114/* 115 * NS16550 Configuration 116 */ 117#define CONFIG_SYS_NS16550 118#define CONFIG_SYS_NS16550_SERIAL 119#define CONFIG_SYS_NS16550_REG_SIZE (-4) 120#define CONFIG_SYS_NS16550_CLK (48000000) 121#define CONFIG_SYS_NS16550_COM1 0x48024000 /* Base EVM has UART2 */ 122 123#define CONFIG_BAUDRATE 115200 124 125/* allow overwriting serial config and ethaddr */ 126#define CONFIG_ENV_OVERWRITE 127 128#define CONFIG_SERIAL1 129#define CONFIG_SERIAL2 130#define CONFIG_SERIAL3 131#define CONFIG_CONS_INDEX 1 132#define CONFIG_SYS_CONSOLE_INFO_QUIET 133 134#define CONFIG_ENV_IS_NOWHERE 135 136/* SPL */ 137/* Defines for SPL */ 138#define CONFIG_SPL 139#define CONFIG_SPL_FRAMEWORK 140#define CONFIG_SPL_TEXT_BASE 0x40400000 141#define CONFIG_SPL_MAX_SIZE ((128 - 18) * 1024) 142#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR 143 144#define CONFIG_SPL_BSS_START_ADDR 0x80000000 145#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ 146 147#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */ 148#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */ 149#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1 150#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img" 151#define CONFIG_SPL_MMC_SUPPORT 152#define CONFIG_SPL_FAT_SUPPORT 153 154#define CONFIG_SPL_LIBCOMMON_SUPPORT 155#define CONFIG_SPL_LIBDISK_SUPPORT 156#define CONFIG_SPL_LIBGENERIC_SUPPORT 157#define CONFIG_SPL_SERIAL_SUPPORT 158#define CONFIG_SPL_GPIO_SUPPORT 159#define CONFIG_SPL_YMODEM_SUPPORT 160#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x20000 161#define CONFIG_SYS_SPI_U_BOOT_SIZE 0x40000 162#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds" 163 164#define CONFIG_SPL_BOARD_INIT 165 166#define CONFIG_SYS_TEXT_BASE 0x80800000 167#define CONFIG_SYS_SPL_MALLOC_START 0x80208000 168#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 169 170/* Since SPL did pll and ddr initialization for us, 171 * we don't need to do it twice. 172 */ 173#ifndef CONFIG_SPL_BUILD 174#define CONFIG_SKIP_LOWLEVEL_INIT 175#endif 176 177/* Unsupported features */ 178#undef CONFIG_USE_IRQ 179 180#endif 181