LXR uboot/arch/arm/cpu/armv7/am33xx/sys

   1/*
   2 * sys_info.c
   3 *
   4 * System information functions
   5 *
   6 * Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
   7 *
   8 * Derived from Beagle Board and 3430 SDP code by
   9 *      Richard Woodruff <r-woodruff2@ti.com>
  10 *      Syed Mohammed Khasim <khasim@ti.com>
  11 *
  12 * SPDX-License-Identifier:     GPL-2.0+
  13 */
  14
  15#include <common.h>
  16#include <asm/io.h>
  17#include <asm/arch/sys_proto.h>
  18#include <asm/arch/cpu.h>
  19#include <asm/arch/clock.h>
  20#include <power/tps65910.h>
  21
  22struct ctrl_stat *cstat = (struct ctrl_stat *)CTRL_BASE;
  23
  24/**
  25 * get_cpu_rev(void) - extract rev info
  26 */
  27u32 get_cpu_rev(void)
  28{
  29        u32 id;
  30        u32 rev;
  31
  32        id = readl(DEVICE_ID);
  33        rev = (id >> 28) & 0xff;
  34
  35        return rev;
  36}
  37
  38/**
  39 * get_cpu_type(void) - extract cpu info
  40 */
  41u32 get_cpu_type(void)
  42{
  43        u32 id = 0;
  44        u32 partnum;
  45
  46        id = readl(DEVICE_ID);
  47        partnum = (id >> 12) & 0xffff;
  48
  49        return partnum;
  50}
  51
  52/**
  53 * get_board_rev() - setup to pass kernel board revision information
  54 * returns:(bit[0-3] sub version, higher bit[7-4] is higher version)
  55 */
  56u32 get_board_rev(void)
  57{
  58        return BOARD_REV_ID;
  59}
  60
  61/**
  62 * get_device_type(): tell if GP/HS/EMU/TST
  63 */
  64u32 get_device_type(void)
  65{
  66        int mode;
  67        mode = readl(&cstat->statusreg) & (DEVICE_MASK);
  68        return mode >>= 8;
  69}
  70
  71/**
  72 * get_sysboot_value(void) - return SYS_BOOT[4:0]
  73 */
  74u32 get_sysboot_value(void)
  75{
  76        int mode;
  77        mode = readl(&cstat->statusreg) & (SYSBOOT_MASK);
  78        return mode;
  79}
  80
  81#ifdef CONFIG_DISPLAY_CPUINFO
  82/**
  83 * Print CPU information
  84 */
  85int print_cpuinfo(void)
  86{
  87        char *cpu_s, *sec_s;
  88
  89        switch (get_cpu_type()) {
  90        case AM335X:
  91                cpu_s = "AM335X";
  92                break;
  93        case TI81XX:
  94                cpu_s = "TI81XX";
  95                break;
  96        default:
  97                cpu_s = "Unknown cpu type";
  98                break;
  99        }
 100
 101        switch (get_device_type()) {
 102        case TST_DEVICE:
 103                sec_s = "TST";
 104                break;
 105        case EMU_DEVICE:
 106                sec_s = "EMU";
 107                break;
 108        case HS_DEVICE:
 109                sec_s = "HS";
 110                break;
 111        case GP_DEVICE:
 112                sec_s = "GP";
 113                break;
 114        default:
 115                sec_s = "?";
 116        }
 117
 118        printf("%s-%s rev %d\n", cpu_s, sec_s, get_cpu_rev());
 119
 120        return 0;
 121}
 122#endif  /* CONFIG_DISPLAY_CPUINFO */
 123
 124#ifdef CONFIG_AM33XX
 125int am335x_get_efuse_mpu_max_freq(struct ctrl_dev *cdev)
 126{
 127        int sil_rev;
 128
 129        sil_rev = readl(&cdev->deviceid) >> 28;
 130
 131        if (sil_rev == 1)
 132                /* PG 2.0, efuse may not be set. */
 133                return MPUPLL_M_800;
 134        else if (sil_rev >= 2) {
 135                /* Check what the efuse says our max speed is. */
 136                int efuse_arm_mpu_max_freq;
 137                efuse_arm_mpu_max_freq = readl(&cdev->efuse_sma);
 138                switch ((efuse_arm_mpu_max_freq & DEVICE_ID_MASK)) {
 139                case AM335X_ZCZ_1000:
 140                        return MPUPLL_M_1000;
 141                case AM335X_ZCZ_800:
 142                        return MPUPLL_M_800;
 143                case AM335X_ZCZ_720:
 144                        return MPUPLL_M_720;
 145                case AM335X_ZCZ_600:
 146                case AM335X_ZCE_600:
 147                        return MPUPLL_M_600;
 148                case AM335X_ZCZ_300:
 149                case AM335X_ZCE_300:
 150                        return MPUPLL_M_300;
 151                }
 152        }
 153
 154        /* PG 1.0 or otherwise unknown, use the PG1.0 max */
 155        return MPUPLL_M_720;
 156}
 157
 158int am335x_get_tps65910_mpu_vdd(int sil_rev, int frequency)
 159{
 160        /* For PG2.1 and later, we have one set of values. */
 161        if (sil_rev >= 2) {
 162                switch (frequency) {
 163                case MPUPLL_M_1000:
 164                        return TPS65910_OP_REG_SEL_1_3_2_5;
 165                case MPUPLL_M_800:
 166                        return TPS65910_OP_REG_SEL_1_2_6;
 167                case MPUPLL_M_720:
 168                        return TPS65910_OP_REG_SEL_1_2_0;
 169                case MPUPLL_M_600:
 170                case MPUPLL_M_300:
 171                        return TPS65910_OP_REG_SEL_1_1_3;
 172                }
 173        }
 174
 175        /* Default to PG1.0/PG2.0 values. */
 176        return TPS65910_OP_REG_SEL_1_1_3;
 177}
 178#endif
 179