LXR uboot/board/esd/common/esd405ep

   1/*
   2 * (C) Copyright 2007
   3 * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8#include <common.h>
   9
  10#if defined(CONFIG_CMD_NAND)
  11#include <asm/io.h>
  12#include <nand.h>
  13
  14/*
  15 * hardware specific access to control-lines
  16 */
  17static void esd405ep_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  18{
  19        struct nand_chip *this = mtd->priv;
  20        if (ctrl & NAND_CTRL_CHANGE) {
  21                if ( ctrl & NAND_CLE )
  22                        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_CLE);
  23                else
  24                        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_NAND_CLE);
  25                if ( ctrl & NAND_ALE )
  26                        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_ALE);
  27                else
  28                        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_NAND_ALE);
  29                if ( ctrl & NAND_NCE )
  30                        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CONFIG_SYS_NAND_CE);
  31                else
  32                        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_CE);
  33        }
  34
  35        if (cmd != NAND_CMD_NONE)
  36                writeb(cmd, this->IO_ADDR_W);
  37}
  38
  39
  40/*
  41 * read device ready pin
  42 */
  43static int esd405ep_nand_device_ready(struct mtd_info *mtdinfo)
  44{
  45        if (in_be32((void *)GPIO0_IR) & CONFIG_SYS_NAND_RDY)
  46                return 1;
  47        return 0;
  48}
  49
  50
  51int board_nand_init(struct nand_chip *nand)
  52{
  53        /*
  54         * Set NAND-FLASH GPIO signals to defaults
  55         */
  56        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~(CONFIG_SYS_NAND_CLE | CONFIG_SYS_NAND_ALE));
  57        out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CONFIG_SYS_NAND_CE);
  58
  59        /*
  60         * Initialize nand_chip structure
  61         */
  62        nand->cmd_ctrl = esd405ep_nand_hwcontrol;
  63        nand->dev_ready = esd405ep_nand_device_ready;
  64        nand->ecc.mode = NAND_ECC_SOFT;
  65        nand->chip_delay = NAND_BIG_DELAY_US;
  66        nand->options = NAND_SAMSUNG_LP_OPTIONS;
  67        return 0;
  68}
  69#endif
  70