LXR uboot/board/syteco/jadecpu/jadecpu.c

   1/*
   2 * (c) 2010 Graf-Syteco, Matthias Weisser
   3 * <weisserm@arcor.de>
   4 *
   5 * (C) Copyright 2007, mycable GmbH
   6 * Carsten Schneider <cs@mycable.de>, Alexander Bigga <ab@mycable.de>
   7 *
   8 * SPDX-License-Identifier:     GPL-2.0+
   9 */
  10
  11#include <common.h>
  12#include <netdev.h>
  13#include <asm/io.h>
  14#include <asm/arch/mb86r0x.h>
  15
  16DECLARE_GLOBAL_DATA_PTR;
  17
  18/*
  19 * Miscellaneous platform dependent initialisations
  20 */
  21int board_init(void)
  22{
  23        struct mb86r0x_ccnt * ccnt = (struct mb86r0x_ccnt *)
  24                                        MB86R0x_CCNT_BASE;
  25
  26        /* We select mode 0 for group 2 and mode 1 for group 4 */
  27        writel(0x00000010, &ccnt->cmux_md);
  28
  29        gd->flags = 0;
  30        gd->bd->bi_boot_params = PHYS_SDRAM + PHYS_SDRAM_SIZE - 0x10000;
  31
  32        icache_enable();
  33        dcache_enable();
  34
  35        return 0;
  36}
  37
  38static void setup_display_power(uint32_t pwr_bit, char *pwm_opts,
  39                                unsigned long pwm_base)
  40{
  41        struct mb86r0x_gpio *gpio = (struct mb86r0x_gpio *)
  42                                        MB86R0x_GPIO_BASE;
  43        struct mb86r0x_pwm *pwm = (struct mb86r0x_pwm *) pwm_base;
  44        const char *e;
  45
  46        writel(readl(&gpio->gpdr2) | pwr_bit, &gpio->gpdr2);
  47
  48        e = getenv(pwm_opts);
  49        if (e != NULL) {
  50                const char *s;
  51                uint32_t freq, init;
  52
  53                freq = 0;
  54                init = 0;
  55
  56                s = strchr(e, 'f');
  57                if (s != NULL)
  58                        freq = simple_strtol(s + 2, NULL, 0);
  59
  60                s = strchr(e, 'i');
  61                if (s != NULL)
  62                        init = simple_strtol(s + 2, NULL, 0);
  63
  64                if (freq > 0) {
  65                        writel(CONFIG_MB86R0x_IOCLK / 1000 / freq,
  66                                &pwm->bcr);
  67                        writel(1002, &pwm->tpr);
  68                        writel(1, &pwm->pr);
  69                        writel(init * 10 + 1, &pwm->dr);
  70                        writel(1, &pwm->cr);
  71                        writel(1, &pwm->sr);
  72                }
  73        }
  74}
  75
  76int board_late_init(void)
  77{
  78        struct mb86r0x_gpio *gpio = (struct mb86r0x_gpio *)
  79                                        MB86R0x_GPIO_BASE;
  80        uint32_t in_word;
  81
  82#ifdef CONFIG_VIDEO_MB86R0xGDC
  83        /* Check if we have valid display settings and turn on power if so */
  84        /* Display 0 */
  85        if (getenv("gs_dsp_0_param") || getenv("videomode"))
  86                setup_display_power((1 << 3), "gs_dsp_0_pwm",
  87                                        MB86R0x_PWM0_BASE);
  88
  89        /* The corresponding GPIO is always an output */
  90        writel(readl(&gpio->gpddr2) | (1 << 3), &gpio->gpddr2);
  91
  92        /* Display 1 */
  93        if (getenv("gs_dsp_1_param") || getenv("videomode1"))
  94                setup_display_power((1 << 4), "gs_dsp_1_pwm",
  95                                        MB86R0x_PWM1_BASE);
  96
  97        /* The corresponding GPIO is always an output */
  98        writel(readl(&gpio->gpddr2) | (1 << 4), &gpio->gpddr2);
  99#endif /* CONFIG_VIDEO_MB86R0xGDC */
 100
 101        /* 5V enable */
 102        writel(readl(&gpio->gpdr1) & ~(1 << 5), &gpio->gpdr1);
 103        writel(readl(&gpio->gpddr1) | (1 << 5), &gpio->gpddr1);
 104
 105        /* We have special boot options if told by GPIOs */
 106        in_word = readl(&gpio->gpdr1);
 107
 108        if ((in_word & 0xC0) == 0xC0) {
 109                setenv("stdin", "serial");
 110                setenv("stdout", "serial");
 111                setenv("stderr", "serial");
 112                setenv("preboot", "run gs_slow_boot");
 113        } else if ((in_word & 0xC0) != 0) {
 114                setenv("stdout", "vga");
 115                setenv("preboot", "run gs_slow_boot");
 116        } else {
 117                setenv("stdin", "serial");
 118                setenv("stdout", "serial");
 119                setenv("stderr", "serial");
 120                if (getenv("gs_devel")) {
 121                        setenv("preboot", "run gs_slow_boot");
 122                } else {
 123                        setenv("preboot", "run gs_fast_boot");
 124                }
 125        }
 126
 127        return 0;
 128}
 129
 130int misc_init_r(void)
 131{
 132        return 0;
 133}
 134
 135/*
 136 * DRAM configuration
 137 */
 138int dram_init(void)
 139{
 140        /* dram_init must store complete ramsize in gd->ram_size */
 141        gd->ram_size = get_ram_size((void *)PHYS_SDRAM,
 142                                        PHYS_SDRAM_SIZE);
 143
 144        return 0;
 145}
 146
 147void dram_init_banksize(void)
 148{
 149        gd->bd->bi_dram[0].start = PHYS_SDRAM;
 150        gd->bd->bi_dram[0].size = gd->ram_size;
 151}
 152
 153int board_eth_init(bd_t *bis)
 154{
 155        int rc = 0;
 156#ifdef CONFIG_SMC911X
 157        rc = smc911x_initialize(0, CONFIG_SMC911X_BASE);
 158#endif
 159        return rc;
 160}
 161