1/* 2 * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7#ifndef __CONFIG_H 8#define __CONFIG_H 9 10/* 11 * Define this to make U-Boot skip low level initialization when loaded 12 * by initial bootloader. Not required by NAND U-Boot version but IS 13 * required for a NOR version used to burn the real NOR U-Boot into 14 * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive 15 * so it is NOT possible to build a U-Boot with both NAND and NOR routines. 16 * NOR U-Boot is loaded directly from Flash so it must perform all the 17 * low level initialization itself. NAND version is loaded by an initial 18 * bootloader (UBL in TI-ese) that performs such an initialization so it's 19 * skipped in NAND version. The third DaVinci boot mode loads a bootloader 20 * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever) 21 * performing low level init prior to loading. All that means we can NOT use 22 * NAND version to put U-Boot into NOR because it doesn't have NOR support and 23 * we can NOT use NOR version because it performs low level initialization 24 * effectively destroying itself in DDR memory. That's why a separate NOR 25 * version with this define is needed. It is loaded via UART, then one uses 26 * it to somehow download a proper NOR version built WITHOUT this define to 27 * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze 28 * NOR support into the initial bootloader so it won't be needed but DaVinci 29 * static RAM might be too small for this (I have something like 2Kbytes left 30 * as of now, without NOR support) so this might've not happened... 31 * 32#define CONFIG_NOR_UART_BOOT 33 */ 34 35/*=======*/ 36/* Board */ 37/*=======*/ 38#define DV_EVM 39#define CONFIG_SYS_NAND_SMALLPAGE 40#define CONFIG_SYS_USE_NAND 41/*===================*/ 42/* SoC Configuration */ 43/*===================*/ 44#define CONFIG_ARM926EJS /* arm926ejs CPU core */ 45#define CONFIG_SYS_TIMERBASE 0x01c21400 /* use timer 0 */ 46#define CONFIG_SYS_HZ_CLOCK 27000000 /* Timer Input clock freq */ 47#define CONFIG_SOC_DM644X 48/*====================================================*/ 49/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */ 50/* on Sonata/DV_EVM board. No EEPROM on schmoogie. */ 51/*====================================================*/ 52#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 53#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 54#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 55#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20 56/*=============*/ 57/* Memory Info */ 58/*=============*/ 59#define CONFIG_SYS_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */ 60#define CONFIG_SYS_MEMTEST_START 0x80000000 /* memtest start address */ 61#define CONFIG_SYS_MEMTEST_END 0x81000000 /* 16MB RAM test */ 62#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */ 63#define PHYS_SDRAM_1 0x80000000 /* DDR Start */ 64#define PHYS_SDRAM_1_SIZE 0x10000000 /* DDR size 256MB */ 65 66#define DDR_8BANKS /* 8-bank DDR2 (256MB) */ 67/*====================*/ 68/* Serial Driver info */ 69/*====================*/ 70#define CONFIG_SYS_NS16550 71#define CONFIG_SYS_NS16550_SERIAL 72#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size, byteorder */ 73#define CONFIG_SYS_NS16550_COM1 0x01c20000 /* Base address of UART0 */ 74#define CONFIG_SYS_NS16550_CLK CONFIG_SYS_HZ_CLOCK /* Input clock to NS16550 */ 75#define CONFIG_CONS_INDEX 1 /* use UART0 for console */ 76#define CONFIG_BAUDRATE 115200 /* Default baud rate */ 77/*===================*/ 78/* I2C Configuration */ 79/*===================*/ 80#define CONFIG_HARD_I2C 81#define CONFIG_DRIVER_DAVINCI_I2C 82#define CONFIG_SYS_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */ 83#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */ 84/*==================================*/ 85/* Network & Ethernet Configuration */ 86/*==================================*/ 87#define CONFIG_DRIVER_TI_EMAC 88#define CONFIG_MII 89#define CONFIG_BOOTP_DNS 90#define CONFIG_BOOTP_DNS2 91#define CONFIG_BOOTP_SEND_HOSTNAME 92#define CONFIG_NET_RETRY_COUNT 10 93/*=====================*/ 94/* Flash & Environment */ 95/*=====================*/ 96#ifdef CONFIG_SYS_USE_NAND 97#define CONFIG_NAND_DAVINCI 98#define CONFIG_SYS_NAND_CS 2 99#undef CONFIG_ENV_IS_IN_FLASH 100#define CONFIG_SYS_NO_FLASH 101#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */ 102#ifdef CONFIG_SYS_NAND_SMALLPAGE 103#define CONFIG_ENV_SECT_SIZE 512 /* Env sector Size */ 104#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ 105#define CONFIG_MTD_PARTITIONS 106#define CONFIG_MTD_DEVICE 107#define CONFIG_CMD_MTDPARTS 108#define MTDIDS_DEFAULT \ 109 "nand0=davinci_nand.0" 110#define MTDPARTS_DEFAULT \ 111 "mtdparts=davinci_nand.0:384k(bootloader)ro,4m(kernel),-(filesystem)" 112#else 113#define CONFIG_ENV_SECT_SIZE 2048 /* Env sector Size */ 114#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 115#endif 116#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ 117#define CONFIG_SYS_NAND_BASE 0x02000000 118#define CONFIG_SYS_NAND_USE_FLASH_BBT 119#define CONFIG_SYS_NAND_HW_ECC 120#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */ 121#define CONFIG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */ 122#elif defined(CONFIG_SYS_USE_NOR) 123#ifdef CONFIG_NOR_UART_BOOT 124#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */ 125#else 126#undef CONFIG_SKIP_LOWLEVEL_INIT 127#endif 128#define CONFIG_ENV_IS_IN_FLASH 129#undef CONFIG_SYS_NO_FLASH 130#define CONFIG_FLASH_CFI_DRIVER 131#define CONFIG_SYS_FLASH_CFI 132#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */ 133#define CONFIG_SYS_FLASH_SECT_SZ 0x10000 /* 64KB sect size AMD Flash */ 134#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*3) 135#define PHYS_FLASH_1 0x02000000 /* CS2 Base address */ 136#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */ 137#define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */ 138#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ) 139#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ /* Env sector Size */ 140#endif 141/*==============================*/ 142/* U-Boot general configuration */ 143/*==============================*/ 144#define CONFIG_MISC_INIT_R 145#undef CONFIG_BOOTDELAY 146#define CONFIG_BOOTFILE "uImage" /* Boot file name */ 147#define CONFIG_SYS_PROMPT "U-Boot > " /* Monitor Command Prompt */ 148#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 149#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print buffer sz */ 150#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 151#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 152#define CONFIG_SYS_LOAD_ADDR 0x80700000 /* default Linux kernel load address */ 153#define CONFIG_VERSION_VARIABLE 154#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */ 155#define CONFIG_SYS_HUSH_PARSER 156#define CONFIG_CMDLINE_EDITING 157#define CONFIG_SYS_LONGHELP 158#define CONFIG_CRC32_VERIFY 159#define CONFIG_MX_CYCLIC 160#define CONFIG_MUSB_HCD 161#define CONFIG_USB_DAVINCI 162/*===================*/ 163/* Linux Information */ 164/*===================*/ 165#define LINUX_BOOT_PARAM_ADDR 0x80000100 166#define CONFIG_CMDLINE_TAG 167#define CONFIG_SETUP_MEMORY_TAGS 168#define CONFIG_BOOTARGS "mem=120M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp" 169#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2050000" 170/*=================*/ 171/* U-Boot commands */ 172/*=================*/ 173#include <config_cmd_default.h> 174#define CONFIG_CMD_ASKENV 175#define CONFIG_CMD_DHCP 176#define CONFIG_CMD_DIAG 177#define CONFIG_CMD_I2C 178#define CONFIG_CMD_MII 179#define CONFIG_CMD_PING 180#define CONFIG_CMD_SAVES 181#define CONFIG_CMD_EEPROM 182#undef CONFIG_CMD_BDI 183 184#ifdef CONFIG_CMD_BDI 185#define CONFIG_CLOCKS 186#endif 187 188#undef CONFIG_CMD_FPGA 189#undef CONFIG_CMD_SETGETDCR 190#ifdef CONFIG_SYS_USE_NAND 191#undef CONFIG_CMD_FLASH 192#undef CONFIG_CMD_IMLS 193#define CONFIG_CMD_NAND 194#elif defined(CONFIG_SYS_USE_NOR) 195#define CONFIG_CMD_JFFS2 196#else 197#error "Either CONFIG_SYS_USE_NAND or CONFIG_SYS_USE_NOR _MUST_ be defined !!!" 198#endif 199/*==========================*/ 200/* USB MSC support (if any) */ 201/*==========================*/ 202#ifdef CONFIG_USB_DAVINCI 203#define CONFIG_CMD_USB 204#ifdef CONFIG_MUSB_HCD 205#define CONFIG_USB_STORAGE 206#define CONFIG_CMD_STORAGE 207#define CONFIG_CMD_FAT 208#define CONFIG_DOS_PARTITION 209#endif 210#ifdef CONFIG_USB_KEYBOARD 211#define CONFIG_SYS_USB_EVENT_POLL 212#define CONFIG_PREBOOT "usb start" 213#endif 214#endif 215 216#define CONFIG_MAX_RAM_BANK_SIZE (256 << 20) /* 256 MB */ 217 218#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 219#define CONFIG_SYS_INIT_RAM_SIZE 0x1000 220#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ 221 CONFIG_SYS_INIT_RAM_SIZE - \ 222 GENERATED_GBL_DATA_SIZE) 223 224#endif /* __CONFIG_H */ 225