1/* 2 * Copyright (C) 2006 Atmel Corporation 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6#ifndef __ASM_AVR32_SDRAM_H 7#define __ASM_AVR32_SDRAM_H 8 9struct sdram_config { 10 /* Number of data bits. */ 11 enum { 12 SDRAM_DATA_16BIT = 16, 13 SDRAM_DATA_32BIT = 32, 14 } data_bits; 15 16 /* Number of address bits */ 17 uint8_t row_bits, col_bits, bank_bits; 18 19 /* SDRAM timings in cycles */ 20 uint8_t cas, twr, trc, trp, trcd, tras, txsr; 21 22 /* SDRAM refresh period in cycles */ 23 unsigned long refresh_period; 24}; 25 26/* 27 * Attempt to initialize the SDRAM controller using the specified 28 * parameters. Return the expected size of the memory area based on 29 * the number of address and data bits. 30 * 31 * The caller should verify that the configuration is correct by 32 * running a memory test, e.g. get_ram_size(). 33 */ 34extern unsigned long sdram_init(void *sdram_base, 35 const struct sdram_config *config); 36 37#endif /* __ASM_AVR32_SDRAM_H */ 38