LXR uboot/arch/powerpc/include/asm/5xx

   1/*
   2 * (C) Copyright 2003
   3 * Martin Winistoerfer, martinwinistoerfer@gmx.ch.
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8/*
   9 * File:                5xx_immap.h
  10 *
  11 * Discription:         MPC555 Internal Memory Map
  12 *
  13 */
  14
  15#ifndef __IMMAP_5XX__
  16#define __IMMAP_5XX__
  17
  18/* System Configuration Registers.
  19*/
  20typedef struct sys_conf {
  21        uint sc_siumcr;
  22        uint sc_sypcr;
  23        char res1[6];
  24        ushort sc_swsr;
  25        uint sc_sipend;
  26        uint sc_simask;
  27        uint sc_siel;
  28        uint sc_sivec;
  29        uint sc_tesr;
  30        uint sc_sgpiodt1;
  31        uint sc_sgpiodt2;
  32        uint sc_sgpiocr;
  33        uint sc_emcr;
  34        uint sc_res1aa;
  35        uint sc_res1ab;
  36        uint sc_pdmcr;
  37        char res3[192];
  38} sysconf5xx_t;
  39
  40
  41/* Memory Controller Registers.
  42*/
  43typedef struct  mem_ctlr {
  44        uint memc_br0;
  45        uint memc_or0;
  46        uint memc_br1;
  47        uint memc_or1;
  48        uint memc_br2;
  49        uint memc_or2;
  50        uint memc_br3;
  51        uint memc_or3;
  52        char res1[32];
  53        uint memc_dmbr;
  54        uint memc_dmor;
  55        char res2[48];
  56        ushort memc_mstat;
  57        ushort memc_res4a;
  58        char res3[132];
  59} memctl5xx_t;
  60
  61/* System Integration Timers.
  62*/
  63typedef struct  sys_int_timers {
  64        ushort sit_tbscr;
  65        char res1[2];
  66        uint sit_tbref0;
  67        uint sit_tbref1;
  68        char res2[20];
  69        ushort sit_rtcsc;
  70        char res3[2];
  71        uint sit_rtc;
  72        uint sit_rtsec;
  73        uint sit_rtcal;
  74        char res4[16];
  75        ushort sit_piscr;
  76        char res5[2];
  77        uint sit_pitc;
  78        uint sit_pitr;
  79        char res6[52];
  80} sit5xx_t;
  81
  82/* Clocks and Reset
  83*/
  84typedef struct clk_and_reset {
  85        uint car_sccr;
  86        uint car_plprcr;
  87        ushort car_rsr;
  88        ushort car_res7a;
  89        ushort car_colir;
  90        ushort car_res7b;
  91        ushort car_vsrmcr;
  92        ushort car_res7c;
  93        char res1[108];
  94
  95} car5xx_t;
  96
  97#define TBSCR_TBE               ((ushort)0x0001)
  98
  99/* System Integration Timer Keys
 100*/
 101typedef struct sitk {
 102        uint sitk_tbscrk;
 103        uint sitk_tbref0k;
 104        uint sitk_tbref1k;
 105        uint sitk_tbk;
 106        char res1[16];
 107        uint sitk_rtcsck;
 108        uint sitk_rtck;
 109        uint sitk_rtseck;
 110        uint sitk_rtcalk;
 111        char res2[16];
 112        uint sitk_piscrk;
 113        uint sitk_pitck;
 114        char res3[56];
 115} sitk5xx_t;
 116
 117/* Clocks and Reset Keys.
 118*/
 119typedef struct cark {
 120        uint    cark_sccrk;
 121        uint    cark_plprcrk;
 122        uint    cark_rsrk;
 123        char    res1[1140];
 124} cark8xx_t;
 125
 126/* The key to unlock registers maintained by keep-alive power.
 127*/
 128#define KAPWR_KEY       ((unsigned int)0x55ccaa33)
 129
 130/* Flash Configuration
 131*/
 132typedef struct fl {
 133        uint fl_cmfmcr;
 134        uint fl_cmftst;
 135        uint fl_cmfctl;
 136        char res1[52];
 137} fl5xx_t;
 138
 139/* Dpram Control
 140*/
 141typedef struct dprc {
 142        ushort dprc_dptmcr;
 143        ushort dprc_ramtst;
 144        ushort dprc_rambar;
 145        ushort dprc_misrh;
 146        ushort dprc_misrl;
 147        ushort dprc_miscnt;
 148} dprc5xx_t;
 149
 150/* Time Processor Unit
 151*/
 152typedef struct tpu {
 153        ushort tpu_tpumcr;
 154        ushort tpu_tcr;
 155        ushort tpu_dscr;
 156        ushort tpu_dssr;
 157        ushort tpu_ticr;
 158        ushort tpu_cier;
 159        ushort tpu_cfsr0;
 160        ushort tpu_cfsr1;
 161        ushort tpu_cfsr2;
 162        ushort tpu_cfsr3;
 163        ushort tpu_hsqr0;
 164        ushort tpu_hsqr1;
 165        ushort tpu_hsrr0;
 166        ushort tpu_hsrr1;
 167        ushort tpu_cpr0;
 168        ushort tpu_cpr1;
 169        ushort tpu_cisr;
 170        ushort tpu_lr;
 171        ushort tpu_sglr;
 172        ushort tpu_dcnr;
 173        ushort tpu_tpumcr2;
 174        ushort tpu_tpumcr3;
 175        ushort tpu_isdr;
 176        ushort tpu_iscr;
 177        char   res1[208];
 178        char   tpu[16][16];
 179        char   res2[512];
 180} tpu5xx_t;
 181
 182/* QADC
 183*/
 184typedef struct qadc {
 185        ushort qadc_64mcr;
 186        ushort qadc_64test;
 187        ushort qadc_64int;
 188        u_char  qadc_portqa;
 189        u_char  qadc_portqb;
 190        ushort qadc_ddrqa;
 191        ushort qadc_qacr0;
 192        ushort qadc_qacr1;
 193        ushort qadc_qacr2;
 194        ushort qadc_qasr0;
 195        ushort qadc_qasr1;
 196        char   res1[492];
 197       /* command convertion word table */
 198        ushort qadc_ccw[64];
 199       /* result word table, unsigned right justified */
 200        ushort qadc_rjurr[64];
 201       /* result word table, signed left justified */
 202        ushort qadc_ljsrr[64];
 203       /* result word table, unsigned left justified */
 204        ushort qadc_ljurr[64];
 205} qadc5xx_t;
 206
 207/* QSMCM
 208*/
 209typedef struct qsmcm {
 210        ushort qsmcm_qsmcr;
 211        ushort qsmcm_qtest;
 212        ushort qsmcm_qdsci_il;
 213        ushort qsmcm_qspi_il;
 214        ushort qsmcm_scc1r0;
 215        ushort qsmcm_scc1r1;
 216        ushort qsmcm_sc1sr;
 217        ushort qsmcm_sc1dr;
 218        char   res1[2];
 219        char   res2[2];
 220        ushort qsmcm_portqs;
 221        u_char qsmcm_pqspar;
 222        u_char qsmcm_ddrqs;
 223        ushort qsmcm_spcr0;
 224        ushort qsmcm_spcr1;
 225        ushort qsmcm_spcr2;
 226        u_char qsmcm_spcr3;
 227        u_char qsmcm_spsr;
 228        ushort qsmcm_scc2r0;
 229        ushort qsmcm_scc2r1;
 230        ushort qsmcm_sc2sr;
 231        ushort qsmcm_sc2dr;
 232        ushort qsmcm_qsci1cr;
 233        ushort qsmcm_qsci1sr;
 234        ushort qsmcm_sctq[16];
 235        ushort qsmcm_scrq[16];
 236        char   res3[212];
 237        ushort qsmcm_recram[32];
 238        ushort qsmcm_tranram[32];
 239        u_char qsmcm_comdram[32];
 240        char   res[3616];
 241} qsmcm5xx_t;
 242
 243
 244/* MIOS
 245*/
 246
 247typedef struct mios {
 248        ushort mios_mpwmsm0perr;                 /* mpwmsm0 */
 249        ushort mios_mpwmsm0pulr;
 250        ushort mios_mpwmsm0cntr;
 251        ushort mios_mpwmsm0scr;
 252        ushort mios_mpwmsm1perr;                 /* mpwmsm1 */
 253        ushort mios_mpwmsm1pulr;
 254        ushort mios_mpwmsm1cntr;
 255        ushort mios_mpwmsm1scr;
 256        ushort mios_mpwmsm2perr;                 /* mpwmsm2 */
 257        ushort mios_mpwmsm2pulr;
 258        ushort mios_mpwmsm2cntr;
 259        ushort mios_mpwmsm2scr;
 260        ushort mios_mpwmsm3perr;                 /* mpwmsm3 */
 261        ushort mios_mpwmsm3pulr;
 262        ushort mios_mpwmsm3cntr;
 263        ushort mios_mpwmsm3scr;
 264        char res1[16];
 265        ushort mios_mmcsm6cnt;                   /* mmcsm6 */
 266        ushort mios_mmcsm6mlr;
 267        ushort mios_mmcsm6scrd, mmcsm6scr;
 268        char res2[32];
 269        ushort mios_mdasm11ar;                   /* mdasm11 */
 270        ushort mios_mdasm11br;
 271        ushort mios_mdasm11scrd, mdasm11scr;
 272        ushort mios_mdasm12ar;                   /* mdasm12 */
 273        ushort mios_mdasm12br;
 274        ushort mios_mdasm12scrd, mdasm12scr;
 275        ushort mios_mdasm13ar;                   /* mdasm13 */
 276        ushort mios_mdasm13br;
 277        ushort mios_mdasm13scrd, mdasm13scr;
 278        ushort mios_mdasm14ar;                   /* mdasm14 */
 279        ushort mios_mdasm14br;
 280        ushort mios_mdasm14scrd, mdasm14scr;
 281        ushort mios_mdasm15ar;                   /* mdasm15 */
 282        ushort mios_mdasm15br;
 283        ushort mios_mdasm15scrd, mdasm15scr;
 284        ushort mios_mpwmsm16perr;                /* mpwmsm16 */
 285        ushort mios_mpwmsm16pulr;
 286        ushort mios_mpwmsm16cntr;
 287        ushort mios_mpwmsm16scr;
 288        ushort mios_mpwmsm17perr;                /* mpwmsm17 */
 289        ushort mios_mpwmsm17pulr;
 290        ushort mios_mpwmsm17cntr;
 291        ushort mios_mpwmsm17scr;
 292        ushort mios_mpwmsm18perr;                /* mpwmsm18 */
 293        ushort mios_mpwmsm18pulr;
 294        ushort mios_mpwmsm18cntr;
 295        ushort mios_mpwmsm18scr;
 296        ushort mios_mpwmsm19perr;                /* mpwmsm19 */
 297        ushort mios_mpwmsm19pulr;
 298        ushort mios_mpwmsm19cntr;
 299        ushort mios_mpwmsm19scr;
 300        char res3[16];
 301        ushort mios_mmcsm22cnt;                  /* mmcsm22 */
 302        ushort mios_mmcsm22mlr;
 303        ushort mios_mmcsm22scrd, mmcsm22scr;
 304        char res4[32];
 305        ushort mios_mdasm27ar;                   /* mdasm27 */
 306        ushort mios_mdasm27br;
 307        ushort mios_mdasm27scrd, mdasm27scr;
 308        ushort mios_mdasm28ar;                   /*mdasm28 */
 309        ushort mios_mdasm28br;
 310        ushort mios_mdasm28scrd, mdasm28scr;
 311        ushort mios_mdasm29ar;                   /* mdasm29 */
 312        ushort mios_mdasm29br;
 313        ushort mios_mdasm29scrd, mdasm29scr;
 314        ushort mios_mdasm30ar;                   /* mdasm30 */
 315        ushort mios_mdasm30br;
 316        ushort mios_mdasm30scrd, mdasm30scr;
 317        ushort mios_mdasm31ar;                   /* mdasm31 */
 318        ushort mios_mdasm31br;
 319        ushort mios_mdasm31scrd, mdasm31scr;
 320        ushort mios_mpiosm32dr;
 321        ushort mios_mpiosm32ddr;
 322        char res5[1788];
 323        ushort mios_mios1tpcr;
 324        char mios_res13[2];
 325        ushort mios_mios1vnr;
 326        ushort mios_mios1mcr;
 327        char res6[12];
 328        ushort mios_res42z;
 329        ushort mios_mcpsmscr;
 330        char res7[1000];
 331        ushort mios_mios1sr0;
 332        char res12[2];
 333        ushort mios_mios1er0;
 334        ushort mios_mios1rpr0;
 335        char res8[40];
 336        ushort mios_mios1lvl0;
 337        char res9[14];
 338        ushort mios_mios1sr1;
 339        char res10[2];
 340        ushort mios_mios1er1;
 341        ushort mios_mios1rpr1;
 342        char res11[40];
 343        ushort mios_mios1lvl1;
 344        char res13[1038];
 345} mios5xx_t;
 346
 347/* Toucan Module
 348*/
 349typedef struct tcan {
 350        ushort tcan_tcnmcr;
 351        ushort tcan_cantcr;
 352        ushort tcan_canicr;
 353        u_char tcan_canctrl0;
 354        u_char tcan_canctrl1;
 355        u_char tcan_presdiv;
 356        u_char tcan_canctrl2;
 357        ushort tcan_timer;
 358        char res1[4];
 359        ushort tcan_rxgmskhi;
 360        ushort tcan_rxgmsklo;
 361        ushort tcan_rx14mskhi;
 362        ushort tcan_rx14msklo;
 363        ushort tcan_rx15mskhi;
 364        ushort tcan_rx15msklo;
 365        char res2[4];
 366        ushort tcan_estat;
 367        ushort tcan_imask;
 368        ushort tcan_iflag;
 369        u_char tcan_rxectr;
 370        u_char tcan_txectr;
 371        char res3[88];
 372        struct {
 373               ushort scr;
 374               ushort id_high;
 375               ushort id_low;
 376               u_char data[8];
 377                   char res4[2];
 378            } tcan_mbuff[16];
 379            char res5[640];
 380} tcan5xx_t;
 381
 382/* UIMB
 383*/
 384typedef struct uimb {
 385        uint uimb_umcr;
 386        char res1[12];
 387        uint uimb_utstcreg;
 388        char res2[12];
 389        uint uimb_uipend;
 390} uimb5xx_t;
 391
 392
 393/* Internal Memory Map MPC555
 394*/
 395typedef struct immap {
 396        char               res1[262144];        /* CMF Flash A 256 Kbytes */
 397        char               res2[196608];        /* CMF Flash B 192 Kbytes */
 398        char               res3[2670592];       /* Reserved for Flash */
 399        sysconf5xx_t       im_siu_conf;         /* SIU Configuration */
 400        memctl5xx_t        im_memctl;           /* Memory Controller */
 401        sit5xx_t           im_sit;              /* System Integration Timers */
 402        car5xx_t           im_clkrst;           /* Clocks and Reset */
 403        sitk5xx_t          im_sitk;             /* System Integration Timer Keys*/
 404        cark8xx_t          im_clkrstk;          /* Clocks and Resert Keys */
 405        fl5xx_t            im_fla;              /* Flash Module A */
 406        fl5xx_t            im_flb;              /* Flash Module B */
 407        char               res4[14208];         /* Reserved for SIU */
 408        dprc5xx_t          im_dprc;             /* Dpram Control Register */
 409        char               res5[8180];          /* Reserved */
 410        char               dptram[6144];        /* Dptram */
 411        char               res6[2048];          /* Reserved */
 412        tpu5xx_t           im_tpua;             /* Time Proessing Unit A */
 413        tpu5xx_t           im_tpub;             /* Time Processing Unit B */
 414        qadc5xx_t          im_qadca;            /* QADC A */
 415        qadc5xx_t          im_qadcb;            /* QADC B */
 416        qsmcm5xx_t         im_qsmcm;            /* SCI and SPI */
 417        mios5xx_t          im_mios;             /* MIOS */
 418        tcan5xx_t          im_tcana;            /* Toucan A */
 419        tcan5xx_t          im_tcanb;            /* Toucan B */
 420        char               res7[1792];          /* Reserved */
 421        uimb5xx_t          im_uimb;             /* UIMB */
 422} immap_t;
 423
 424#endif /* __IMMAP_5XX__ */
 425