LXR uboot/board/freescale/p1022ds/spl.c

   1/*
   2 * Copyright 2013 Freescale Semiconductor, Inc.
   3 *
   4 * SPDX-License-Identifier:     GPL-2.0+
   5 */
   6
   7#include <common.h>
   8#include <ns16550.h>
   9#include <malloc.h>
  10#include <mmc.h>
  11#include <nand.h>
  12#include <i2c.h>
  13#include "../common/ngpixis.h"
  14#include <fsl_esdhc.h>
  15#include <spi_flash.h>
  16
  17DECLARE_GLOBAL_DATA_PTR;
  18
  19static const u32 sysclk_tbl[] = {
  20        66666000, 7499900, 83332500, 8999900,
  21        99999000, 11111000, 12499800, 13333200
  22};
  23
  24phys_size_t get_effective_memsize(void)
  25{
  26        return CONFIG_SYS_L2_SIZE;
  27}
  28
  29void board_init_f(ulong bootflag)
  30{
  31        int px_spd;
  32        u32 plat_ratio, sys_clk, bus_clk;
  33        ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
  34
  35        console_init_f();
  36
  37        /* Set pmuxcr to allow both i2c1 and i2c2 */
  38        setbits_be32(&gur->pmuxcr, in_be32(&gur->pmuxcr) | 0x1000);
  39        setbits_be32(&gur->pmuxcr,
  40                     in_be32(&gur->pmuxcr) | MPC85xx_PMUXCR_SD_DATA);
  41
  42#ifdef CONFIG_SPL_SPI_BOOT
  43        /* Enable the SPI */
  44        clrsetbits_8(&pixis->brdcfg0, PIXIS_ELBC_SPI_MASK, PIXIS_SPI);
  45#endif
  46
  47        /* Read back the register to synchronize the write. */
  48        in_be32(&gur->pmuxcr);
  49
  50        /* initialize selected port with appropriate baud rate */
  51        px_spd = in_8((unsigned char *)(PIXIS_BASE + PIXIS_SPD));
  52        sys_clk = sysclk_tbl[px_spd & PIXIS_SPD_SYSCLK_MASK];
  53        plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO;
  54        bus_clk = sys_clk * plat_ratio / 2;
  55
  56        NS16550_init((NS16550_t)CONFIG_SYS_NS16550_COM1,
  57                     bus_clk / 16 / CONFIG_BAUDRATE);
  58#ifdef CONFIG_SPL_MMC_BOOT
  59        puts("\nSD boot...\n");
  60#elif defined(CONFIG_SPL_SPI_BOOT)
  61        puts("\nSPI Flash boot...\n");
  62#endif
  63
  64        /* copy code to RAM and jump to it - this should not return */
  65        /* NOTE - code has to be copied out of NAND buffer before
  66         * other blocks can be read.
  67         */
  68        relocate_code(CONFIG_SPL_RELOC_STACK, 0, CONFIG_SPL_RELOC_TEXT_BASE);
  69}
  70
  71void board_init_r(gd_t *gd, ulong dest_addr)
  72{
  73        /* Pointer is writable since we allocated a register for it */
  74        gd = (gd_t *)CONFIG_SPL_GD_ADDR;
  75        bd_t *bd;
  76
  77        memset(gd, 0, sizeof(gd_t));
  78        bd = (bd_t *)(CONFIG_SPL_GD_ADDR + sizeof(gd_t));
  79        memset(bd, 0, sizeof(bd_t));
  80        gd->bd = bd;
  81        bd->bi_memstart = CONFIG_SYS_INIT_L2_ADDR;
  82        bd->bi_memsize = CONFIG_SYS_L2_SIZE;
  83
  84        probecpu();
  85        get_clocks();
  86        mem_malloc_init(CONFIG_SPL_RELOC_MALLOC_ADDR,
  87                        CONFIG_SPL_RELOC_MALLOC_SIZE);
  88#ifndef CONFIG_SPL_NAND_BOOT
  89        env_init();
  90#endif
  91#ifdef CONFIG_SPL_MMC_BOOT
  92        mmc_initialize(bd);
  93#endif
  94        /* relocate environment function pointers etc. */
  95#ifdef CONFIG_SPL_NAND_BOOT
  96        nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
  97                            (uchar *)CONFIG_ENV_ADDR);
  98
  99        gd->env_addr  = (ulong)(CONFIG_ENV_ADDR);
 100        gd->env_valid = 1;
 101#else
 102        env_relocate();
 103#endif
 104
 105#ifdef CONFIG_SYS_I2C
 106        i2c_init_all();
 107#else
 108        i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
 109#endif
 110
 111        gd->ram_size = initdram(0);
 112#ifdef CONFIG_SPL_NAND_BOOT
 113        puts("Tertiary program loader running in sram...");
 114#else
 115        puts("Second program loader running in sram...\n");
 116#endif
 117
 118#ifdef CONFIG_SPL_MMC_BOOT
 119        mmc_boot();
 120#elif defined(CONFIG_SPL_SPI_BOOT)
 121        spi_boot();
 122#elif defined(CONFIG_SPL_NAND_BOOT)
 123        nand_boot();
 124#endif
 125}
 126