1/* 2 * U-boot - Configuration file for BF561 Acvilon System On Module 3 * For more information please go to http://www.niistt.ru/ 4 */ 5 6#ifndef __CONFIG_BF561_ACVILON_H__ 7#define __CONFIG_BF561_ACVILON_H__ 8 9#include <asm/config-pre.h> 10 11 12/* 13 * Processor Settings 14 */ 15#define CONFIG_BFIN_CPU bf561-0.5 16#define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_BYPASS 17 18 19/* 20 * Clock Settings 21 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV 22 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV 23 */ 24/* CONFIG_CLKIN_HZ is any value in Hz */ 25#define CONFIG_CLKIN_HZ 12000000 26/* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ 27/* 1 = CLKIN / 2 */ 28#define CONFIG_CLKIN_HALF 0 29/* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ 30/* 1 = bypass PLL */ 31#define CONFIG_PLL_BYPASS 0 32/* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ 33/* Values can range from 0-63 (where 0 means 64) */ 34#define CONFIG_VCO_MULT 50 35/* CCLK_DIV controls the core clock divider */ 36/* Values can be 1, 2, 4, or 8 ONLY */ 37#define CONFIG_CCLK_DIV 1 38/* SCLK_DIV controls the system clock divider */ 39/* Values can range from 1-15 */ 40#define CONFIG_SCLK_DIV 5 41 42 43/* 44 * Memory Settings 45 */ 46#define CONFIG_MEM_ADD_WDTH 10 47#define CONFIG_MEM_SIZE 128 48 49#define CONFIG_EBIU_SDRRC_VAL 0x300 50#define CONFIG_EBIU_SDGCTL_VAL 0x00B11189 51 52#define CONFIG_EBIU_AMGCTL_VAL 0x4e 53#define CONFIG_EBIU_AMBCTL0_VAL 0xffc2ffc2 54#define CONFIG_EBIU_AMBCTL1_VAL 0x99b35554 55 56#define CONFIG_SYS_MONITOR_LEN (384 * 1024) 57#define CONFIG_SYS_MALLOC_LEN (128 * 1024) 58 59 60/* 61 * RTC Settings 62 */ 63#define CONFIG_RTC_DS1337 64#define CONFIG_SYS_I2C_RTC_ADDR 0x68 65 66/* I2C SYSMON (LM75, AD7414 is almost compatible) */ 67#define CONFIG_DTT_LM75 1 /* ON Semi's LM75 */ 68#define CONFIG_DTT_SENSORS {0} /* Sensor addresses */ 69#define CONFIG_SYS_I2C_DTT_ADDR 0x49 70/*#define CONFIG_SYS_DTT_MAX_TEMP 70 71#define CONFIG_SYS_DTT_LOW_TEMP -30 72#define CONFIG_SYS_DTT_HYSTERESIS 3*/ 73 74 75/* 76 * Network Settings 77 */ 78#define ADI_CMDS_NETWORK 1 79#define CONFIG_CMD_NET 80#define CONFIG_CMD_MII 81#define CONFIG_CMD_DATE 82#define CONFIG_CMD_DTT 83 84#if defined(CONFIG_CMD_NET) 85 86#define CONFIG_SMC911X 1 87#define CONFIG_SMC911X_32_BIT 88/* #define CONFIG_SMC911X_16_BIT */ 89#define CONFIG_SMC911X_BASE 0x28000000 90 91#endif /* (CONFIG_CMD_NET) */ 92 93#define CONFIG_HOSTNAME bf561-acvilon 94 95/* Uncomment next line to use fixed MAC address */ 96/* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ 97 98 99/* 100 * Flash Settings 101 */ 102#define CONFIG_SYS_NO_FLASH 103 104 105/* 106 * I2C Settings 107 */ 108#define CONFIG_HARD_I2C 109/* Use 300kHz speed by default */ 110#define CONFIG_SYS_I2C_SPEED 0x00 111#define CONFIG_PCA9564_I2C 112#define CONFIG_PCA9564_BASE 0x2c000000 113 114 115/* 116 * SPI Settings 117 */ 118#define CONFIG_BFIN_SPI 119#define CONFIG_ENV_SPI_MAX_HZ 10000000 120#define CONFIG_SF_DEFAULT_SPEED 10000000 121#define CONFIG_SPI_FLASH 122#define CONFIG_SPI_FLASH_ATMEL 123 124 125/* 126 * Env Storage Settings 127 */ 128#define CONFIG_ENV_IS_IN_SPI_FLASH 129/* #define CONFIG_CMD_SAVEENV */ 130#define CONFIG_ENV_SECT_SIZE (1056 * 8) 131#define CONFIG_ENV_OFFSET ((16 + 256) * 1056) 132#define CONFIG_ENV_SIZE (8 * 1056) 133 134 135/* 136 * NAND Settings 137 * We're using NAND_PLAT driver to make things simplier 138 */ 139#define CONFIG_NAND_PLAT 140#define CONFIG_CMD_NAND 141#define CONFIG_SYS_NAND_BASE 0x24000000 142#define CONFIG_SYS_MAX_NAND_DEVICE 1 143 144#define BFIN_NAND_CLE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 2)) 145#define BFIN_NAND_ALE(chip) ((unsigned long)(chip)->IO_ADDR_W | (1 << 3)) 146#define BFIN_NAND_WRITE(addr, cmd) \ 147 do { \ 148 bfin_write8(addr, cmd); \ 149 SSYNC(); \ 150 } while (0) 151 152#define NAND_PLAT_WRITE_CMD(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_CLE(chip), cmd) 153#define NAND_PLAT_WRITE_ADR(chip, cmd) BFIN_NAND_WRITE(BFIN_NAND_ALE(chip), cmd) 154#define NAND_PLAT_GPIO_DEV_READY GPIO_PF10 155 156 157/* 158 * Misc Settings 159 */ 160#define CONFIG_UART_CONSOLE 0 161#define CONFIG_BAUDRATE 57600 162#define CONFIG_SYS_PROMPT "Acvilon> " 163#define CONFIG_CC_OPTIMIZE_LIBS_FOR_SPEED 164 165/* 166 * Pull in common ADI header for remaining command/environment setup 167 */ 168#include <configs/bfin_adi_common.h> 169 170#endif /* __CONFIG_BF561_ACVILON_H__ */ 171