1/* 2 * DENX M53 configuration 3 * Copyright (C) 2012-2013 Marek Vasut <marex@denx.de> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 8#ifndef __M53EVK_CONFIG_H__ 9#define __M53EVK_CONFIG_H__ 10 11#define CONFIG_MX53 12#define CONFIG_MXC_GPIO 13 14#include <asm/arch/imx-regs.h> 15 16#define CONFIG_DISPLAY_CPUINFO 17#define CONFIG_BOARD_EARLY_INIT_F 18#define CONFIG_REVISION_TAG 19#define CONFIG_SYS_NO_FLASH 20 21/* 22 * U-Boot Commands 23 */ 24#include <config_cmd_default.h> 25#define CONFIG_DISPLAY_BOARDINFO 26#define CONFIG_DOS_PARTITION 27 28#define CONFIG_CMD_DATE 29#define CONFIG_CMD_DHCP 30#define CONFIG_CMD_EXT2 31#define CONFIG_CMD_FAT 32#define CONFIG_CMD_I2C 33#define CONFIG_CMD_MII 34#define CONFIG_CMD_MMC 35#define CONFIG_CMD_NAND 36#define CONFIG_CMD_NET 37#define CONFIG_CMD_PING 38#define CONFIG_CMD_SATA 39#define CONFIG_CMD_USB 40#define CONFIG_VIDEO 41 42#define CONFIG_REGEX /* Enable regular expression support */ 43 44/* 45 * Memory configurations 46 */ 47#define CONFIG_NR_DRAM_BANKS 2 48#define PHYS_SDRAM_1 CSD0_BASE_ADDR 49#define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) 50#define PHYS_SDRAM_2 CSD1_BASE_ADDR 51#define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) 52#define PHYS_SDRAM_SIZE (gd->ram_size) 53#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) 54#define CONFIG_SYS_MEMTEST_START 0x70000000 55#define CONFIG_SYS_MEMTEST_END 0x8ff00000 56 57#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 58#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 59#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 60 61#define CONFIG_SYS_INIT_SP_OFFSET \ 62 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 63#define CONFIG_SYS_INIT_SP_ADDR \ 64 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 65 66#define CONFIG_SYS_TEXT_BASE 0x71000000 67 68/* 69 * U-Boot general configurations 70 */ 71#define CONFIG_SYS_LONGHELP 72#define CONFIG_SYS_CBSIZE 1024 /* Console I/O buffer size */ 73#define CONFIG_SYS_PBSIZE \ 74 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 75 /* Print buffer size */ 76#define CONFIG_SYS_MAXARGS 32 /* Max number of command args */ 77#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 78 /* Boot argument buffer size */ 79#define CONFIG_VERSION_VARIABLE /* U-BOOT version */ 80#define CONFIG_AUTO_COMPLETE /* Command auto complete */ 81#define CONFIG_CMDLINE_EDITING /* Command history etc */ 82#define CONFIG_SYS_HUSH_PARSER 83 84/* 85 * Serial Driver 86 */ 87#define CONFIG_MXC_UART 88#define CONFIG_MXC_UART_BASE UART2_BASE 89#define CONFIG_CONS_INDEX 1 90#define CONFIG_BAUDRATE 115200 91 92/* 93 * MMC Driver 94 */ 95#ifdef CONFIG_CMD_MMC 96#define CONFIG_MMC 97#define CONFIG_GENERIC_MMC 98#define CONFIG_FSL_ESDHC 99#define CONFIG_SYS_FSL_ESDHC_ADDR 0 100#define CONFIG_SYS_FSL_ESDHC_NUM 1 101#endif 102 103/* 104 * NAND 105 */ 106#define CONFIG_ENV_SIZE (16 * 1024) 107#ifdef CONFIG_CMD_NAND 108#define CONFIG_SYS_MAX_NAND_DEVICE 1 109#define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR_AXI 110#define CONFIG_NAND_MXC 111#define CONFIG_MXC_NAND_REGS_BASE NFC_BASE_ADDR_AXI 112#define CONFIG_MXC_NAND_IP_REGS_BASE NFC_BASE_ADDR 113#define CONFIG_SYS_NAND_LARGEPAGE 114#define CONFIG_MXC_NAND_HWECC 115#define CONFIG_SYS_NAND_USE_FLASH_BBT 116 117/* Environment is in NAND */ 118#define CONFIG_ENV_IS_IN_NAND 119#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 120#define CONFIG_ENV_SECT_SIZE (128 * 1024) 121#define CONFIG_ENV_RANGE (512 * 1024) 122#define CONFIG_ENV_OFFSET 0x100000 123#define CONFIG_ENV_OFFSET_REDUND \ 124 (CONFIG_ENV_OFFSET + CONFIG_ENV_RANGE) 125 126#define CONFIG_CMD_UBI 127#define CONFIG_CMD_UBIFS 128#define CONFIG_CMD_MTDPARTS 129#define CONFIG_RBTREE 130#define CONFIG_LZO 131#define CONFIG_MTD_DEVICE 132#define CONFIG_MTD_PARTITIONS 133#define MTDIDS_DEFAULT "nand0=mxc_nand" 134#define MTDPARTS_DEFAULT \ 135 "mtdparts=mxc_nand:" \ 136 "1m(bootloader)ro," \ 137 "512k(environment)," \ 138 "512k(redundant-environment)," \ 139 "4m(kernel)," \ 140 "128k(fdt)," \ 141 "8m(ramdisk)," \ 142 "-(filesystem)" 143#else 144#define CONFIG_ENV_IS_NOWHERE 145#endif 146 147/* 148 * Ethernet on SOC (FEC) 149 */ 150#ifdef CONFIG_CMD_NET 151#define CONFIG_FEC_MXC 152#define IMX_FEC_BASE FEC_BASE_ADDR 153#define CONFIG_FEC_MXC_PHYADDR 0x0 154#define CONFIG_MII 155#define CONFIG_DISCOVER_PHY 156#define CONFIG_FEC_XCV_TYPE RMII 157#define CONFIG_PHYLIB 158#define CONFIG_PHY_MICREL 159#endif 160 161/* 162 * I2C 163 */ 164#ifdef CONFIG_CMD_I2C 165#define CONFIG_SYS_I2C 166#define CONFIG_SYS_I2C_MXC 167#define CONFIG_SYS_SPD_BUS_NUM 1 /* I2C2 */ 168#endif 169 170/* 171 * RTC 172 */ 173#ifdef CONFIG_CMD_DATE 174#define CONFIG_RTC_M41T62 175#define CONFIG_SYS_I2C_RTC_ADDR 0x68 176#define CONFIG_SYS_M41T11_BASE_YEAR 2000 177#endif 178 179/* 180 * USB 181 */ 182#ifdef CONFIG_CMD_USB 183#define CONFIG_USB_EHCI 184#define CONFIG_USB_EHCI_MX5 185#define CONFIG_USB_STORAGE 186#define CONFIG_USB_HOST_ETHER 187#define CONFIG_USB_ETHER_ASIX 188#define CONFIG_USB_ETHER_MCS7830 189#define CONFIG_USB_ETHER_SMSC95XX 190#define CONFIG_MXC_USB_PORT 1 191#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 192#define CONFIG_MXC_USB_FLAGS 0 193#endif 194 195/* 196 * SATA 197 */ 198#ifdef CONFIG_CMD_SATA 199#define CONFIG_DWC_AHSATA 200#define CONFIG_SYS_SATA_MAX_DEVICE 1 201#define CONFIG_DWC_AHSATA_PORT_ID 0 202#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR 203#define CONFIG_LBA48 204#define CONFIG_LIBATA 205#endif 206 207/* 208 * LCD 209 */ 210#ifdef CONFIG_VIDEO 211#define CONFIG_VIDEO_IPUV3 212#define CONFIG_CFB_CONSOLE 213#define CONFIG_VGA_AS_SINGLE_DEVICE 214#define CONFIG_SYS_CONSOLE_IS_IN_ENV 215#define CONFIG_VIDEO_BMP_RLE8 216#define CONFIG_SPLASH_SCREEN 217#define CONFIG_BMP_16BPP 218#define CONFIG_VIDEO_LOGO 219#define CONFIG_IPUV3_CLK 200000000 220#endif 221 222/* 223 * Boot Linux 224 */ 225#define CONFIG_CMDLINE_TAG 226#define CONFIG_INITRD_TAG 227#define CONFIG_REVISION_TAG 228#define CONFIG_SETUP_MEMORY_TAGS 229#define CONFIG_BOOTDELAY 3 230#define CONFIG_BOOTFILE "m53evk/uImage" 231#define CONFIG_BOOTARGS "console=ttymxc1,115200" 232#define CONFIG_LOADADDR 0x70800000 233#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 234#define CONFIG_OF_LIBFDT 235 236/* 237 * NAND SPL 238 */ 239#define CONFIG_SPL 240#define CONFIG_SPL_FRAMEWORK 241#define CONFIG_SPL_TARGET "u-boot-with-nand-spl.imx" 242#define CONFIG_SPL_BOARD_INIT 243#define CONFIG_SPL_TEXT_BASE 0x70008000 244#define CONFIG_SPL_PAD_TO 0x8000 245#define CONFIG_SPL_STACK 0x70004000 246#define CONFIG_SPL_GPIO_SUPPORT 247#define CONFIG_SPL_LIBCOMMON_SUPPORT 248#define CONFIG_SPL_LIBGENERIC_SUPPORT 249#define CONFIG_SPL_NAND_SUPPORT 250#define CONFIG_SPL_SERIAL_SUPPORT 251 252#define CONFIG_SYS_NAND_U_BOOT_OFFS CONFIG_SPL_PAD_TO 253#define CONFIG_SYS_NAND_PAGE_SIZE 2048 254#define CONFIG_SYS_NAND_OOBSIZE 64 255#define CONFIG_SYS_NAND_PAGE_COUNT 64 256#define CONFIG_SYS_NAND_SIZE (256 * 1024 * 1024) 257#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 258 259#endif /* __M53EVK_CONFIG_H__ */ 260