1/* 2 * Copyright (C) 2012 Renesas Solutions Corp. 3 * 4 * This program is free software; you can redistribute it and/or 5 * modify it under the terms of the GNU General Public License 6 * version 2 as published by the Free Software Foundation. 7 * 8 * This program is distributed in the hope that it will be useful, 9 * but WITHOUT ANY WARRANTY; without even the implied warranty of 10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11 * GNU General Public License for more details. 12 * 13 * You should have received a copy of the GNU General Public License 14 * along with this program; if not, write to the Free Software 15 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 16 * MA 02110-1301, USA. 17 */ 18 19#ifndef __ASM_ARCH_R8A7740_H 20#define __ASM_ARCH_R8A7740_H 21 22/* 23 * R8A7740 I/O Addresses 24 */ 25 26#define MERAM_BASE 0xE5580000 27#define DDRP_BASE 0xC12A0000 28#define HPB_BASE 0xE6000000 29#define RWDT0_BASE 0xE6020000 30#define RWDT1_BASE 0xE6030000 31#define GPIO_BASE 0xE6050000 32#define CMT1_BASE 0xE6138000 33#define CPG_BASE 0xE6150000 34#define SYSC_BASE 0xE6180000 35#define SDHI0_BASE 0xE6850000 36#define SDHI1_BASE 0xE6860000 37#define MMCIF_BASE 0xE6BD0000 38#define SCIF5_BASE 0xE6CB0000 39#define SCIF6_BASE 0xE6CC0000 40#define DBSC_BASE 0xFE400000 41#define BSC_BASE 0xFEC10000 42#define I2C0_BASE 0xFFF20000 43#define I2C1_BASE 0xE6C20000 44#define TMU_BASE 0xFFF80000 45 46#ifndef __ASSEMBLY__ 47#include <asm/types.h> 48 49/* RWDT */ 50struct r8a7740_rwdt { 51 u16 rwtcnt0; /* 0x00 */ 52 u16 dummy0; /* 0x02 */ 53 u16 rwtcsra0; /* 0x04 */ 54 u16 dummy1; /* 0x06 */ 55 u16 rwtcsrb0; /* 0x08 */ 56 u16 dummy2; /* 0x0A */ 57}; 58 59/* HPB Semaphore Control Registers */ 60struct r8a7740_hpb { 61 u32 hpbctrl0; 62 u32 hpbctrl1; 63 u32 hpbctrl2; 64 u32 cccr; 65 u32 dummy0; /* 0x20 */ 66 u32 hpbctrl4; 67 u32 hpbctrl5; 68}; 69 70/* CPG */ 71struct r8a7740_cpg { 72 u32 frqcra; 73 u32 frqcrb; 74 u32 vclkcr1; 75 u32 vclkcr2; 76 u32 fmsickcr; 77 u32 fmsockcr; 78 u32 fsiackcr; 79 u32 dummy0; /* 0x1c */ 80 u32 rtstbcr; 81 u32 systbcr; 82 u32 pllc01cr; 83 u32 pllc2cr; 84 u32 mstpsr0; 85 u32 dummy1; /* 0x34 */ 86 u32 mstpsr1; 87 u32 mstpsr5; 88 u32 mstpsr2; 89 u32 dummy2; /* 0x44 */ 90 u32 mstpsr3; 91 u32 mstpsr4; 92 u32 dummy3; /* 0x50 */ 93 u32 astat; 94 u32 dummy4[4]; /* 0x58 .. 0x64 */ 95 u32 ztrckcr; 96 u32 dummy5[5]; /* 0x6c .. 0x7c */ 97 u32 subckcr; 98 u32 spuckcr; 99 u32 vouckcr; 100 u32 usbckcr; 101 u32 dummy6[3]; /* 0x90 .. 0x98 */ 102 u32 stprckcr; 103 u32 srcr0; 104 u32 dummy7; /* 0xa4 */ 105 u32 srcr1; 106 u32 dummy8; /* 0xac */ 107 u32 srcr2; 108 u32 dummy9; /* 0xb4 */ 109 u32 srcr3; 110 u32 srcr4; 111 u32 dummy10; /* 0xc0 */ 112 u32 srcr5; 113 u32 pllc01stpcr; 114 u32 dummy11[5]; /* 0xcc .. 0xdc */ 115 u32 frqcrc; 116 u32 frqcrd; 117 u32 dummy12[10]; /* 0xe8 .. 0x10c */ 118 u32 rmstpcr0; 119 u32 rmstpcr1; 120 u32 rmstpcr2; 121 u32 rmstpcr3; 122 u32 rmstpcr4; 123 u32 rmstpcr5; 124 u32 dummy13[2]; /* 0x128 .. 0x12c */ 125 u32 smstpcr0; 126 u32 smstpcr1; 127 u32 smstpcr2; 128 u32 smstpcr3; 129 u32 smstpcr4; 130 u32 smstpcr5; 131}; 132 133/* BSC */ 134struct r8a7740_bsc { 135 u32 cmncr; 136 u32 cs0bcr; 137 u32 cs2bcr; 138 u32 dummy0; /* 0x0c */ 139 u32 cs4bcr; 140 u32 cs5abcr; 141 u32 cs5bbcr; 142 u32 cs6abcr; 143 u32 dummy1; /* 0x20 */ 144 u32 cs0wcr; 145 u32 cs2wcr; 146 u32 dummy2; /* 0x2c */ 147 u32 cs4wcr; 148 u32 cs5awcr; 149 u32 cs5bwcr; 150 u32 cs6awcr; 151 u32 dummy3[5]; /* 0x40 .. 0x50 */ 152 u32 rbwtcnt; 153 u32 busycr; 154 u32 dummy4[5]; /* 0x5c .. 0x6c */ 155 u32 bromtimcr; 156 u32 dummy5[7]; /* 0x74 .. 0x8c */ 157 u32 bptcr00; 158 u32 bptcr01; 159 u32 bptcr02; 160 u32 bptcr03; 161 u32 bptcr04; 162 u32 bptcr05; 163 u32 bptcr06; 164 u32 bptcr07; 165 u32 bptcr08; 166 u32 bptcr09; 167 u32 bptcr10; 168 u32 bptcr11; 169 u32 bptcr12; 170 u32 bptcr13; 171 u32 bptcr14; 172 u32 bptcr15; 173 u32 bptcr16; 174 u32 bptcr17; 175 u32 bptcr18; 176 u32 bptcr19; 177 u32 bptcr20; 178 u32 bptcr21; 179 u32 bptcr22; 180 u32 bptcr23; 181 u32 bptcr24; 182 u32 bptcr25; 183 u32 bptcr26; 184 u32 bptcr27; 185 u32 bptcr28; 186 u32 bptcr29; 187 u32 bptcr30; 188 u32 bptcr31; 189 u32 bswcr; 190 u32 dummy6[68]; /* 0x114 .. 0x220 */ 191 u32 cs0wcr2; 192 u32 cs2wcr2; 193 u32 dummy7; /* 0x22c */ 194 u32 cs4wcr2; 195}; 196 197#define CS0WCR2 0xFEC10224 198#define CS2WCR2 0xFEC10228 199#define CS4WCR2 0xFEC10230 200 201/* DDRP */ 202struct r8a7740_ddrp { 203 u32 funcctrl; 204 u32 dllctrl; 205 u32 zqcalctrl; 206 u32 zqodtctrl; 207 u32 rdctrl; 208 u32 rdtmg; 209 u32 fifoinit; 210 u32 outctrl; 211 u32 dummy0[50]; /* 0x20 .. 0xe4 */ 212 u32 dqcalofs1; 213 u32 dqcalofs2; 214 u32 dummy1[2]; /* 0xf0 .. 0xf4 */ 215 u32 dqcalexp; 216}; 217 218#define DDRPNCNT 0xE605803C 219#define DDRVREFCNT 0xE61500EC 220 221/* DBSC */ 222struct r8a7740_dbsc { 223 u32 dummy0; 224 u32 dbsvcr; 225 u32 dbstate0; 226 u32 dbstate1; 227 u32 dbacen; 228 u32 dbrfen; 229 u32 dbcmd; 230 u32 dbwait; 231 u32 dbkind; 232 u32 dbconf0; 233 u32 dummy1[2]; /* 0x28 .. 0x2c */ 234 u32 dbphytype; 235 u32 dummy2[3]; /* 0x34 .. 0x3c */ 236 u32 dbtr0; 237 u32 dbtr1; 238 u32 dbtr2; 239 u32 dummy3; /* 0x4c */ 240 u32 dbtr3; 241 u32 dbtr4; 242 u32 dbtr5; 243 u32 dbtr6; 244 u32 dbtr7; 245 u32 dbtr8; 246 u32 dbtr9; 247 u32 dbtr10; 248 u32 dbtr11; 249 u32 dbtr12; 250 u32 dbtr13; 251 u32 dbtr14; 252 u32 dbtr15; 253 u32 dbtr16; 254 u32 dbtr17; 255 u32 dbtr18; 256 u32 dbtr19; 257 u32 dummy4[7]; /* 0x94 .. 0xac */ 258 u32 dbbl; 259 u32 dummy5[3]; /* 0xb4 .. 0xbc */ 260 u32 dbadj0; 261 u32 dbadj1; 262 u32 dbadj2; 263 u32 dummy6[5]; /* 0xcc .. 0xdc */ 264 u32 dbrfcnf0; 265 u32 dbrfcnf1; 266 u32 dbrfcnf2; 267 u32 dbrfcnf3; 268 u32 dummy7; /* 0xf0 */ 269 u32 dbcalcnf; 270 u32 dbcaltr; 271 u32 dummy8; /* 0xfc */; 272 u32 dbrnk0; 273 u32 dummy9[31]; /* 0x104 .. 0x17C */ 274 u32 dbpdncnf; 275 u32 dummy10[7]; /* 0x184 .. 0x19C */ 276 u32 dbmrrdr; 277 u32 dummy11[39]; /* 0x1A4 .. 0x23C */ 278 u32 dbdfistat; 279 u32 dbdficnt; 280 u32 dummy12[46]; /* 0x248 .. 0x2FC */ 281 u32 dbbs0cnt0; 282 u32 dbbs0cnt1; 283}; 284 285#endif 286 287#endif /* __ASM_ARCH_R8A7740_H */ 288