1/* 2 * Configuration settings for the Sentec Cobra Board. 3 * 4 * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de> 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9/* 10 * configuration for ASTRO "Urmel" board. 11 * Originating from Cobra5272 configuration, messed up by 12 * Wolfgang Wegner <w.wegner@astro-kom.de> 13 * Please do not bother the original author with bug reports 14 * concerning this file. 15 */ 16 17#ifndef _CONFIG_ASTRO_MCF5373L_H 18#define _CONFIG_ASTRO_MCF5373L_H 19 20#include <linux/stringify.h> 21 22/* 23 * set the card type to actually compile for; either of 24 * the possibilities listed below has to be used! 25 */ 26#define CONFIG_ASTRO_V532 1 27 28#if CONFIG_ASTRO_V532 29#define ASTRO_ID 0xF8 30#elif CONFIG_ASTRO_V512 31#define ASTRO_ID 0xFA 32#elif CONFIG_ASTRO_TWIN7S2 33#define ASTRO_ID 0xF9 34#elif CONFIG_ASTRO_V912 35#define ASTRO_ID 0xFC 36#elif CONFIG_ASTRO_COFDMDUOS2 37#define ASTRO_ID 0xFB 38#else 39#error No card type defined! 40#endif 41 42/* 43 * Define processor 44 * possible values for Urmel board: only Coldfire M5373 processor supported 45 * (please do not change) 46 */ 47 48/* it seems not clear yet which processor defines we should use */ 49#define CONFIG_MCF537x /* define processor family */ 50#define CONFIG_MCF532x /* define processor family */ 51#define CONFIG_M5373 /* define processor type */ 52#define CONFIG_ASTRO5373L /* define board type */ 53 54/* Command line configuration */ 55#include <config_cmd_default.h> 56 57/* 58 * CONFIG_RAM defines if u-boot is loaded via BDM (or started from 59 * a different bootloader that has already performed RAM setup) or 60 * started directly from flash, which is the regular case for production 61 * boards. 62 */ 63#ifdef CONFIG_RAM 64#define CONFIG_MONITOR_IS_IN_RAM 65#define CONFIG_SYS_TEXT_BASE 0x40020000 66#define ENABLE_JFFS 0 67#else 68#define CONFIG_SYS_TEXT_BASE 0x00000000 69#define ENABLE_JFFS 1 70#endif 71 72/* Define which commmands should be available at u-boot command prompt */ 73 74#define CONFIG_CMD_CACHE 75#define CONFIG_CMD_DATE 76#define CONFIG_CMD_ELF 77#define CONFIG_CMD_FLASH 78#define CONFIG_CMD_I2C 79#define CONFIG_CMD_MEMORY 80#define CONFIG_CMD_MISC 81#define CONFIG_CMD_XIMG 82#undef CONFIG_CMD_NET 83#undef CONFIG_CMD_NFS 84#if ENABLE_JFFS 85#define CONFIG_CMD_JFFS2 86#endif 87#define CONFIG_CMD_REGINFO 88#define CONFIG_CMD_LOADS 89#define CONFIG_CMD_LOADB 90#define CONFIG_CMD_FPGA 91#define CONFIG_CMD_FPGA_LOADMK 92#define CONFIG_CMDLINE_EDITING 93 94#define CONFIG_SYS_HUSH_PARSER 95 96#define CONFIG_MCFRTC 97#undef RTC_DEBUG 98 99/* Timer */ 100#define CONFIG_MCFTMR 101#undef CONFIG_MCFPIT 102 103/* I2C */ 104#define CONFIG_SYS_I2C 105#define CONFIG_SYS_I2C_FSL 106#define CONFIG_SYS_FSL_I2C_SPEED 80000 107#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F 108#define CONFIG_SYS_FSL_I2C_OFFSET 0x58000 109#define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 110 111/* 112 * Defines processor clock - important for correct timings concerning serial 113 * interface etc. 114 */ 115 116#define CONFIG_SYS_CLK 80000000 117#define CONFIG_SYS_CPU_CLK (CONFIG_SYS_CLK * 3) 118#define CONFIG_SYS_SDRAM_SIZE 32 /* SDRAM size in MB */ 119 120#define CONFIG_SYS_CORE_SRAM_SIZE 0x8000 121#define CONFIG_SYS_CORE_SRAM 0x80000000 122 123#define CONFIG_SYS_UNIFY_CACHE 124 125/* 126 * Define baudrate for UART1 (console output, tftp, ...) 127 * default value of CONFIG_BAUDRATE for Sentec board: 19200 baud 128 * CONFIG_SYS_BAUDRATE_TABLE defines values that can be selected 129 * in u-boot command interface 130 */ 131 132#define CONFIG_BAUDRATE 115200 133 134#define CONFIG_MCFUART 135#define CONFIG_SYS_UART_PORT (2) 136#define CONFIG_SYS_UART2_ALT3_GPIO 137 138/* 139 * Watchdog configuration; Watchdog is disabled for running from RAM 140 * and set to highest possible value else. Beware there is no check 141 * in the watchdog code to validate the timeout value set here! 142 */ 143 144#ifndef CONFIG_MONITOR_IS_IN_RAM 145#define CONFIG_WATCHDOG 146#define CONFIG_WATCHDOG_TIMEOUT 3355 /* timeout in milliseconds */ 147#endif 148 149/* 150 * Configuration for environment 151 * Environment is located in the last sector of the flash 152 */ 153 154#ifndef CONFIG_MONITOR_IS_IN_RAM 155#define CONFIG_ENV_OFFSET 0x1FF8000 156#define CONFIG_ENV_SECT_SIZE 0x8000 157#define CONFIG_ENV_IS_IN_FLASH 1 158#else 159/* 160 * environment in RAM - This is used to use a single PC-based application 161 * to load an image, load U-Boot, load an environment and then start U-Boot 162 * to execute the commands from the environment. Feedback is done via setting 163 * and reading memory locations. 164 */ 165#define CONFIG_ENV_ADDR 0x40060000 166#define CONFIG_ENV_SECT_SIZE 0x8000 167#define CONFIG_ENV_IS_IN_FLASH 1 168#endif 169 170/* here we put our FPGA configuration... */ 171#define CONFIG_MISC_INIT_R 1 172 173/* Define user parameters that have to be customized most likely */ 174 175/* AUTOBOOT settings - booting images automatically by u-boot after power on */ 176 177/* 178 * used for autoboot, delay in seconds u-boot will wait before starting 179 * defined (auto-)boot command, setting to -1 disables delay, setting to 180 * 0 will too prevent access to u-boot command interface: u-boot then has 181 * to be reflashed 182 * beware - watchdog is not serviced during autoboot delay time! 183 */ 184#ifdef CONFIG_MONITOR_IS_IN_RAM 185#define CONFIG_BOOTDELAY 1 186#else 187#define CONFIG_BOOTDELAY 1 188#endif 189 190/* 191 * The following settings will be contained in the environment block ; if you 192 * want to use a neutral environment all those settings can be manually set in 193 * u-boot: 'set' command 194 */ 195 196#define CONFIG_EXTRA_ENV_SETTINGS \ 197 "loaderversion=11\0" \ 198 "card_id="__stringify(ASTRO_ID)"\0" \ 199 "alterafile=0\0" \ 200 "xilinxfile=0\0" \ 201 "xilinxload=imxtract 0x540000 $xilinxfile 0x41000000&&"\ 202 "fpga load 0 0x41000000 $filesize\0" \ 203 "alteraload=imxtract 0x6c0000 $alterafile 0x41000000&&"\ 204 "fpga load 1 0x41000000 $filesize\0" \ 205 "env_default=1\0" \ 206 "env_check=if test $env_default -eq 1;"\ 207 " then setenv env_default 0;saveenv;fi\0" 208 209/* 210 * "update" is a non-standard command that has to be supplied 211 * by external update.c; This is not included in mainline because 212 * it needs non-blocking CFI routines. 213 */ 214#ifdef CONFIG_MONITOR_IS_IN_RAM 215#define CONFIG_BOOTCOMMAND "" /* no autoboot in this case */ 216#else 217#if CONFIG_ASTRO_V532 218#define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 219 "run xilinxload&&run alteraload&&bootm 0x80000;"\ 220 "update;reset" 221#else 222#define CONFIG_BOOTCOMMAND "protect off 0x80000 0x1ffffff;run env_check;"\ 223 "run xilinxload&&bootm 0x80000;update;reset" 224#endif 225#endif 226 227/* default bootargs that are considered during boot */ 228#define CONFIG_BOOTARGS " console=ttyS2,115200 rootfstype=romfs"\ 229 " loaderversion=$loaderversion" 230 231#define CONFIG_SYS_PROMPT "URMEL > " 232 233/* default RAM address for user programs */ 234#define CONFIG_SYS_LOAD_ADDR 0x20000 235 236#define CONFIG_SYS_LONGHELP 237 238#if (CONFIG_COMMANDS & CONFIG_CMD_KGDB) 239#define CONFIG_SYS_CBSIZE 1024 240#else 241#define CONFIG_SYS_CBSIZE 256 242#endif 243#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 244#define CONFIG_SYS_MAXARGS 16 245#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 246 247#define CONFIG_FPGA_COUNT 1 248#define CONFIG_FPGA 249#define CONFIG_FPGA_XILINX 250#define CONFIG_FPGA_SPARTAN3 251#define CONFIG_FPGA_ALTERA 252#define CONFIG_FPGA_CYCLON2 253#define CONFIG_SYS_FPGA_PROG_FEEDBACK 254#define CONFIG_SYS_FPGA_WAIT 1000 255 256/* End of user parameters to be customized */ 257 258/* Defines memory range for test */ 259 260#define CONFIG_SYS_MEMTEST_START 0x40020000 261#define CONFIG_SYS_MEMTEST_END 0x41ffffff 262 263/* 264 * Low Level Configuration Settings 265 * (address mappings, register initial values, etc.) 266 * You should know what you are doing if you make changes here. 267 */ 268 269/* Base register address */ 270 271#define CONFIG_SYS_MBAR 0xFC000000 /* Register Base Addrs */ 272 273/* System Conf. Reg. & System Protection Reg. */ 274 275#define CONFIG_SYS_SCR 0x0003; 276#define CONFIG_SYS_SPR 0xffff; 277 278/* 279 * Definitions for initial stack pointer and data area (in internal SRAM) 280 */ 281#define CONFIG_SYS_INIT_RAM_ADDR 0x80000000 282#define CONFIG_SYS_INIT_RAM_SIZE 0x8000 283#define CONFIG_SYS_INIT_RAM_CTRL 0x221 284#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 285 GENERATED_GBL_DATA_SIZE) 286#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 287 288/* 289 * Start addresses for the final memory configuration 290 * (Set up by the startup code) 291 * for MCF5373, the allowable range is 0x40000000 to 0x7FF00000 292 */ 293#define CONFIG_SYS_SDRAM_BASE 0x40000000 294 295/* 296 * Chipselect bank definitions 297 * 298 * CS0 - Flash 32MB (first 16MB) 299 * CS1 - Flash 32MB (second half) 300 * CS2 - FPGA 301 * CS3 - FPGA 302 * CS4 - unused 303 * CS5 - unused 304 */ 305#define CONFIG_SYS_CS0_BASE 0 306#define CONFIG_SYS_CS0_MASK 0x00ff0001 307#define CONFIG_SYS_CS0_CTRL 0x00001fc0 308 309#define CONFIG_SYS_CS1_BASE 0x01000000 310#define CONFIG_SYS_CS1_MASK 0x00ff0001 311#define CONFIG_SYS_CS1_CTRL 0x00001fc0 312 313#define CONFIG_SYS_CS2_BASE 0x20000000 314#define CONFIG_SYS_CS2_MASK 0x00ff0001 315#define CONFIG_SYS_CS2_CTRL 0x0000fec0 316 317#define CONFIG_SYS_CS3_BASE 0x21000000 318#define CONFIG_SYS_CS3_MASK 0x00ff0001 319#define CONFIG_SYS_CS3_CTRL 0x0000fec0 320 321#define CONFIG_SYS_FLASH_BASE 0x00000000 322 323#ifdef CONFIG_MONITOR_IS_IN_RAM 324#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE 325#else 326/* This is mainly used during relocation in start.S */ 327#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE + 0x400) 328#endif 329/* Reserve 256 kB for Monitor */ 330#define CONFIG_SYS_MONITOR_LEN (256 << 10) 331 332#define CONFIG_SYS_BOOTPARAMS_LEN (64 * 1024) 333/* Reserve 128 kB for malloc() */ 334#define CONFIG_SYS_MALLOC_LEN (128 << 10) 335 336/* 337 * For booting Linux, the board info and command line data 338 * have to be in the first 8 MB of memory, since this is 339 * the maximum mapped by the Linux kernel during initialization ?? 340 */ 341#define CONFIG_SYS_BOOTMAPSZ (CONFIG_SYS_SDRAM_BASE + \ 342 (CONFIG_SYS_SDRAM_SIZE << 20)) 343 344/* FLASH organization */ 345#define CONFIG_SYS_MAX_FLASH_BANKS 1 346#define CONFIG_SYS_MAX_FLASH_SECT 259 347#define CONFIG_SYS_FLASH_ERASE_TOUT 1000 348 349#define CONFIG_SYS_FLASH_CFI 1 350#define CONFIG_FLASH_CFI_DRIVER 1 351#define CONFIG_SYS_FLASH_SIZE 0x2000000 352#define CONFIG_SYS_FLASH_PROTECTION 1 353#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1 354#define CONFIG_SYS_FLASH_CFI_NONBLOCK 1 355 356#if ENABLE_JFFS 357/* JFFS Partition offset set */ 358#define CONFIG_SYS_JFFS2_FIRST_BANK 0 359#define CONFIG_SYS_JFFS2_NUM_BANKS 1 360/* 512k reserved for u-boot */ 361#define CONFIG_SYS_JFFS2_FIRST_SECTOR 0x40 362#endif 363 364/* Cache Configuration */ 365#define CONFIG_SYS_CACHELINE_SIZE 16 366 367#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 368 CONFIG_SYS_INIT_RAM_SIZE - 8) 369#define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 370 CONFIG_SYS_INIT_RAM_SIZE - 4) 371#define CONFIG_SYS_ICACHE_INV (CF_CACR_CINVA) 372#define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 373 CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 374 CF_ACR_EN | CF_ACR_SM_ALL) 375#define CONFIG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \ 376 CF_CACR_DCM_P) 377 378#endif /* _CONFIG_ASTRO_MCF5373L_H */ 379