LXR uboot/include/configs/dig297.h

   1/*
   2 * (C) Copyright 2011 Comelit Group SpA
   3 * Luca Ceresoli <luca.ceresoli@comelit.it>
   4 *
   5 * Based on omap3_beagle.h:
   6 * (C) Copyright 2006-2008
   7 * Texas Instruments.
   8 * Richard Woodruff <r-woodruff2@ti.com>
   9 * Syed Mohammed Khasim <x0khasim@ti.com>
  10 *
  11 * Configuration settings for the Comelit DIG297 board.
  12 *
  13 * SPDX-License-Identifier:     GPL-2.0+
  14 */
  15
  16#ifndef __CONFIG_H
  17#define __CONFIG_H
  18
  19#include <asm/mach-types.h>
  20#ifdef MACH_TYPE_OMAP3_CPS
  21#error "MACH_TYPE_OMAP3_CPS has been defined properly, please remove this."
  22#else
  23#define MACH_TYPE_OMAP3_CPS 2751
  24#endif
  25#define CONFIG_MACH_TYPE MACH_TYPE_OMAP3_CPS
  26
  27/*
  28 * High Level Configuration Options
  29 */
  30#define CONFIG_OMAP             /* in a TI OMAP core */
  31#define CONFIG_OMAP34XX         /* which is a 34XX */
  32#define CONFIG_OMAP_GPIO
  33#define CONFIG_OMAP_COMMON
  34
  35#define CONFIG_SYS_TEXT_BASE    0x80008000
  36
  37#define CONFIG_SDRC     /* The chip has SDRC controller */
  38
  39#include <asm/arch/cpu.h>               /* get chip and board defs */
  40#include <asm/arch/omap3.h>
  41
  42/*
  43 * Display CPU and Board information
  44 */
  45#define CONFIG_DISPLAY_CPUINFO
  46#define CONFIG_DISPLAY_BOARDINFO
  47
  48/* Clock Defines */
  49#define V_OSCK                  26000000        /* Clock output from T2 */
  50#define V_SCLK                  (V_OSCK >> 1)
  51
  52#define CONFIG_MISC_INIT_R
  53
  54#define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs */
  55#define CONFIG_SETUP_MEMORY_TAGS
  56#define CONFIG_INITRD_TAG
  57#define CONFIG_REVISION_TAG
  58
  59/*
  60 * Size of malloc() pool
  61 */
  62#define CONFIG_ENV_SIZE                 (128 << 10)     /* 128 KiB */
  63                                                /* Sector */
  64#define CONFIG_SYS_MALLOC_LEN           (1024 << 10) /* UBI needs >= 512 kB */
  65
  66/*
  67 * Hardware drivers
  68 */
  69
  70/*
  71 * NS16550 Configuration
  72 */
  73#define V_NS16550_CLK                   48000000        /* 48MHz (APLL96/2) */
  74
  75#define CONFIG_SYS_NS16550
  76#define CONFIG_SYS_NS16550_SERIAL
  77#define CONFIG_SYS_NS16550_REG_SIZE     (-4)
  78#define CONFIG_SYS_NS16550_CLK          V_NS16550_CLK
  79
  80/*
  81 * select serial console configuration: UART3 (ttyO2)
  82 */
  83#define CONFIG_CONS_INDEX               3
  84#define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
  85#define CONFIG_SERIAL3                  3
  86
  87/* allow to overwrite serial and ethaddr */
  88#define CONFIG_ENV_OVERWRITE
  89#define CONFIG_BAUDRATE                 115200
  90#define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
  91                                        115200}
  92#define CONFIG_GENERIC_MMC              1
  93#define CONFIG_MMC                      1
  94#define CONFIG_OMAP_HSMMC               1
  95#define CONFIG_DOS_PARTITION
  96
  97/* library portions to compile in */
  98#define CONFIG_RBTREE
  99#define CONFIG_MTD_PARTITIONS
 100#define CONFIG_LZO
 101
 102/* commands to include */
 103#include <config_cmd_default.h>
 104
 105#define CONFIG_CMD_FAT          /* FAT support                  */
 106#define CONFIG_CMD_UBI          /* UBI Support                  */
 107#define CONFIG_CMD_UBIFS        /* UBIFS Support                */
 108#define CONFIG_CMD_MTDPARTS     /* Enable MTD parts commands    */
 109#define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
 110#define MTDIDS_DEFAULT          "nand0=omap2-nand.0"
 111#define MTDPARTS_DEFAULT        "mtdparts=omap2-nand.0:896k(uboot),"\
 112                                "128k(uboot-env),3m(kernel),252m(ubi)"
 113
 114#define CONFIG_CMD_I2C          /* I2C serial bus support       */
 115#define CONFIG_CMD_MMC          /* MMC support                  */
 116#define CONFIG_CMD_NAND         /* NAND support                 */
 117
 118#undef CONFIG_CMD_FLASH         /* flinfo, erase, protect       */
 119#undef CONFIG_CMD_FPGA          /* FPGA configuration Support   */
 120#undef CONFIG_CMD_IMI           /* iminfo                       */
 121#undef CONFIG_CMD_IMLS          /* List all found images        */
 122#define CONFIG_CMD_NET          /* bootp, tftpboot, rarpboot    */
 123#undef CONFIG_CMD_NFS           /* NFS support                  */
 124
 125#define CONFIG_SYS_NO_FLASH
 126#define CONFIG_SYS_I2C
 127#define CONFIG_SYS_OMAP24_I2C_SPEED     100000
 128#define CONFIG_SYS_OMAP24_I2C_SLAVE     1
 129#define CONFIG_SYS_I2C_OMAP34XX
 130
 131/*
 132 * TWL4030
 133 */
 134#define CONFIG_TWL4030_POWER
 135#define CONFIG_TWL4030_LED
 136
 137/*
 138 * Board NAND Info.
 139 */
 140#define CONFIG_NAND_OMAP_GPMC
 141#define CONFIG_SYS_NAND_BUSWIDTH_16BIT  16
 142#define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
 143                                                        /* to access nand */
 144#define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
 145                                                        /* to access nand at */
 146                                                        /* CS0 */
 147#define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
 148
 149#if defined(CONFIG_CMD_NET)
 150/*
 151 * SMSC9220 Ethernet
 152 */
 153
 154#define CONFIG_SMC911X
 155#define CONFIG_SMC911X_32_BIT
 156#define CONFIG_SMC911X_BASE     0x2C000000
 157
 158#endif /* (CONFIG_CMD_NET) */
 159
 160/* Environment information */
 161#define CONFIG_BOOTDELAY                1
 162
 163#define CONFIG_EXTRA_ENV_SETTINGS \
 164        "loadaddr=0x82000000\0" \
 165        "console=ttyO2,115200n8\0" \
 166        "mtdids=" MTDIDS_DEFAULT "\0" \
 167        "mtdparts=" MTDPARTS_DEFAULT "\0" \
 168        "partition=nand0,3\0"\
 169        "mmcroot=/dev/mmcblk0p2 rw\0" \
 170        "mmcrootfstype=ext3 rootwait\0" \
 171        "nandroot=ubi0:rootfs ro\0" \
 172        "nandrootfstype=ubifs\0" \
 173        "nfspath=/srv/nfs\0" \
 174        "tftpfilename=uImage\0" \
 175        "gatewayip=0.0.0.0\0" \
 176        "mmcargs=setenv bootargs console=${console} " \
 177                "${mtdparts} " \
 178                "root=${mmcroot} " \
 179                "rootfstype=${mmcrootfstype} " \
 180                "ip=${ipaddr}:${serverip}:${gatewayip}:" \
 181                        "${netmask}:${hostname}::off\0" \
 182        "nandargs=setenv bootargs console=${console} " \
 183                "${mtdparts} " \
 184                "ubi.mtd=3 " \
 185                "root=${nandroot} " \
 186                "rootfstype=${nandrootfstype} " \
 187                "ip=${ipaddr}:${serverip}:${gatewayip}:" \
 188                        "${netmask}:${hostname}::off\0" \
 189        "netargs=setenv bootargs console=${console} " \
 190                "${mtdparts} " \
 191                "root=/dev/nfs rw " \
 192                "nfsroot=${serverip}:${nfspath} " \
 193                "ip=${ipaddr}:${serverip}:${gatewayip}:" \
 194                        "${netmask}:${hostname}::off\0" \
 195        "mmcboot=echo Booting from mmc ...; " \
 196                "run mmcargs; " \
 197                "bootm ${loadaddr}\0" \
 198        "nandboot=echo Booting from nand ...; " \
 199                "run nandargs; " \
 200                "nand read ${loadaddr} 100000 300000; " \
 201                "bootm ${loadaddr}\0" \
 202        "netboot=echo Booting from network ...; " \
 203                "run netargs; " \
 204                "tftp ${loadaddr} ${serverip}:${tftpfilename}; " \
 205                "bootm ${loadaddr}\0" \
 206        "resetenv=nand erase e0000 20000\0"\
 207
 208#define CONFIG_BOOTCOMMAND \
 209        "run nandboot"
 210
 211#define CONFIG_AUTO_COMPLETE
 212/*
 213 * Miscellaneous configurable options
 214 */
 215#define CONFIG_SYS_LONGHELP             /* undef to save memory */
 216#define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
 217#define CONFIG_SYS_PROMPT               "DIG297# "
 218#define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
 219/* Print Buffer Size */
 220#define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 221                                        sizeof(CONFIG_SYS_PROMPT) + 16)
 222#define CONFIG_SYS_MAXARGS              16      /* max number of command args */
 223/* Boot Argument Buffer Size */
 224#define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
 225
 226#define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0)     /* memtest */
 227                                                                /* works on */
 228#define CONFIG_SYS_MEMTEST_END          (OMAP34XX_SDRC_CS0 + \
 229                                        0x01F00000) /* 31MB */
 230
 231#define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0)     /* default */
 232                                                        /* load address */
 233
 234/*
 235 * OMAP3 has 12 GP timers, they can be driven by the system clock
 236 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
 237 * This rate is divided by a local divisor.
 238 */
 239#define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
 240#define CONFIG_SYS_PTV                  2       /* Divisor: 2^(PTV+1) => 8 */
 241
 242/*-----------------------------------------------------------------------
 243 * Physical Memory Map
 244 */
 245#define CONFIG_NR_DRAM_BANKS    2       /* CS1 may or may not be populated */
 246#define PHYS_SDRAM_1            OMAP34XX_SDRC_CS0
 247#define PHYS_SDRAM_2            OMAP34XX_SDRC_CS1
 248
 249/*-----------------------------------------------------------------------
 250 * FLASH and environment organization
 251 */
 252
 253/* **** PISMO SUPPORT *** */
 254
 255/* Configure the PISMO */
 256#define PISMO1_NAND_SIZE                GPMC_SIZE_128M
 257
 258#define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
 259
 260#define CONFIG_SYS_FLASH_BASE           boot_flash_base
 261
 262/* Monitor at start of flash */
 263#define CONFIG_SYS_MONITOR_BASE         CONFIG_SYS_FLASH_BASE
 264
 265#define CONFIG_ENV_IS_IN_NAND
 266#define SMNAND_ENV_OFFSET               0x0E0000 /* environment starts here */
 267
 268#define CONFIG_SYS_ENV_SECT_SIZE        (128 << 10)     /* 128 KiB */
 269#define CONFIG_ENV_OFFSET               SMNAND_ENV_OFFSET
 270#define CONFIG_ENV_ADDR                 SMNAND_ENV_OFFSET
 271
 272#define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 273#define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
 274#define CONFIG_SYS_INIT_RAM_SIZE        0x800
 275#define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_INIT_RAM_ADDR + \
 276                                         CONFIG_SYS_INIT_RAM_SIZE - \
 277                                         GENERATED_GBL_DATA_SIZE)
 278
 279#endif /* __CONFIG_H */
 280