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18#ifndef __CONFIG_H
19#define __CONFIG_H
20
21
22
23
24#define CONFIG_440EPX 1
25#define CONFIG_SYS_CLK_FREQ 33333333
26
27#ifdef CONFIG_KORAT_PERMANENT
28#define CONFIG_SYS_TEXT_BASE 0xFFFA0000
29#else
30#define CONFIG_SYS_TEXT_BASE 0xF7F60000
31#endif
32
33#define CONFIG_BOARD_EARLY_INIT_F 1
34#define CONFIG_MISC_INIT_R 1
35
36
37
38
39#define MAN_DATA_EEPROM_ADDR 0x53
40#define MAN_INFO_FIELD 2
41#define MAN_INFO_LENGTH 9
42#define MAN_MAC_ADDR_FIELD 3
43#define MAN_MAC_ADDR_LENGTH 12
44
45
46
47
48
49#define CONFIG_SYS_MONITOR_LEN (384 * 1024)
50#define CONFIG_SYS_MALLOC_LEN (256 * 1024)
51
52#define CONFIG_SYS_SDRAM_BASE 0x00000000
53#define CONFIG_SYS_FLASH0_SIZE 0x01000000
54#define CONFIG_SYS_FLASH0_ADDR (-CONFIG_SYS_FLASH0_SIZE)
55#define CONFIG_SYS_FLASH1_TOP 0xF8000000
56#define CONFIG_SYS_FLASH1_MAX_SIZE 0x08000000
57#define CONFIG_SYS_FLASH1_ADDR (CONFIG_SYS_FLASH1_TOP - CONFIG_SYS_FLASH1_MAX_SIZE)
58#define CONFIG_SYS_FLASH_BASE CONFIG_SYS_FLASH1_ADDR
59#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
60#define CONFIG_SYS_OCM_BASE 0xe0010000
61#define CONFIG_SYS_OCM_DATA_ADDR CONFIG_SYS_OCM_BASE
62#define CONFIG_SYS_PCI_BASE 0xe0000000
63#define CONFIG_SYS_PCI_MEMBASE 0x80000000
64#define CONFIG_SYS_PCI_MEMBASE2 (CONFIG_SYS_PCI_MEMBASE + 0x20000000)
65
66#define CONFIG_SYS_USB2D0_BASE 0xe0000100
67#define CONFIG_SYS_USB_DEVICE 0xe0000000
68#define CONFIG_SYS_USB_HOST 0xe0000400
69#define CONFIG_SYS_CPLD_BASE 0xc0000000
70
71
72
73
74
75#undef CONFIG_SYS_INIT_RAM_DCACHE
76#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_OCM_BASE
77#define CONFIG_SYS_INIT_RAM_SIZE (4 << 10)
78#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
79#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_GBL_DATA_OFFSET - 0x4)
80
81
82
83
84#define CONFIG_CONS_INDEX 1
85#define CONFIG_SYS_NS16550
86#define CONFIG_SYS_NS16550_SERIAL
87#define CONFIG_SYS_NS16550_REG_SIZE 1
88#define CONFIG_SYS_NS16550_CLK get_serial_clock()
89#define CONFIG_SYS_EXT_SERIAL_CLOCK 11059200
90#define CONFIG_BAUDRATE 115200
91
92#define CONFIG_SYS_BAUDRATE_TABLE \
93 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
94
95
96
97
98#define CONFIG_ENV_IS_IN_FLASH 1
99
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101
102
103#define CONFIG_SYS_FLASH_CFI
104#define CONFIG_FLASH_CFI_DRIVER
105#define CONFIG_FLASH_CFI_LEGACY
106
107#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH1_ADDR, CONFIG_SYS_FLASH0_ADDR }
108
109#define CONFIG_SYS_MAX_FLASH_BANKS 2
110#define CONFIG_SYS_MAX_FLASH_SECT 1024
111
112#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
113#define CONFIG_SYS_FLASH_WRITE_TOUT 500
114
115#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
116#define CONFIG_SYS_FLASH_PROTECTION 1
117
118#define CONFIG_SYS_FLASH_EMPTY_INFO
119#define CONFIG_SYS_FLASH_QUIET_TEST 1
120
121#define CONFIG_ENV_SECT_SIZE 0x20000
122#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH1_TOP - CONFIG_ENV_SECT_SIZE)
123#define CONFIG_ENV_SIZE 0x2000
124
125
126#define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR - CONFIG_ENV_SECT_SIZE)
127#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
128
129
130
131
132#define CONFIG_DDR_DATA_EYE
133#define CONFIG_SPD_EEPROM
134#define CONFIG_ZERO_SDRAM
135#define CONFIG_DDR_ECC
136#define SPD_EEPROM_ADDRESS {0x50}
137#define CONFIG_PROG_SDRAM_TLB
138#define CONFIG_SYS_MEM_TOP_HIDE (4 << 10)
139
140
141
142
143
144#define CONFIG_SYS_I2C
145#define CONFIG_SYS_I2C_PPC4XX
146#define CONFIG_SYS_I2C_PPC4XX_CH0
147#define CONFIG_SYS_I2C_PPC4XX_SPEED_0 400000
148#define CONFIG_SYS_I2C_PPC4XX_SLAVE_0 0x7F
149
150#define CONFIG_SYS_I2C_MULTI_EEPROMS
151#define CONFIG_SYS_I2C_EEPROM_ADDR (0xa8>>1)
152#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
153#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
154#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
155
156
157#define CONFIG_RTC_M41T60 1
158#define CONFIG_SYS_I2C_RTC_ADDR 0x68
159
160
161#define CONFIG_DTT_LM73 1
162#define CONFIG_DTT_SENSORS {2}
163#define CONFIG_SYS_DTT_MAX_TEMP 70
164#define CONFIG_SYS_DTT_MIN_TEMP -30
165
166#define CONFIG_PREBOOT "echo;" \
167 "echo Type \\\"run flash_cf\\\" to mount from CompactFlash(R);" \
168 "echo"
169
170#undef CONFIG_BOOTARGS
171
172
173#define CONFIG_HOSTNAME korat
174
175
176#define CONFIG_EXTRA_ENV_SETTINGS \
177 "u_boot=korat/u-boot.bin\0" \
178 "load=tftp 200000 ${u_boot}\0" \
179 "update=protect off F7F60000 F7FBFFFF;erase F7F60000 F7FBFFFF;" \
180 "cp.b ${fileaddr} F7F60000 ${filesize};protect on " \
181 "F7F60000 F7FBFFFF\0" \
182 "upd=run load update\0" \
183 "bootfile=korat/uImage\0" \
184 "dtb=korat/korat.dtb\0" \
185 "kernel_addr=F4000000\0" \
186 "ramdisk_addr=F4400000\0" \
187 "dtb_addr=F41E0000\0" \
188 "udl=tftp 200000 ${bootfile}; erase F4000000 F41DFFFF; " \
189 "cp.b ${fileaddr} F4000000 ${filesize}\0" \
190 "udd=tftp 200000 ${dtb}; erase F41E0000 F41FFFFF; " \
191 "cp.b ${fileaddr} F41E0000 ${filesize}\0" \
192 "ll=setenv kernel_addr 200000; setenv dtb_addr 1000000; " \
193 "tftp ${kernel_addr} ${uImage}; tftp ${dtb_addr} " \
194 "${dtb}\0" \
195 "rd_size=73728\0" \
196 "ramargs=setenv bootargs root=/dev/ram rw " \
197 "ramdisk_size=${rd_size}\0" \
198 "usbdev=sda1\0" \
199 "usbargs=setenv bootargs root=/dev/${usbdev} ro rootdelay=10\0" \
200 "rootpath=/opt/eldk/ppc_4xxFP\0" \
201 "netdev=eth0\0" \
202 "nfsargs=setenv bootargs root=/dev/nfs rw " \
203 "nfsroot=${serverip}:${rootpath}\0" \
204 "pciclk=33\0" \
205 "addide=setenv bootargs ${bootargs} ide=reverse " \
206 "idebus=${pciclk}\0" \
207 "addip=setenv bootargs ${bootargs} " \
208 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
209 ":${hostname}:${netdev}:off panic=1\0" \
210 "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
211 "flash_cf=run usbargs addide addip addtty; " \
212 "bootm ${kernel_addr} - ${dtb_addr}\0" \
213 "flash_nfs=run nfsargs addide addip addtty; " \
214 "bootm ${kernel_addr} - ${dtb_addr}\0" \
215 "flash_self=run ramargs addip addtty; " \
216 "bootm ${kernel_addr} ${ramdisk_addr} ${dtb_addr}\0" \
217 ""
218
219#define CONFIG_BOOTCOMMAND "run flash_cf"
220
221#define CONFIG_BOOTDELAY 5
222
223#define CONFIG_LOADS_ECHO 1
224#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
225
226#define CONFIG_PPC4xx_EMAC
227#define CONFIG_IBM_EMAC4_V4 1
228#define CONFIG_MII 1
229#define CONFIG_PHY_ADDR 2
230#define CONFIG_PHY_DYNAMIC_ANEG 1
231
232#undef CONFIG_PHY_RESET
233#define CONFIG_PHY_GIGE 1
234
235#define CONFIG_HAS_ETH0
236#define CONFIG_SYS_RX_ETH_BUFFER 32
237
238#define CONFIG_HAS_ETH1 1
239#define CONFIG_PHY1_ADDR 3
240
241
242#define CONFIG_USB_OHCI
243#define CONFIG_USB_STORAGE
244
245
246#define USB_2_0_DEVICE
247
248
249#define CONFIG_MAC_PARTITION
250#define CONFIG_DOS_PARTITION
251#define CONFIG_ISO_PARTITION
252
253
254
255
256#define CONFIG_BOOTP_BOOTFILESIZE
257#define CONFIG_BOOTP_BOOTPATH
258#define CONFIG_BOOTP_GATEWAY
259#define CONFIG_BOOTP_HOSTNAME
260#define CONFIG_BOOTP_SUBNETMASK
261
262
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264
265#include <config_cmd_default.h>
266
267#define CONFIG_CMD_ASKENV
268#define CONFIG_CMD_DATE
269#define CONFIG_CMD_DHCP
270#define CONFIG_CMD_DTT
271#define CONFIG_CMD_DIAG
272#define CONFIG_CMD_EEPROM
273#define CONFIG_CMD_ELF
274#define CONFIG_CMD_FAT
275#define CONFIG_CMD_I2C
276#define CONFIG_CMD_IRQ
277#define CONFIG_CMD_MII
278#define CONFIG_CMD_NET
279#define CONFIG_CMD_NFS
280#define CONFIG_CMD_PCI
281#define CONFIG_CMD_PING
282#define CONFIG_CMD_REGINFO
283#define CONFIG_CMD_SDRAM
284#define CONFIG_CMD_USB
285
286
287#define CONFIG_POST (CONFIG_SYS_POST_CACHE | \
288 CONFIG_SYS_POST_CPU | \
289 CONFIG_SYS_POST_ECC | \
290 CONFIG_SYS_POST_ETHER | \
291 CONFIG_SYS_POST_FPU | \
292 CONFIG_SYS_POST_I2C | \
293 CONFIG_SYS_POST_MEMORY | \
294 CONFIG_SYS_POST_RTC | \
295 CONFIG_SYS_POST_SPR | \
296 CONFIG_SYS_POST_UART)
297
298#define CONFIG_LOGBUFFER
299#define CONFIG_SYS_POST_CACHE_ADDR 0xC8000000
300
301#define CONFIG_SYS_CONSOLE_IS_IN_ENV
302
303#define CONFIG_SUPPORT_VFAT
304
305
306
307
308#define CONFIG_SYS_LONGHELP
309#if defined(CONFIG_CMD_KGDB)
310#define CONFIG_SYS_CBSIZE 1024
311#else
312#define CONFIG_SYS_CBSIZE 256
313#endif
314#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
315
316#define CONFIG_SYS_MAXARGS 16
317#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
318
319#define CONFIG_SYS_MEMTEST_START 0x0400000
320#define CONFIG_SYS_MEMTEST_END 0x0C00000
321
322#define CONFIG_SYS_LOAD_ADDR 0x100000
323#define CONFIG_SYS_EXTBDINFO 1
324
325#define CONFIG_CMDLINE_EDITING 1
326#define CONFIG_LOOPW 1
327#define CONFIG_MX_CYCLIC 1
328#define CONFIG_ZERO_BOOTDELAY_CHECK
329#define CONFIG_VERSION_VARIABLE 1
330
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333
334#define CONFIG_SYS_KORAT_MAN_RESET_MS 10000
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339
340#define CONFIG_PCI
341#define CONFIG_PCI_INDIRECT_BRIDGE
342#define CONFIG_PCI_PNP
343#define CONFIG_SYS_PCI_CACHE_LINE_SIZE 0
344#define CONFIG_PCI_SCAN_SHOW
345#define CONFIG_SYS_PCI_TARGBASE 0x80000000
346
347
348#define CONFIG_SYS_PCI_TARGET_INIT
349#define CONFIG_SYS_PCI_MASTER_INIT
350#define CONFIG_SYS_PCI_BOARD_FIXUP_IRQ
351
352#define CONFIG_SYS_PCI_SUBSYS_VENDORID 0x10e8
353#define CONFIG_SYS_PCI_SUBSYS_ID 0xcafe
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359
360#define CONFIG_SYS_BOOTMAPSZ (8 << 20)
361
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366
367#if CONFIG_SYS_FLASH0_SIZE == 0x01000000
368#define CONFIG_SYS_EBC_PB0AP 0x04017300
369#define CONFIG_SYS_EBC_PB0CR (CONFIG_SYS_FLASH0_ADDR | 0x0009A000)
370#elif CONFIG_SYS_FLASH0_SIZE == 0x04000000
371#define CONFIG_SYS_EBC_PB0AP 0x04017300
372#define CONFIG_SYS_EBC_PB0CR (CONFIG_SYS_FLASH0_ADDR | 0x000DA000)
373#else
374#error Unable to configure chip select for current CONFIG_SYS_FLASH0_SIZE
375#endif
376
377
378#if CONFIG_SYS_FLASH1_MAX_SIZE == 0x08000000
379#define CONFIG_SYS_EBC_PB1AP 0x04017300
380#define CONFIG_SYS_EBC_PB1CR (CONFIG_SYS_FLASH1_ADDR | 0x000FA000)
381#else
382#error Unable to configure chip select for current CONFIG_SYS_FLASH1_MAX_SIZE
383#endif
384
385
386#define CONFIG_SYS_EBC_PB2AP 0x04017300
387#define CONFIG_SYS_EBC_PB2CR (CONFIG_SYS_CPLD_BASE | 0x00038000)
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453
454#define CONFIG_SYS_GPIO_ATMEGA_RESET_ 12
455#define CONFIG_SYS_GPIO_ATMEGA_SS_ 13
456#define CONFIG_SYS_GPIO_PHY0_FIBER_SEL 27
457#define CONFIG_SYS_GPIO_PHY1_FIBER_SEL 28
458#define CONFIG_SYS_GPIO_SFP0_PRESENT_ 30
459#define CONFIG_SYS_GPIO_SFP1_PRESENT_ 31
460#define CONFIG_SYS_GPIO_SFP0_TX_EN_ 32
461#define CONFIG_SYS_GPIO_SFP1_TX_EN_ 33
462#define CONFIG_SYS_GPIO_PHY0_EN 45
463#define CONFIG_SYS_GPIO_PHY1_EN 46
464#define CONFIG_SYS_GPIO_RESET_PRESSED_ 47
465
466
467
468
469#define CONFIG_SYS_4xx_GPIO_TABLE { \
470{ \
471 \
472{GPIO0_BASE, GPIO_BI , GPIO_ALT1, GPIO_OUT_0}, \
473{GPIO0_BASE, GPIO_BI , GPIO_ALT1, GPIO_OUT_0}, \
474{GPIO0_BASE, GPIO_BI , GPIO_ALT1, GPIO_OUT_0}, \
475{GPIO0_BASE, GPIO_DIS, GPIO_SEL , GPIO_OUT_0}, \
476{GPIO0_BASE, GPIO_DIS, GPIO_SEL , GPIO_OUT_0}, \
477{GPIO0_BASE, GPIO_DIS, GPIO_SEL , GPIO_OUT_0}, \
478{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, \
479{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, \
480{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, \
481{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, \
482{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, \
483{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, \
484{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, \
485{GPIO0_BASE, GPIO_DIS, GPIO_SEL , GPIO_OUT_0}, \
486{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, \
487{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, \
488{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, \
489{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, \
490{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, \
491{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, \
492{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, \
493{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, \
494{GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
495{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, \
496{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, \
497{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, \
498{GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
499{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, \
500{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, \
501{GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
502{GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
503{GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
504}, \
505{ \
506 \
507{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, \
508{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, \
509{GPIO1_BASE, GPIO_IN , GPIO_ALT2, GPIO_OUT_0}, \
510{GPIO1_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_1}, \
511{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, \
512{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_1}, \
513{GPIO1_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_1}, \
514{GPIO1_BASE, GPIO_IN , GPIO_ALT2, GPIO_OUT_0}, \
515{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, \
516{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, \
517{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, \
518{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, \
519{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
520{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, \
521{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, \
522{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
523{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
524{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
525{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
526{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
527{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
528{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
529{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
530{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
531{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
532{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
533{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
534{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
535{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
536{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
537{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
538{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, \
539} \
540}
541
542#if defined(CONFIG_CMD_KGDB)
543#define CONFIG_KGDB_BAUDRATE 230400
544#endif
545
546
547#define CONFIG_OF_LIBFDT 1
548#define CONFIG_OF_BOARD_SETUP 1
549
550#endif
551