1
2
3
4
5
6
7
8
9
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14
15
16
17#define CONFIG_BOOKE 1
18#define CONFIG_E500 1
19#define CONFIG_P2020 1
20#define CONFIG_XPEDITE550X 1
21#define CONFIG_SYS_BOARD_NAME "XPedite5500"
22#define CONFIG_SYS_FORM_PMC_XMC 1
23#define CONFIG_PRPMC_PCI_ALIAS "pci0"
24#define CONFIG_BOARD_EARLY_INIT_R
25
26#ifndef CONFIG_SYS_TEXT_BASE
27#define CONFIG_SYS_TEXT_BASE 0xfff80000
28#endif
29
30#define CONFIG_PCI 1
31#define CONFIG_PCI_PNP 1
32#define CONFIG_PCI_SCAN_SHOW 1
33#define CONFIG_PCIE1 1
34#define CONFIG_FSL_PCI_INIT 1
35#define CONFIG_PCI_INDIRECT_BRIDGE 1
36#define CONFIG_SYS_PCI_64BIT 1
37#define CONFIG_FSL_PCIE_RESET 1
38#define CONFIG_FSL_LAW 1
39#define CONFIG_FSL_ELBC 1
40
41
42
43
44#define CONFIG_MP
45#define CONFIG_BPTR_VIRT_ADDR 0xee000000
46#define CONFIG_MPC8xxx_DISABLE_BPTR
47
48
49
50
51#define CONFIG_SYS_FSL_DDR3
52#define CONFIG_SPD_EEPROM
53#define CONFIG_DDR_SPD
54#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
55#define SPD_EEPROM_ADDRESS 0x54
56#define SPD_EEPROM_OFFSET 0x200
57#define CONFIG_NUM_DDR_CONTROLLERS 1
58#define CONFIG_DIMM_SLOTS_PER_CTLR 1
59#define CONFIG_CHIP_SELECTS_PER_CTRL 2
60#define CONFIG_DDR_ECC
61#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER
62#define CONFIG_SYS_DDR_SDRAM_BASE 0x00000000
63#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
64#define CONFIG_VERY_BIG_RAM
65
66#ifndef __ASSEMBLY__
67extern unsigned long get_board_sys_clk(unsigned long dummy);
68extern unsigned long get_board_ddr_clk(unsigned long dummy);
69#endif
70
71#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0)
72#define CONFIG_DDR_CLK_FREQ get_board_ddr_clk(0)
73
74
75
76
77#define CONFIG_L2_CACHE
78#define CONFIG_BTB
79#define CONFIG_ENABLE_36BIT_PHYS 1
80
81#define CONFIG_SYS_CCSRBAR 0xef000000
82#define CONFIG_SYS_CCSRBAR_PHYS_LOW CONFIG_SYS_CCSRBAR
83
84
85
86
87#define CONFIG_SYS_ALT_MEMTEST
88#define CONFIG_SYS_MEMTEST_START 0x10000000
89#define CONFIG_SYS_MEMTEST_END 0x20000000
90#define CONFIG_POST (CONFIG_SYS_POST_MEMORY | \
91 CONFIG_SYS_POST_I2C)
92#define I2C_ADDR_LIST {CONFIG_SYS_I2C_EEPROM_ADDR, \
93 CONFIG_SYS_I2C_LM75_ADDR, \
94 CONFIG_SYS_I2C_LM90_ADDR, \
95 CONFIG_SYS_I2C_PCA953X_ADDR0, \
96 CONFIG_SYS_I2C_PCA953X_ADDR2, \
97 CONFIG_SYS_I2C_PCA953X_ADDR3, \
98 CONFIG_SYS_I2C_RTC_ADDR}
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113#define CONFIG_SYS_LBC_LCRR (LCRR_CLKDIV_8 | LCRR_EADC_3)
114
115
116
117
118#define CONFIG_SYS_NAND_BASE 0xef800000
119#define CONFIG_SYS_NAND_BASE2 0xef840000
120#define CONFIG_SYS_NAND_BASE_LIST {CONFIG_SYS_NAND_BASE, \
121 CONFIG_SYS_NAND_BASE2}
122#define CONFIG_SYS_MAX_NAND_DEVICE 2
123#define CONFIG_MTD_NAND_VERIFY_WRITE
124#define CONFIG_SYS_NAND_QUIET_TEST
125#define CONFIG_NAND_FSL_ELBC
126
127
128
129
130#define CONFIG_SYS_FLASH_BASE 0xf8000000
131#define CONFIG_SYS_FLASH_BASE2 0xf0000000
132#define CONFIG_SYS_FLASH_BANKS_LIST {CONFIG_SYS_FLASH_BASE, CONFIG_SYS_FLASH_BASE2}
133#define CONFIG_SYS_MAX_FLASH_BANKS 2
134#define CONFIG_SYS_MAX_FLASH_SECT 1024
135#define CONFIG_SYS_FLASH_ERASE_TOUT 60000
136#define CONFIG_SYS_FLASH_WRITE_TOUT 500
137#define CONFIG_FLASH_CFI_DRIVER
138#define CONFIG_SYS_FLASH_CFI
139#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
140#define CONFIG_SYS_FLASH_AUTOPROTECT_LIST { {0xfff40000, 0xc0000}, \
141 {0xf7f40000, 0xc0000} }
142#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
143
144
145
146
147
148#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | \
149 BR_PS_16 | \
150 BR_V)
151#define CONFIG_SYS_OR0_PRELIM (OR_AM_128MB | \
152 OR_GPCM_CSNT | \
153 OR_GPCM_XACS | \
154 OR_GPCM_ACS_DIV2 | \
155 OR_GPCM_SCY_8 | \
156 OR_GPCM_TRLX | \
157 OR_GPCM_EHTR | \
158 OR_GPCM_EAD)
159
160
161#define CONFIG_SYS_BR1_PRELIM (CONFIG_SYS_FLASH_BASE2 | \
162 BR_PS_16 | \
163 BR_V)
164#define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_OR0_PRELIM
165
166
167#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_NAND_BASE | \
168 (2<<BR_DECC_SHIFT) | \
169 BR_PS_8 | \
170 BR_MS_FCM | \
171 BR_V)
172
173
174#define CONFIG_SYS_OR2_PRELIM (OR_AM_256KB | \
175 OR_FCM_PGS | \
176 OR_FCM_CSCT | \
177 OR_FCM_CST | \
178 OR_FCM_CHT | \
179 OR_FCM_SCY_1 | \
180 OR_FCM_TRLX | \
181 OR_FCM_EHTR)
182
183
184#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_NAND_BASE2 | \
185 (2<<BR_DECC_SHIFT) | \
186 BR_PS_8 | \
187 BR_MS_FCM | \
188 BR_V)
189#define CONFIG_SYS_OR3_PRELIM CONFIG_SYS_OR2_PRELIM
190
191
192
193
194#define CONFIG_SYS_INIT_RAM_LOCK 1
195#define CONFIG_SYS_INIT_RAM_ADDR 0xe0000000
196#define CONFIG_SYS_INIT_RAM_SIZE 0x00004000
197
198#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
199#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
200
201#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
202#define CONFIG_SYS_MALLOC_LEN (1024 * 1024)
203
204
205
206
207#define CONFIG_CONS_INDEX 1
208#define CONFIG_SYS_NS16550
209#define CONFIG_SYS_NS16550_SERIAL
210#define CONFIG_SYS_NS16550_REG_SIZE 1
211#define CONFIG_SYS_NS16550_CLK get_bus_freq(0)
212#define CONFIG_SYS_NS16550_COM1 (CONFIG_SYS_CCSRBAR+0x4500)
213#define CONFIG_SYS_NS16550_COM2 (CONFIG_SYS_CCSRBAR+0x4600)
214#define CONFIG_SYS_BAUDRATE_TABLE \
215 {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
216#define CONFIG_BAUDRATE 115200
217#define CONFIG_LOADS_ECHO 1
218#define CONFIG_SYS_LOADS_BAUD_CHANGE 1
219
220
221
222
223#define CONFIG_SYS_HUSH_PARSER
224
225
226
227
228#define CONFIG_OF_LIBFDT 1
229#define CONFIG_OF_BOARD_SETUP 1
230#define CONFIG_OF_STDOUT_VIA_ALIAS 1
231#define CONFIG_FDT_FIXUP_PCI_IRQ 1
232
233
234
235
236#define CONFIG_SYS_I2C
237#define CONFIG_SYS_I2C_FSL
238#define CONFIG_SYS_FSL_I2C_SPEED 400000
239#define CONFIG_SYS_FSL_I2C_SLAVE 0x7F
240#define CONFIG_SYS_FSL_I2C_OFFSET 0x3000
241#define CONFIG_SYS_FSL_I2C2_SPEED 400000
242#define CONFIG_SYS_FSL_I2C2_SLAVE 0x7F
243#define CONFIG_SYS_FSL_I2C2_OFFSET 0x3100
244
245
246#define CONFIG_DTT_LM75
247#define CONFIG_DTT_SENSORS { 0 }
248#define CONFIG_SYS_I2C_LM75_ADDR 0x48
249
250
251#define CONFIG_SYS_I2C_LM90_ADDR 0x4C
252
253
254#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
255#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
256#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
257#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
258
259
260#define CONFIG_RTC_M41T11 1
261#define CONFIG_SYS_I2C_RTC_ADDR 0x68
262#define CONFIG_SYS_M41T11_BASE_YEAR 2000
263
264
265#define CONFIG_PCA953X
266#define CONFIG_SYS_I2C_PCA953X_ADDR0 0x18
267#define CONFIG_SYS_I2C_PCA953X_ADDR1 0x1c
268#define CONFIG_SYS_I2C_PCA953X_ADDR2 0x1e
269#define CONFIG_SYS_I2C_PCA953X_ADDR3 0x1f
270#define CONFIG_SYS_I2C_PCA953X_ADDR CONFIG_SYS_I2C_PCA953X_ADDR0
271
272
273
274
275
276#define CONFIG_SYS_PCA953X_C0_SER0_EN 0x01
277#define CONFIG_SYS_PCA953X_C0_SER0_MODE 0x02
278#define CONFIG_SYS_PCA953X_C0_SER1_EN 0x04
279#define CONFIG_SYS_PCA953X_C0_SER1_MODE 0x08
280#define CONFIG_SYS_PCA953X_C0_FLASH_PASS_CS 0x10
281#define CONFIG_SYS_PCA953X_NVM_WP 0x20
282
283
284#define CONFIG_SYS_PCA953X_XMC_GA0 0x01
285#define CONFIG_SYS_PCA953X_XMC_GA1 0x02
286#define CONFIG_SYS_PCA953X_XMC_GA2 0x04
287#define CONFIG_SYS_PCA953X_XMC_WAKE 0x10
288#define CONFIG_SYS_PCA953X_XMC_BIST 0x20
289#define CONFIG_SYS_PCA953X_PMC_EREADY 0x40
290#define CONFIG_SYS_PCA953X_PMC_MONARCH 0x80
291
292
293#define CONFIG_SYS_PCA953X_MC_GPIO0 0x01
294#define CONFIG_SYS_PCA953X_MC_GPIO1 0x02
295#define CONFIG_SYS_PCA953X_MC_GPIO2 0x04
296#define CONFIG_SYS_PCA953X_MC_GPIO3 0x08
297#define CONFIG_SYS_PCA953X_MC_GPIO4 0x10
298#define CONFIG_SYS_PCA953X_MC_GPIO5 0x20
299#define CONFIG_SYS_PCA953X_MC_GPIO6 0x40
300#define CONFIG_SYS_PCA953X_MC_GPIO7 0x80
301
302
303
304
305
306
307
308#define CONFIG_SYS_PCIE1_MEM_BUS 0x80000000
309#define CONFIG_SYS_PCIE1_MEM_PHYS CONFIG_SYS_PCIE1_MEM_BUS
310#define CONFIG_SYS_PCIE1_MEM_SIZE 0x40000000
311#define CONFIG_SYS_PCIE1_IO_BUS 0x00000000
312#define CONFIG_SYS_PCIE1_IO_PHYS 0xe8000000
313#define CONFIG_SYS_PCIE1_IO_SIZE 0x00800000
314
315
316
317
318
319#define CONFIG_TSEC_ENET
320#define CONFIG_PHY_GIGE 1
321#define CONFIG_TSEC_TBI
322#define CONFIG_MII 1
323#define CONFIG_MII_DEFAULT_TSEC 1
324#define CONFIG_ETHPRIME "eTSEC2"
325
326
327
328
329
330#define CONFIG_TSEC_TBICR_SETTINGS ( \
331 TBICR_PHY_RESET \
332 | TBICR_FULL_DUPLEX \
333 | TBICR_SPEED1_SET \
334 )
335
336#define CONFIG_TSEC1 1
337#define CONFIG_TSEC1_NAME "eTSEC1"
338#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
339#define TSEC1_PHY_ADDR 1
340#define TSEC1_PHYIDX 0
341#define CONFIG_HAS_ETH0
342
343#define CONFIG_TSEC2 1
344#define CONFIG_TSEC2_NAME "eTSEC2"
345#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
346#define TSEC2_PHY_ADDR 2
347#define TSEC2_PHYIDX 0
348#define CONFIG_HAS_ETH1
349
350#define CONFIG_TSEC3 1
351#define CONFIG_TSEC3_NAME "eTSEC3"
352#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
353#define TSEC3_PHY_ADDR 3
354#define TSEC3_PHYIDX 0
355#define CONFIG_HAS_ETH2
356
357
358
359
360#define CONFIG_USB_STORAGE
361#define CONFIG_USB_EHCI
362#define CONFIG_USB_EHCI_FSL
363#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
364#define CONFIG_DOS_PARTITION
365
366
367
368
369#include <config_cmd_default.h>
370
371#define CONFIG_CMD_ASKENV
372#define CONFIG_CMD_DATE
373#define CONFIG_CMD_DHCP
374#define CONFIG_CMD_DTT
375#define CONFIG_CMD_EEPROM
376#define CONFIG_CMD_ELF
377#define CONFIG_CMD_FLASH
378#define CONFIG_CMD_I2C
379#define CONFIG_CMD_JFFS2
380#define CONFIG_CMD_MII
381#define CONFIG_CMD_NAND
382#define CONFIG_CMD_NET
383#define CONFIG_CMD_PCA953X
384#define CONFIG_CMD_PCA953X_INFO
385#define CONFIG_CMD_PCI
386#define CONFIG_CMD_PCI_ENUM
387#define CONFIG_CMD_PING
388#define CONFIG_CMD_REGINFO
389#define CONFIG_CMD_SAVEENV
390#define CONFIG_CMD_SNTP
391#define CONFIG_CMD_USB
392
393
394
395
396#define CONFIG_SYS_LONGHELP
397#define CONFIG_SYS_LOAD_ADDR 0x2000000
398#define CONFIG_SYS_CBSIZE 256
399#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
400#define CONFIG_SYS_MAXARGS 16
401#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
402#define CONFIG_CMDLINE_EDITING 1
403#define CONFIG_AUTO_COMPLETE 1
404#define CONFIG_LOADADDR 0x1000000
405#define CONFIG_BOOTDELAY 3
406#define CONFIG_PANIC_HANG
407#define CONFIG_PREBOOT
408#define CONFIG_FIT 1
409#define CONFIG_FIT_VERBOSE 1
410#define CONFIG_INTEGRITY
411
412
413
414
415
416
417#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
418#define CONFIG_SYS_BOOTM_LEN (16 << 20)
419
420
421
422
423#define CONFIG_ENV_IS_IN_FLASH 1
424#define CONFIG_ENV_SECT_SIZE 0x20000
425#define CONFIG_ENV_SIZE 0x8000
426#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE - (256 * 1024))
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442#define CONFIG_UBOOT1_ENV_ADDR __stringify(0xfff80000)
443#define CONFIG_UBOOT2_ENV_ADDR __stringify(0xf7f80000)
444#define CONFIG_FDT1_ENV_ADDR __stringify(0xfff00000)
445#define CONFIG_FDT2_ENV_ADDR __stringify(0xf7f00000)
446#define CONFIG_OS1_ENV_ADDR __stringify(0xfef00000)
447#define CONFIG_OS2_ENV_ADDR __stringify(0xf6f00000)
448
449#define CONFIG_PROG_UBOOT1 \
450 "$download_cmd $loadaddr $ubootfile; " \
451 "if test $? -eq 0; then " \
452 "protect off "CONFIG_UBOOT1_ENV_ADDR" +80000; " \
453 "erase "CONFIG_UBOOT1_ENV_ADDR" +80000; " \
454 "cp.w $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 40000; " \
455 "protect on "CONFIG_UBOOT1_ENV_ADDR" +80000; " \
456 "cmp.b $loadaddr "CONFIG_UBOOT1_ENV_ADDR" 80000; " \
457 "if test $? -ne 0; then " \
458 "echo PROGRAM FAILED; " \
459 "else; " \
460 "echo PROGRAM SUCCEEDED; " \
461 "fi; " \
462 "else; " \
463 "echo DOWNLOAD FAILED; " \
464 "fi;"
465
466#define CONFIG_PROG_UBOOT2 \
467 "$download_cmd $loadaddr $ubootfile; " \
468 "if test $? -eq 0; then " \
469 "protect off "CONFIG_UBOOT2_ENV_ADDR" +80000; " \
470 "erase "CONFIG_UBOOT2_ENV_ADDR" +80000; " \
471 "cp.w $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 40000; " \
472 "protect on "CONFIG_UBOOT2_ENV_ADDR" +80000; " \
473 "cmp.b $loadaddr "CONFIG_UBOOT2_ENV_ADDR" 80000; " \
474 "if test $? -ne 0; then " \
475 "echo PROGRAM FAILED; " \
476 "else; " \
477 "echo PROGRAM SUCCEEDED; " \
478 "fi; " \
479 "else; " \
480 "echo DOWNLOAD FAILED; " \
481 "fi;"
482
483#define CONFIG_BOOT_OS_NET \
484 "$download_cmd $osaddr $osfile; " \
485 "if test $? -eq 0; then " \
486 "if test -n $fdtaddr; then " \
487 "$download_cmd $fdtaddr $fdtfile; " \
488 "if test $? -eq 0; then " \
489 "bootm $osaddr - $fdtaddr; " \
490 "else; " \
491 "echo FDT DOWNLOAD FAILED; " \
492 "fi; " \
493 "else; " \
494 "bootm $osaddr; " \
495 "fi; " \
496 "else; " \
497 "echo OS DOWNLOAD FAILED; " \
498 "fi;"
499
500#define CONFIG_PROG_OS1 \
501 "$download_cmd $osaddr $osfile; " \
502 "if test $? -eq 0; then " \
503 "erase "CONFIG_OS1_ENV_ADDR" +$filesize; " \
504 "cp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \
505 "cmp.b $osaddr "CONFIG_OS1_ENV_ADDR" $filesize; " \
506 "if test $? -ne 0; then " \
507 "echo OS PROGRAM FAILED; " \
508 "else; " \
509 "echo OS PROGRAM SUCCEEDED; " \
510 "fi; " \
511 "else; " \
512 "echo OS DOWNLOAD FAILED; " \
513 "fi;"
514
515#define CONFIG_PROG_OS2 \
516 "$download_cmd $osaddr $osfile; " \
517 "if test $? -eq 0; then " \
518 "erase "CONFIG_OS2_ENV_ADDR" +$filesize; " \
519 "cp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \
520 "cmp.b $osaddr "CONFIG_OS2_ENV_ADDR" $filesize; " \
521 "if test $? -ne 0; then " \
522 "echo OS PROGRAM FAILED; " \
523 "else; " \
524 "echo OS PROGRAM SUCCEEDED; " \
525 "fi; " \
526 "else; " \
527 "echo OS DOWNLOAD FAILED; " \
528 "fi;"
529
530#define CONFIG_PROG_FDT1 \
531 "$download_cmd $fdtaddr $fdtfile; " \
532 "if test $? -eq 0; then " \
533 "erase "CONFIG_FDT1_ENV_ADDR" +$filesize;" \
534 "cp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \
535 "cmp.b $fdtaddr "CONFIG_FDT1_ENV_ADDR" $filesize; " \
536 "if test $? -ne 0; then " \
537 "echo FDT PROGRAM FAILED; " \
538 "else; " \
539 "echo FDT PROGRAM SUCCEEDED; " \
540 "fi; " \
541 "else; " \
542 "echo FDT DOWNLOAD FAILED; " \
543 "fi;"
544
545#define CONFIG_PROG_FDT2 \
546 "$download_cmd $fdtaddr $fdtfile; " \
547 "if test $? -eq 0; then " \
548 "erase "CONFIG_FDT2_ENV_ADDR" +$filesize;" \
549 "cp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \
550 "cmp.b $fdtaddr "CONFIG_FDT2_ENV_ADDR" $filesize; " \
551 "if test $? -ne 0; then " \
552 "echo FDT PROGRAM FAILED; " \
553 "else; " \
554 "echo FDT PROGRAM SUCCEEDED; " \
555 "fi; " \
556 "else; " \
557 "echo FDT DOWNLOAD FAILED; " \
558 "fi;"
559
560#define CONFIG_EXTRA_ENV_SETTINGS \
561 "autoload=yes\0" \
562 "download_cmd=tftp\0" \
563 "console_args=console=ttyS0,115200\0" \
564 "root_args=root=/dev/nfs rw\0" \
565 "misc_args=ip=on\0" \
566 "set_bootargs=setenv bootargs ${console_args} ${root_args} ${misc_args}\0" \
567 "bootfile=/home/user/file\0" \
568 "osfile=/home/user/board.uImage\0" \
569 "fdtfile=/home/user/board.dtb\0" \
570 "ubootfile=/home/user/u-boot.bin\0" \
571 "fdtaddr=c00000\0" \
572 "osaddr=0x1000000\0" \
573 "loadaddr=0x1000000\0" \
574 "prog_uboot1="CONFIG_PROG_UBOOT1"\0" \
575 "prog_uboot2="CONFIG_PROG_UBOOT2"\0" \
576 "prog_os1="CONFIG_PROG_OS1"\0" \
577 "prog_os2="CONFIG_PROG_OS2"\0" \
578 "prog_fdt1="CONFIG_PROG_FDT1"\0" \
579 "prog_fdt2="CONFIG_PROG_FDT2"\0" \
580 "bootcmd_net=run set_bootargs; "CONFIG_BOOT_OS_NET"\0" \
581 "bootcmd_flash1=run set_bootargs; " \
582 "bootm "CONFIG_OS1_ENV_ADDR" - "CONFIG_FDT1_ENV_ADDR"\0"\
583 "bootcmd_flash2=run set_bootargs; " \
584 "bootm "CONFIG_OS2_ENV_ADDR" - "CONFIG_FDT2_ENV_ADDR"\0"\
585 "bootcmd=run bootcmd_flash1\0"
586#endif
587