1
2
3
4
5
6
7
8
9
10#ifndef __CLOCK_H__
11#define __CLOCK_H__
12
13enum mxc_clock {
14 MXC_ARM_CLK = 0,
15 MXC_AHB_CLK,
16 MXC_IPG_CLK,
17 MXC_EMI_CLK,
18 MXC_GPMI_CLK,
19 MXC_IO0_CLK,
20 MXC_IO1_CLK,
21 MXC_XTAL_CLK,
22 MXC_SSP0_CLK,
23#ifdef CONFIG_MX28
24 MXC_SSP1_CLK,
25 MXC_SSP2_CLK,
26 MXC_SSP3_CLK,
27#endif
28};
29
30enum mxs_ioclock {
31 MXC_IOCLK0 = 0,
32 MXC_IOCLK1,
33};
34
35enum mxs_sspclock {
36 MXC_SSPCLK0 = 0,
37#ifdef CONFIG_MX28
38 MXC_SSPCLK1,
39 MXC_SSPCLK2,
40 MXC_SSPCLK3,
41#endif
42};
43
44uint32_t mxc_get_clock(enum mxc_clock clk);
45
46void mxs_set_ioclk(enum mxs_ioclock io, uint32_t freq);
47void mxs_set_sspclk(enum mxs_sspclock ssp, uint32_t freq, int xtal);
48void mxs_set_ssp_busclock(unsigned int bus, uint32_t freq);
49void mxs_set_lcdclk(uint32_t freq);
50
51
52#define imx_get_fecclk() mxc_get_clock(MXC_AHB_CLK)
53
54#endif
55