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23#include <common.h>
24#include <i2c.h>
25#include <net.h>
26#include <netdev.h>
27#include <asm/arch/hardware.h>
28#include <asm/arch/emac_defs.h>
29#include <asm/arch/pinmux_defs.h>
30#include <asm/io.h>
31#include <nand.h>
32#include <asm/ti-common/davinci_nand.h>
33#include <asm/arch/davinci_misc.h>
34
35#ifdef CONFIG_DAVINCI_MMC
36#include <mmc.h>
37#include <asm/arch/sdmmc_defs.h>
38#endif
39
40DECLARE_GLOBAL_DATA_PTR;
41
42static const struct pinmux_resource pinmuxes[] = {
43#ifdef CONFIG_SPI_FLASH
44 PINMUX_ITEM(spi0_pins_base),
45 PINMUX_ITEM(spi0_pins_scs0),
46 PINMUX_ITEM(spi0_pins_ena),
47#endif
48 PINMUX_ITEM(uart2_pins_txrx),
49 PINMUX_ITEM(i2c0_pins),
50#ifdef CONFIG_USB_DA8XX
51 PINMUX_ITEM(usb_pins),
52#endif
53#ifdef CONFIG_USE_NAND
54 PINMUX_ITEM(emifa_pins),
55 PINMUX_ITEM(emifa_pins_cs0),
56 PINMUX_ITEM(emifa_pins_cs2),
57 PINMUX_ITEM(emifa_pins_cs3),
58#endif
59#if defined(CONFIG_DRIVER_TI_EMAC)
60 PINMUX_ITEM(emac_pins_rmii),
61 PINMUX_ITEM(emac_pins_mdio),
62 PINMUX_ITEM(emac_pins_rmii_clk_source),
63#endif
64#ifdef CONFIG_DAVINCI_MMC
65 PINMUX_ITEM(mmc0_pins_8bit)
66#endif
67};
68
69static const struct lpsc_resource lpsc[] = {
70 { DAVINCI_LPSC_AEMIF },
71 { DAVINCI_LPSC_SPI0 },
72 { DAVINCI_LPSC_EMAC },
73 { DAVINCI_LPSC_UART2 },
74 { DAVINCI_LPSC_GPIO },
75#ifdef CONFIG_DAVINCI_MMC
76 { DAVINCI_LPSC_MMC_SD },
77#endif
78
79};
80
81#ifdef CONFIG_DAVINCI_MMC
82static struct davinci_mmc mmc_sd0 = {
83 .reg_base = (struct davinci_mmc_regs *)DAVINCI_MMC_SD0_BASE,
84 .host_caps = MMC_MODE_8BIT,
85 .voltages = MMC_VDD_32_33 | MMC_VDD_33_34,
86 .version = MMC_CTLR_VERSION_2,
87};
88
89int board_mmc_init(bd_t *bis)
90{
91 mmc_sd0.input_clk = clk_get(DAVINCI_MMCSD_CLKID);
92
93 printf("%x\n", mmc_sd0.input_clk);
94
95
96 return davinci_mmc_init(bis, &mmc_sd0);
97}
98#endif
99
100int board_init(void)
101{
102#ifndef CONFIG_USE_IRQ
103 irq_init();
104#endif
105
106#ifdef CONFIG_NAND_DAVINCI
107
108 writel(readl(&davinci_syscfg_regs->cfgchip3) & ~2,
109 &davinci_syscfg_regs->cfgchip3);
110
111 writel((DAVINCI_ABCR_WSETUP(0) |
112 DAVINCI_ABCR_WSTROBE(2) |
113 DAVINCI_ABCR_WHOLD(0) |
114 DAVINCI_ABCR_RSETUP(0) |
115 DAVINCI_ABCR_RSTROBE(2) |
116 DAVINCI_ABCR_RHOLD(0) |
117 DAVINCI_ABCR_TA(2) |
118 DAVINCI_ABCR_ASIZE_8BIT),
119 &davinci_emif_regs->ab2cr);
120#endif
121
122
123 gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA830_EVM;
124
125
126 gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
127
128
129
130
131
132
133
134 if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
135 return 1;
136
137
138 writel(readl(&davinci_syscfg_regs->suspsrc) &
139 ~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
140 DAVINCI_SYSCFG_SUSPSRC_SPI0 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
141 DAVINCI_SYSCFG_SUSPSRC_UART2),
142 &davinci_syscfg_regs->suspsrc);
143
144
145 if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
146 return 1;
147
148
149 writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
150 DAVINCI_UART_PWREMU_MGMT_UTRST),
151 &davinci_uart2_ctrl_regs->pwremu_mgmt);
152
153 return(0);
154}
155
156
157#ifdef CONFIG_NAND_DAVINCI
158int board_nand_init(struct nand_chip *nand)
159{
160 davinci_nand_init(nand);
161
162 return 0;
163}
164#endif
165
166#if defined(CONFIG_DRIVER_TI_EMAC)
167
168#define PHY_SW_I2C_ADDR 0x5f
169
170
171
172
173int board_eth_init(bd_t *bis)
174{
175 u_int8_t mac_addr[6];
176 u_int8_t switch_start_cmd[2] = { 0x01, 0x23 };
177 struct eth_device *dev;
178
179
180 if (dvevm_read_mac_address(mac_addr))
181
182 davinci_sync_env_enetaddr(mac_addr);
183
184
185 if (!eth_getenv_enetaddr("ethaddr", mac_addr))
186 return -1;
187
188
189 if (i2c_write(PHY_SW_I2C_ADDR, 0, 0,
190 switch_start_cmd, sizeof(switch_start_cmd))) {
191 printf("Ethernet switch start failed!\n");
192 return -1;
193 }
194
195
196 if (!davinci_emac_initialize()) {
197 printf("Error: Ethernet init failed!\n");
198 return -1;
199 }
200
201 dev = eth_get_dev();
202
203
204 memcpy(dev->enetaddr, mac_addr, 6);
205 dev->write_hwaddr(dev);
206
207 return 0;
208}
209#endif
210