LXR uboot/include/configs/mucmc52.h

   1/*
   2 * (C) Copyright 2008-2009
   3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
   4 *
   5 * (C) Copyright 2003-2005
   6 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
   7 *
   8 * SPDX-License-Identifier:     GPL-2.0+
   9 */
  10
  11#ifndef __CONFIG_H
  12#define __CONFIG_H
  13
  14/*
  15 * High Level Configuration Options
  16 * (easy to change)
  17 */
  18
  19#define CONFIG_MUCMC52          1       /* MUCMC52 board        */
  20#define CONFIG_HOSTNAME         mucmc52
  21
  22#ifndef CONFIG_SYS_TEXT_BASE
  23#define CONFIG_SYS_TEXT_BASE    0xFFF00000
  24#endif
  25
  26#include "manroland/common.h"
  27#include "manroland/mpc5200-common.h"
  28
  29#define CONFIG_LAST_STAGE_INIT
  30/*
  31 * Serial console configuration
  32 */
  33#define CONFIG_BAUDRATE         38400   /* ... at 38400 bps     */
  34
  35#define CONFIG_CMD_PCI
  36
  37/*
  38 * Flash configuration
  39 */
  40#define CONFIG_SYS_MAX_FLASH_SECT       67
  41
  42/*
  43 * Environment settings
  44 */
  45#define CONFIG_ENV_SECT_SIZE    0x20000
  46
  47/*
  48 * Memory map
  49 */
  50#define CONFIG_SYS_STATUS1_BASE 0x80600200
  51#define CONFIG_SYS_STATUS2_BASE 0x80600300
  52#define CONFIG_SYS_PMI_UNI_BASE 0x80800000
  53#define CONFIG_SYS_PMI_BROAD_BASE       0x80810000
  54
  55/*
  56 * GPIO configuration
  57 */
  58#define CONFIG_SYS_GPS_PORT_CONFIG      0x8D550644
  59
  60#define CONFIG_SYS_MEMTEST_START        0x00100000
  61#define CONFIG_SYS_MEMTEST_END          0x00f00000
  62
  63#define CONFIG_SYS_LOAD_ADDR            0x100000
  64
  65#define CONFIG_SYS_BOOTCS_CFG           0x0004FB00
  66
  67/* 8Mbit SRAM @0x80100000 */
  68#define CONFIG_SYS_CS1_SIZE             0x00100000
  69#define CONFIG_SYS_CS1_CFG              0x00019B00
  70
  71#define CONFIG_SYS_SRAM_SIZE            CONFIG_SYS_CS1_SIZE
  72
  73/* FRAM 32Kbyte @0x80700000 */
  74#define CONFIG_SYS_CS2_START            0x80700000
  75#define CONFIG_SYS_CS2_SIZE             0x00008000
  76#define CONFIG_SYS_CS2_CFG              0x00019800
  77
  78/* Display H1, Status Inputs, EPLD @0x80600000 */
  79#define CONFIG_SYS_CS3_START            0x80600000
  80#define CONFIG_SYS_CS3_SIZE             0x00100000
  81#define CONFIG_SYS_CS3_CFG              0x00019800
  82
  83/* PMI Unicast 32Kbyte @0x80800000 */
  84#define CONFIG_SYS_CS6_START            CONFIG_SYS_PMI_UNI_BASE
  85#define CONFIG_SYS_CS6_SIZE             0x00008000
  86#define CONFIG_SYS_CS6_CFG              0xFFFFF930
  87
  88/* PMI Broadcast 32Kbyte @0x80810000 */
  89#define CONFIG_SYS_CS7_START            CONFIG_SYS_PMI_BROAD_BASE
  90#define CONFIG_SYS_CS7_SIZE             0x00008000
  91#define CONFIG_SYS_CS7_CFG              0xFF00F930
  92
  93/*-----------------------------------------------------------------------
  94 * IDE/ATA stuff Supports IDE harddisk
  95 *-----------------------------------------------------------------------
  96 */
  97#define CONFIG_SYS_IDE_MAXDEVICE        1       /* max. 2 drives per IDE bus    */
  98
  99/*
 100 * PCI Mapping:
 101 * 0x40000000 - 0x4fffffff - PCI Memory
 102 * 0x50000000 - 0x50ffffff - PCI IO Space
 103 */
 104#define CONFIG_PCI              1
 105#define CONFIG_PCI_PNP          1
 106#define CONFIG_PCI_SCAN_SHOW    1
 107#define CONFIG_PCIAUTO_SKIP_HOST_BRIDGE 1
 108
 109#define CONFIG_PCI_MEM_BUS      0x40000000
 110#define CONFIG_PCI_MEM_PHYS     CONFIG_PCI_MEM_BUS
 111#define CONFIG_PCI_MEM_SIZE     0x10000000
 112
 113#define CONFIG_PCI_IO_BUS       0x50000000
 114#define CONFIG_PCI_IO_PHYS      CONFIG_PCI_IO_BUS
 115#define CONFIG_PCI_IO_SIZE      0x01000000
 116
 117#define CONFIG_SYS_ISA_IO               CONFIG_PCI_IO_BUS
 118
 119/*---------------------------------------------------------------------*/
 120/* Display addresses                                                   */
 121/*---------------------------------------------------------------------*/
 122
 123#define CONFIG_SYS_DISP_CHR_RAM (CONFIG_SYS_DISPLAY_BASE + 0x38)
 124#define CONFIG_SYS_DISP_CWORD           (CONFIG_SYS_DISPLAY_BASE + 0x30)
 125
 126#endif /* __CONFIG_H */
 127