1/* 2 * Copyright (C) 2010 Freescale Semiconductor, Inc. 3 * 4 * Configuration settings for the MX53-EVK Freescale board. 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8 9#ifndef __CONFIG_H 10#define __CONFIG_H 11 12#define CONFIG_MX53 13 14#define CONFIG_DISPLAY_CPUINFO 15#define CONFIG_DISPLAY_BOARDINFO 16 17#define CONFIG_MACH_TYPE MACH_TYPE_MX53_EVK 18 19#include <asm/arch/imx-regs.h> 20 21#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 22#define CONFIG_SETUP_MEMORY_TAGS 23#define CONFIG_INITRD_TAG 24#define CONFIG_REVISION_TAG 25 26#define CONFIG_SYS_GENERIC_BOARD 27 28#define CONFIG_OF_LIBFDT 29 30/* Size of malloc() pool */ 31#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024) 32 33#define CONFIG_BOARD_EARLY_INIT_F 34#define CONFIG_BOARD_LATE_INIT 35#define CONFIG_MXC_GPIO 36 37#define CONFIG_MXC_UART 38#define CONFIG_MXC_UART_BASE UART1_BASE 39 40/* I2C Configs */ 41#define CONFIG_CMD_I2C 42#define CONFIG_SYS_I2C 43#define CONFIG_SYS_I2C_MXC 44 45/* PMIC Configs */ 46#define CONFIG_POWER 47#define CONFIG_POWER_I2C 48#define CONFIG_POWER_FSL 49#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 8 50#define CONFIG_POWER_FSL_MC13892 51#define CONFIG_RTC_MC13XXX 52 53/* MMC Configs */ 54#define CONFIG_FSL_ESDHC 55#define CONFIG_SYS_FSL_ESDHC_ADDR 0 56#define CONFIG_SYS_FSL_ESDHC_NUM 2 57 58#define CONFIG_MMC 59#define CONFIG_CMD_MMC 60#define CONFIG_GENERIC_MMC 61#define CONFIG_CMD_FAT 62#define CONFIG_DOS_PARTITION 63 64/* Eth Configs */ 65#define CONFIG_MII 66 67#define CONFIG_FEC_MXC 68#define IMX_FEC_BASE FEC_BASE_ADDR 69#define CONFIG_FEC_MXC_PHYADDR 0x1F 70 71#define CONFIG_CMD_PING 72#define CONFIG_CMD_DHCP 73#define CONFIG_CMD_MII 74#define CONFIG_CMD_NET 75#define CONFIG_CMD_DATE 76 77/* Miscellaneous commands */ 78#define CONFIG_CMD_BMODE 79 80/* allow to overwrite serial and ethaddr */ 81#define CONFIG_ENV_OVERWRITE 82#define CONFIG_CONS_INDEX 1 83#define CONFIG_BAUDRATE 115200 84 85/* Command definition */ 86#include <config_cmd_default.h> 87 88#undef CONFIG_CMD_IMLS 89 90#define CONFIG_BOOTDELAY 3 91 92#define CONFIG_ETHPRIME "FEC0" 93 94#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */ 95#define CONFIG_SYS_TEXT_BASE 0x77800000 96 97#define CONFIG_EXTRA_ENV_SETTINGS \ 98 "script=boot.scr\0" \ 99 "uimage=uImage\0" \ 100 "mmcdev=0\0" \ 101 "mmcpart=2\0" \ 102 "mmcroot=/dev/mmcblk0p3 rw\0" \ 103 "mmcrootfstype=ext3 rootwait\0" \ 104 "mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \ 105 "root=${mmcroot} " \ 106 "rootfstype=${mmcrootfstype}\0" \ 107 "loadbootscript=" \ 108 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ 109 "bootscript=echo Running bootscript from mmc ...; " \ 110 "source\0" \ 111 "loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \ 112 "mmcboot=echo Booting from mmc ...; " \ 113 "run mmcargs; " \ 114 "bootm\0" \ 115 "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ 116 "root=/dev/nfs " \ 117 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 118 "netboot=echo Booting from net ...; " \ 119 "run netargs; " \ 120 "dhcp ${uimage}; bootm\0" \ 121 122#define CONFIG_BOOTCOMMAND \ 123 "mmc dev ${mmcdev}; if mmc rescan; then " \ 124 "if run loadbootscript; then " \ 125 "run bootscript; " \ 126 "else " \ 127 "if run loaduimage; then " \ 128 "run mmcboot; " \ 129 "else run netboot; " \ 130 "fi; " \ 131 "fi; " \ 132 "else run netboot; fi" 133 134#define CONFIG_ARP_TIMEOUT 200UL 135 136/* Miscellaneous configurable options */ 137#define CONFIG_SYS_LONGHELP /* undef to save memory */ 138#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */ 139#define CONFIG_AUTO_COMPLETE 140#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 141 142/* Print Buffer Size */ 143#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 144#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 145#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 146 147#define CONFIG_SYS_MEMTEST_START 0x70000000 148#define CONFIG_SYS_MEMTEST_END 0x70010000 149 150#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 151 152#define CONFIG_CMDLINE_EDITING 153 154/* Physical Memory Map */ 155#define CONFIG_NR_DRAM_BANKS 1 156#define PHYS_SDRAM_1 CSD0_BASE_ADDR 157#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024) 158 159#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) 160#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) 161#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) 162 163#define CONFIG_SYS_INIT_SP_OFFSET \ 164 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 165#define CONFIG_SYS_INIT_SP_ADDR \ 166 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 167 168/* FLASH and environment organization */ 169#define CONFIG_SYS_NO_FLASH 170 171#define CONFIG_ENV_OFFSET (6 * 64 * 1024) 172#define CONFIG_ENV_SIZE (8 * 1024) 173#define CONFIG_ENV_IS_IN_MMC 174#define CONFIG_SYS_MMC_ENV_DEV 0 175 176#endif /* __CONFIG_H */ 177