LXR uboot/tools/imximage.h

   1/*
   2 * (C) Copyright 2009
   3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
   4 *
   5 * SPDX-License-Identifier:     GPL-2.0+
   6 */
   7
   8#ifndef _IMXIMAGE_H_
   9#define _IMXIMAGE_H_
  10
  11#define MAX_HW_CFG_SIZE_V2 220 /* Max number of registers imx can set for v2 */
  12#define MAX_HW_CFG_SIZE_V1 60  /* Max number of registers imx can set for v1 */
  13#define APP_CODE_BARKER 0xB1
  14#define DCD_BARKER      0xB17219E9
  15
  16/*
  17 * NOTE: This file must be kept in sync with arch/arm/include/asm/\
  18 *       imx-common/imximage.cfg because tools/imximage.c can not
  19 *       cross-include headers from arch/arm/ and vice-versa.
  20 */
  21#define CMD_DATA_STR    "DATA"
  22
  23/* Initial Vector Table Offset */
  24#define FLASH_OFFSET_UNDEFINED  0xFFFFFFFF
  25#define FLASH_OFFSET_STANDARD   0x400
  26#define FLASH_OFFSET_NAND       FLASH_OFFSET_STANDARD
  27#define FLASH_OFFSET_SD         FLASH_OFFSET_STANDARD
  28#define FLASH_OFFSET_SPI        FLASH_OFFSET_STANDARD
  29#define FLASH_OFFSET_ONENAND    0x100
  30#define FLASH_OFFSET_NOR        0x1000
  31#define FLASH_OFFSET_SATA       FLASH_OFFSET_STANDARD
  32
  33/* Initial Load Region Size */
  34#define FLASH_LOADSIZE_UNDEFINED        0xFFFFFFFF
  35#define FLASH_LOADSIZE_STANDARD         0x1000
  36#define FLASH_LOADSIZE_NAND             FLASH_LOADSIZE_STANDARD
  37#define FLASH_LOADSIZE_SD               FLASH_LOADSIZE_STANDARD
  38#define FLASH_LOADSIZE_SPI              FLASH_LOADSIZE_STANDARD
  39#define FLASH_LOADSIZE_ONENAND          0x400
  40#define FLASH_LOADSIZE_NOR              0x0 /* entire image */
  41#define FLASH_LOADSIZE_SATA             FLASH_LOADSIZE_STANDARD
  42
  43#define IVT_HEADER_TAG 0xD1
  44#define IVT_VERSION 0x40
  45#define DCD_HEADER_TAG 0xD2
  46#define DCD_COMMAND_TAG 0xCC
  47#define DCD_VERSION 0x40
  48#define DCD_COMMAND_PARAM 0x4
  49
  50enum imximage_cmd {
  51        CMD_INVALID,
  52        CMD_IMAGE_VERSION,
  53        CMD_BOOT_FROM,
  54        CMD_BOOT_OFFSET,
  55        CMD_DATA,
  56        CMD_CSF,
  57};
  58
  59enum imximage_fld_types {
  60        CFG_INVALID = -1,
  61        CFG_COMMAND,
  62        CFG_REG_SIZE,
  63        CFG_REG_ADDRESS,
  64        CFG_REG_VALUE
  65};
  66
  67enum imximage_version {
  68        IMXIMAGE_VER_INVALID = -1,
  69        IMXIMAGE_V1 = 1,
  70        IMXIMAGE_V2
  71};
  72
  73typedef struct {
  74        uint32_t type; /* Type of pointer (byte, halfword, word, wait/read) */
  75        uint32_t addr; /* Address to write to */
  76        uint32_t value; /* Data to write */
  77} dcd_type_addr_data_t;
  78
  79typedef struct {
  80        uint32_t barker; /* Barker for sanity check */
  81        uint32_t length; /* Device configuration length (without preamble) */
  82} dcd_preamble_t;
  83
  84typedef struct {
  85        dcd_preamble_t preamble;
  86        dcd_type_addr_data_t addr_data[MAX_HW_CFG_SIZE_V1];
  87} dcd_v1_t;
  88
  89typedef struct {
  90        uint32_t app_code_jump_vector;
  91        uint32_t app_code_barker;
  92        uint32_t app_code_csf;
  93        uint32_t dcd_ptr_ptr;
  94        uint32_t super_root_key;
  95        uint32_t dcd_ptr;
  96        uint32_t app_dest_ptr;
  97} flash_header_v1_t;
  98
  99typedef struct {
 100        uint32_t length;        /* Length of data to be read from flash */
 101} flash_cfg_parms_t;
 102
 103typedef struct {
 104        flash_header_v1_t fhdr;
 105        dcd_v1_t dcd_table;
 106        flash_cfg_parms_t ext_header;
 107} imx_header_v1_t;
 108
 109typedef struct {
 110        uint32_t addr;
 111        uint32_t value;
 112} dcd_addr_data_t;
 113
 114typedef struct {
 115        uint8_t tag;
 116        uint16_t length;
 117        uint8_t version;
 118} __attribute__((packed)) ivt_header_t;
 119
 120typedef struct {
 121        uint8_t tag;
 122        uint16_t length;
 123        uint8_t param;
 124} __attribute__((packed)) write_dcd_command_t;
 125
 126typedef struct {
 127        ivt_header_t header;
 128        write_dcd_command_t write_dcd_command;
 129        dcd_addr_data_t addr_data[MAX_HW_CFG_SIZE_V2];
 130} dcd_v2_t;
 131
 132typedef struct {
 133        uint32_t start;
 134        uint32_t size;
 135        uint32_t plugin;
 136} boot_data_t;
 137
 138typedef struct {
 139        ivt_header_t header;
 140        uint32_t entry;
 141        uint32_t reserved1;
 142        uint32_t dcd_ptr;
 143        uint32_t boot_data_ptr;
 144        uint32_t self;
 145        uint32_t csf;
 146        uint32_t reserved2;
 147} flash_header_v2_t;
 148
 149typedef struct {
 150        flash_header_v2_t fhdr;
 151        boot_data_t boot_data;
 152        dcd_v2_t dcd_table;
 153} imx_header_v2_t;
 154
 155/* The header must be aligned to 4k on MX53 for NAND boot */
 156struct imx_header {
 157        union {
 158                imx_header_v1_t hdr_v1;
 159                imx_header_v2_t hdr_v2;
 160        } header;
 161};
 162
 163typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,
 164                                        char *name, int lineno,
 165                                        int fld, uint32_t value,
 166                                        uint32_t off);
 167
 168typedef void (*set_dcd_rst_t)(struct imx_header *imxhdr,
 169                                        uint32_t dcd_len,
 170                                        char *name, int lineno);
 171
 172typedef void (*set_imx_hdr_t)(struct imx_header *imxhdr, uint32_t dcd_len,
 173                uint32_t entry_point, uint32_t flash_offset);
 174
 175#endif /* _IMXIMAGE_H_ */
 176