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9#ifndef _KWBIMAGE_H_
10#define _KWBIMAGE_H_
11
12#include <stdint.h>
13
14#define KWBIMAGE_MAX_CONFIG ((0x1dc - 0x20)/sizeof(struct reg_config))
15#define MAX_TEMPBUF_LEN 32
16
17
18#define IBR_HDR_ECC_DEFAULT 0x00
19#define IBR_HDR_ECC_FORCED_HAMMING 0x01
20#define IBR_HDR_ECC_FORCED_RS 0x02
21#define IBR_HDR_ECC_DISABLED 0x03
22
23
24#define IBR_HDR_I2C_ID 0x4D
25#define IBR_HDR_SPI_ID 0x5A
26#define IBR_HDR_NAND_ID 0x8B
27#define IBR_HDR_SATA_ID 0x78
28#define IBR_HDR_PEX_ID 0x9C
29#define IBR_HDR_UART_ID 0x69
30#define IBR_DEF_ATTRIB 0x00
31
32enum kwbimage_cmd {
33 CMD_INVALID,
34 CMD_BOOT_FROM,
35 CMD_NAND_ECC_MODE,
36 CMD_NAND_PAGE_SIZE,
37 CMD_SATA_PIO_MODE,
38 CMD_DDR_INIT_DELAY,
39 CMD_DATA
40};
41
42enum kwbimage_cmd_types {
43 CFG_INVALID = -1,
44 CFG_COMMAND,
45 CFG_DATA0,
46 CFG_DATA1
47};
48
49
50typedef struct bhr_t {
51 uint8_t blockid;
52 uint8_t nandeccmode;
53 uint16_t nandpagesize;
54 uint32_t blocksize;
55 uint32_t rsvd1;
56 uint32_t srcaddr;
57 uint32_t destaddr;
58 uint32_t execaddr;
59 uint8_t satapiomode;
60 uint8_t rsvd3;
61 uint16_t ddrinitdelay;
62 uint16_t rsvd2;
63 uint8_t ext;
64 uint8_t checkSum;
65} bhr_t, *pbhr_t;
66
67struct reg_config {
68 uint32_t raddr;
69 uint32_t rdata;
70};
71
72typedef struct extbhr_t {
73 uint32_t dramregsoffs;
74 uint8_t rsrvd1[0x20 - sizeof(uint32_t)];
75 struct reg_config rcfg[KWBIMAGE_MAX_CONFIG];
76 uint8_t rsrvd2[7];
77 uint8_t checkSum;
78} extbhr_t, *pextbhr_t;
79
80struct kwb_header {
81 bhr_t kwb_hdr;
82 extbhr_t kwb_exthdr;
83};
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87
88void init_kwb_image_type (void);
89
90#endif
91