LXR uboot/board/sbc8349/pci.c

   1/*
   2 * pci.c -- WindRiver SBC8349 PCI board support.
   3 * Copyright (c) 2006 Wind River Systems, Inc.
   4 * Copyright (C) 2006-2009 Freescale Semiconductor, Inc.
   5 *
   6 * Based on MPC8349 PCI support but w/o PIB related code.
   7 *
   8 * SPDX-License-Identifier:     GPL-2.0+
   9 */
  10
  11#include <asm/mmu.h>
  12#include <asm/io.h>
  13#include <common.h>
  14#include <mpc83xx.h>
  15#include <pci.h>
  16#include <i2c.h>
  17#include <asm/fsl_i2c.h>
  18
  19DECLARE_GLOBAL_DATA_PTR;
  20
  21static struct pci_region pci1_regions[] = {
  22        {
  23                bus_start: CONFIG_SYS_PCI1_MEM_BASE,
  24                phys_start: CONFIG_SYS_PCI1_MEM_PHYS,
  25                size: CONFIG_SYS_PCI1_MEM_SIZE,
  26                flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
  27        },
  28        {
  29                bus_start: CONFIG_SYS_PCI1_IO_BASE,
  30                phys_start: CONFIG_SYS_PCI1_IO_PHYS,
  31                size: CONFIG_SYS_PCI1_IO_SIZE,
  32                flags: PCI_REGION_IO
  33        },
  34        {
  35                bus_start: CONFIG_SYS_PCI1_MMIO_BASE,
  36                phys_start: CONFIG_SYS_PCI1_MMIO_PHYS,
  37                size: CONFIG_SYS_PCI1_MMIO_SIZE,
  38                flags: PCI_REGION_MEM
  39        },
  40};
  41
  42/*
  43 * pci_init_board()
  44 *
  45 * NOTICE: PCI2 is not supported. There is only one
  46 * physical PCI slot on the board.
  47 *
  48 */
  49void
  50pci_init_board(void)
  51{
  52        volatile immap_t *immr = (volatile immap_t *)CONFIG_SYS_IMMR;
  53        volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
  54        volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
  55        struct pci_region *reg[] = { pci1_regions };
  56
  57        /* Enable all 8 PCI_CLK_OUTPUTS */
  58        clk->occr = 0xff000000;
  59        udelay(2000);
  60
  61        /* Configure PCI Local Access Windows */
  62        pci_law[0].bar = CONFIG_SYS_PCI1_MEM_PHYS & LAWBAR_BAR;
  63        pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
  64
  65        pci_law[1].bar = CONFIG_SYS_PCI1_IO_PHYS & LAWBAR_BAR;
  66        pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
  67
  68        udelay(2000);
  69
  70        mpc83xx_pci_init(1, reg);
  71}
  72