1/* 2 * Copyright (C) 2006 Atmel Corporation 3 * 4 * Configuration settings for the AVR32 Network Gateway 5 * 6 * SPDX-License-Identifier: GPL-2.0+ 7 */ 8#ifndef __CONFIG_H 9#define __CONFIG_H 10 11#include <asm/arch/hardware.h> 12 13#define CONFIG_AT32AP 14#define CONFIG_AT32AP7000 15#define CONFIG_MIMC200 16 17#define CONFIG_MIMC200_EXT_FLASH 18 19/* 20 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL 21 * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency 22 * and the PBA bus to run at 1/4 the PLL frequency. 23 */ 24#define CONFIG_PLL 25#define CONFIG_SYS_POWER_MANAGER 26#define CONFIG_SYS_OSC0_HZ 10000000 27#define CONFIG_SYS_PLL0_DIV 1 28#define CONFIG_SYS_PLL0_MUL 15 29#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16 30#define CONFIG_SYS_CLKDIV_CPU 0 31#define CONFIG_SYS_CLKDIV_HSB 1 32#define CONFIG_SYS_CLKDIV_PBA 2 33#define CONFIG_SYS_CLKDIV_PBB 1 34 35/* Reserve VM regions for SDRAM, NOR flash and FRAM */ 36#define CONFIG_SYS_NR_VM_REGIONS 3 37 38/* 39 * The PLLOPT register controls the PLL like this: 40 * icp = PLLOPT<2> 41 * ivco = PLLOPT<1:0> 42 * 43 * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz). 44 */ 45#define CONFIG_SYS_PLL0_OPT 0x04 46 47#define CONFIG_USART_BASE ATMEL_BASE_USART1 48#define CONFIG_USART_ID 1 49 50#define CONFIG_MIMC200_DBGLINK 1 51 52/* User serviceable stuff */ 53#define CONFIG_DOS_PARTITION 54 55#define CONFIG_CMDLINE_TAG 56#define CONFIG_SETUP_MEMORY_TAGS 57#define CONFIG_INITRD_TAG 58 59#define CONFIG_STACKSIZE (2048) 60 61#define CONFIG_BAUDRATE 115200 62#define CONFIG_BOOTARGS \ 63 "root=/dev/mtdblock1 rootfstype=jffs2 fbmem=512k console=ttyS1" 64#define CONFIG_BOOTCOMMAND \ 65 "fsload boot/uImage; bootm" 66 67#define CONFIG_SILENT_CONSOLE /* enable silent startup */ 68#define CONFIG_DISABLE_CONSOLE /* disable console */ 69#define CONFIG_SYS_DEVICE_NULLDEV /* include nulldev device */ 70 71#define CONFIG_LCD 1 72 73/* 74 * Only interrupt autoboot if <space> is pressed. Otherwise, garbage 75 * data on the serial line may interrupt the boot sequence. 76 */ 77#define CONFIG_BOOTDELAY 0 78#define CONFIG_ZERO_BOOTDELAY_CHECK 79#define CONFIG_AUTOBOOT 80 81/* 82 * After booting the board for the first time, new ethernet addresses 83 * should be generated and assigned to the environment variables 84 * "ethaddr" and "eth1addr". This is normally done during production. 85 */ 86#define CONFIG_OVERWRITE_ETHADDR_ONCE 87 88/* 89 * BOOTP/DHCP options 90 */ 91#define CONFIG_BOOTP_SUBNETMASK 92#define CONFIG_BOOTP_GATEWAY 93 94/* 95 * Command line configuration. 96 */ 97#include <config_cmd_default.h> 98 99#define CONFIG_CMD_ASKENV 100#define CONFIG_CMD_DHCP 101#define CONFIG_CMD_EXT2 102#define CONFIG_CMD_FAT 103#define CONFIG_CMD_JFFS2 104#define CONFIG_CMD_MMC 105#define CONFIG_CMD_NET 106 107#define CONFIG_ATMEL_USART 108#define CONFIG_MACB 109#define CONFIG_PORTMUX_PIO 110#define CONFIG_SYS_NR_PIOS 5 111#define CONFIG_SYS_HSDRAMC 112#define CONFIG_MMC 113#define CONFIG_GENERIC_ATMEL_MCI 114#define CONFIG_GENERIC_MMC 115 116#if defined(CONFIG_LCD) 117#define CONFIG_CMD_BMP 118#define CONFIG_ATMEL_LCD 1 119#define LCD_BPP LCD_COLOR16 120#define CONFIG_BMP_16BPP 1 121#define CONFIG_FB_ADDR 0x10600000 122#define CONFIG_WHITE_ON_BLACK 1 123#define CONFIG_VIDEO_BMP_GZIP 1 124#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE 262144 125#define CONFIG_ATMEL_LCD_BGR555 1 126#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1 127#define CONFIG_SPLASH_SCREEN 1 128#endif 129 130#define CONFIG_SYS_DCACHE_LINESZ 32 131#define CONFIG_SYS_ICACHE_LINESZ 32 132 133#define CONFIG_NR_DRAM_BANKS 1 134 135#define CONFIG_SYS_FLASH_CFI 136#define CONFIG_FLASH_CFI_DRIVER 137 138#define CONFIG_SYS_FLASH_BASE 0x00000000 139#define CONFIG_SYS_FLASH_SIZE 0x800000 140#define CONFIG_SYS_MAX_FLASH_BANKS 1 141#define CONFIG_SYS_MAX_FLASH_SECT 135 142 143#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 144#define CONFIG_SYS_TEXT_BASE 0x00000000 145 146#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE 147#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE 148#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE 149 150#define CONFIG_SYS_FRAM_BASE 0x08000000 151#define CONFIG_SYS_FRAM_SIZE 0x20000 152 153#define CONFIG_ENV_IS_IN_FLASH 154#define CONFIG_ENV_SIZE 65536 155#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE) 156 157#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE) 158 159#define CONFIG_SYS_MALLOC_LEN (1024*1024) 160#define CONFIG_SYS_DMA_ALLOC_LEN (16384) 161 162/* Allow 4MB for the kernel run-time image */ 163#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000) 164#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024) 165 166/* Other configuration settings that shouldn't have to change all that often */ 167#define CONFIG_SYS_PROMPT "U-Boot> " 168#define CONFIG_SYS_CBSIZE 256 169#define CONFIG_SYS_MAXARGS 16 170#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 171#define CONFIG_SYS_LONGHELP 172 173#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE 174#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000) 175 176#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 } 177 178#endif /* __CONFIG_H */ 179