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12#ifndef __CONFIG_H
13#define __CONFIG_H
14
15
16
17
18
19
20#include <asm/hardware.h>
21
22
23#define CONFIG_DISPLAY_BOARDINFO
24
25#define MASTER_PLL_DIV 15
26#define MASTER_PLL_MUL 162
27#define MAIN_PLL_DIV 2
28#define CONFIG_SYS_AT91_SLOW_CLOCK 32768
29#define CONFIG_SYS_AT91_MAIN_CLOCK 18432000
30
31#define CONFIG_SYS_AT91_CPU_NAME "AT91SAM9261"
32#define CONFIG_PM9261 1
33#define CONFIG_ARCH_CPU_INIT
34#define CONFIG_SYS_TEXT_BASE 0
35
36#define MACH_TYPE_PM9261 1187
37#define CONFIG_MACH_TYPE MACH_TYPE_PM9261
38
39
40
41#define CONFIG_SYS_MOR_VAL \
42 (AT91_PMC_MOR_MOSCEN | \
43 (255 << 8))
44#define CONFIG_SYS_PLLAR_VAL \
45 (AT91_PMC_PLLAR_29 | \
46 AT91_PMC_PLLXR_OUT(3) | \
47 ((MASTER_PLL_MUL - 1) << 16) | (MASTER_PLL_DIV))
48
49
50#define CONFIG_SYS_MCKR1_VAL \
51 (AT91_PMC_MCKR_CSS_SLOW | \
52 AT91_PMC_MCKR_PRES_1 | \
53 AT91_PMC_MCKR_MDIV_2)
54
55
56#define CONFIG_SYS_MCKR2_VAL \
57 (AT91_PMC_MCKR_CSS_PLLA | \
58 AT91_PMC_MCKR_PRES_1 | \
59 AT91_PMC_MCKR_MDIV_2)
60
61
62#define CONFIG_SYS_PIOC_PDR_VAL1 0xFFFF0000
63
64#define CONFIG_SYS_PIOC_PPUDR_VAL 0xFFFF0000
65
66
67#define CONFIG_SYS_MATRIX_EBICSA_VAL \
68 (AT91_MATRIX_CSA_DBPUC | AT91_MATRIX_CSA_EBI_CS1A)
69
70
71
72#define CONFIG_SYS_SDRC_MR_VAL1 AT91_SDRAMC_MODE_NORMAL
73
74#define CONFIG_SYS_SDRC_TR_VAL1 0x13C
75
76#define CONFIG_SYS_SDRC_CR_VAL \
77 (AT91_SDRAMC_NC_9 | \
78 AT91_SDRAMC_NR_13 | \
79 AT91_SDRAMC_NB_4 | \
80 AT91_SDRAMC_CAS_3 | \
81 AT91_SDRAMC_DBW_32 | \
82 (1 << 8) | \
83 (7 << 12) | \
84 (3 << 16) | \
85 (2 << 20) | \
86 (5 << 24) | \
87 (1 << 28))
88
89
90#define CONFIG_SYS_SDRC_MDR_VAL AT91_SDRAMC_MD_SDRAM
91#define CONFIG_SYS_SDRC_MR_VAL2 AT91_SDRAMC_MODE_PRECHARGE
92#define CONFIG_SYS_SDRAM_VAL1 0
93#define CONFIG_SYS_SDRC_MR_VAL3 AT91_SDRAMC_MODE_REFRESH
94#define CONFIG_SYS_SDRAM_VAL2 0
95#define CONFIG_SYS_SDRAM_VAL3 0
96#define CONFIG_SYS_SDRAM_VAL4 0
97#define CONFIG_SYS_SDRAM_VAL5 0
98#define CONFIG_SYS_SDRAM_VAL6 0
99#define CONFIG_SYS_SDRAM_VAL7 0
100#define CONFIG_SYS_SDRAM_VAL8 0
101#define CONFIG_SYS_SDRAM_VAL9 0
102#define CONFIG_SYS_SDRC_MR_VAL4 AT91_SDRAMC_MODE_LMR
103#define CONFIG_SYS_SDRAM_VAL10 0
104#define CONFIG_SYS_SDRC_MR_VAL5 AT91_SDRAMC_MODE_NORMAL
105#define CONFIG_SYS_SDRAM_VAL11 0
106#define CONFIG_SYS_SDRC_TR_VAL2 1200
107#define CONFIG_SYS_SDRAM_VAL12 0
108
109
110#define CONFIG_SYS_SMC0_SETUP0_VAL \
111 (AT91_SMC_SETUP_NWE(10) | AT91_SMC_SETUP_NCS_WR(10) | \
112 AT91_SMC_SETUP_NRD(10) | AT91_SMC_SETUP_NCS_RD(10))
113#define CONFIG_SYS_SMC0_PULSE0_VAL \
114 (AT91_SMC_PULSE_NWE(11) | AT91_SMC_PULSE_NCS_WR(11) | \
115 AT91_SMC_PULSE_NRD(11) | AT91_SMC_PULSE_NCS_RD(11))
116#define CONFIG_SYS_SMC0_CYCLE0_VAL \
117 (AT91_SMC_CYCLE_NWE(22) | AT91_SMC_CYCLE_NRD(22))
118#define CONFIG_SYS_SMC0_MODE0_VAL \
119 (AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | \
120 AT91_SMC_MODE_DBW_16 | \
121 AT91_SMC_MODE_TDF | \
122 AT91_SMC_MODE_TDF_CYCLE(6))
123
124
125#define CONFIG_SYS_RSTC_RMR_VAL \
126 (AT91_RSTC_KEY | \
127 AT91_RSTC_CR_PROCRST | \
128 AT91_RSTC_MR_ERSTL(1) | \
129 AT91_RSTC_MR_ERSTL(2))
130
131
132#define CONFIG_SYS_WDTC_WDMR_VAL \
133 (AT91_WDT_MR_WDIDLEHLT | AT91_WDT_MR_WDDBGHLT | \
134 AT91_WDT_MR_WDV(0xfff) | \
135 AT91_WDT_MR_WDDIS | \
136 AT91_WDT_MR_WDD(0xfff))
137
138#define CONFIG_CMDLINE_TAG 1
139#define CONFIG_SETUP_MEMORY_TAGS 1
140#define CONFIG_INITRD_TAG 1
141
142#undef CONFIG_SKIP_LOWLEVEL_INIT
143#define CONFIG_BOARD_EARLY_INIT_F
144
145
146
147
148#define CONFIG_AT91_GPIO 1
149#define CONFIG_ATMEL_USART 1
150#define CONFIG_USART_BASE ATMEL_BASE_DBGU
151#define CONFIG_USART_ID ATMEL_ID_SYS
152
153
154#define CONFIG_LCD 1
155#define LCD_BPP LCD_COLOR8
156#define CONFIG_LCD_LOGO 1
157#undef LCD_TEST_PATTERN
158#define CONFIG_LCD_INFO 1
159#define CONFIG_LCD_INFO_BELOW_LOGO 1
160#define CONFIG_SYS_WHITE_ON_BLACK 1
161#define CONFIG_ATMEL_LCD 1
162#define CONFIG_ATMEL_LCD_BGR555 1
163#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
164
165
166#define CONFIG_AT91_LED
167#define CONFIG_RED_LED GPIO_PIN_PC(12)
168#define CONFIG_GREEN_LED GPIO_PIN_PC(13)
169#define CONFIG_YELLOW_LED GPIO_PIN_PC(15)
170
171#define CONFIG_BOOTDELAY 3
172
173
174
175
176#define CONFIG_BOOTP_BOOTFILESIZE 1
177#define CONFIG_BOOTP_BOOTPATH 1
178#define CONFIG_BOOTP_GATEWAY 1
179#define CONFIG_BOOTP_HOSTNAME 1
180
181
182
183
184#include <config_cmd_default.h>
185#undef CONFIG_CMD_BDI
186#undef CONFIG_CMD_IMI
187#undef CONFIG_CMD_FPGA
188#undef CONFIG_CMD_LOADS
189#undef CONFIG_CMD_IMLS
190
191#define CONFIG_CMD_CACHE
192#define CONFIG_CMD_PING 1
193#define CONFIG_CMD_DHCP 1
194#define CONFIG_CMD_NAND 1
195#define CONFIG_CMD_USB 1
196
197
198#define CONFIG_NR_DRAM_BANKS 1
199#define PHYS_SDRAM 0x20000000
200#define PHYS_SDRAM_SIZE 0x04000000
201
202
203#define CONFIG_ATMEL_DATAFLASH_SPI
204#define CONFIG_HAS_DATAFLASH
205#define CONFIG_SYS_MAX_DATAFLASH_BANKS 1
206#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000
207#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 0xD0000000
208#define AT91_SPI_CLK 15000000
209#define DATAFLASH_TCSS (0x1a << 16)
210#define DATAFLASH_TCHS (0x1 << 24)
211
212
213#define CONFIG_NAND_ATMEL
214#define CONFIG_SYS_MAX_NAND_DEVICE 1
215#define CONFIG_SYS_NAND_BASE 0x40000000
216#define CONFIG_SYS_NAND_DBW_8 1
217
218#define CONFIG_SYS_NAND_MASK_ALE (1 << 22)
219
220#define CONFIG_SYS_NAND_MASK_CLE (1 << 21)
221#define CONFIG_SYS_NAND_ENABLE_PIN GPIO_PIN_PC(14)
222#define CONFIG_SYS_NAND_READY_PIN GPIO_PIN_PA(16)
223
224
225#define CONFIG_SYS_FLASH_CFI 1
226#define CONFIG_FLASH_CFI_DRIVER 1
227#define PHYS_FLASH_1 0x10000000
228#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
229#define CONFIG_SYS_MAX_FLASH_SECT 256
230#define CONFIG_SYS_MAX_FLASH_BANKS 1
231
232
233#define CONFIG_DRIVER_DM9000 1
234#define CONFIG_DM9000_BASE 0x30000000
235#define DM9000_IO CONFIG_DM9000_BASE
236#define DM9000_DATA (CONFIG_DM9000_BASE + 4)
237#define CONFIG_DM9000_USE_16BIT 1
238#define CONFIG_NET_RETRY_COUNT 20
239#define CONFIG_RESET_PHY_R 1
240
241
242#define CONFIG_USB_ATMEL
243#define CONFIG_USB_ATMEL_CLK_SEL_PLLB
244#define CONFIG_USB_OHCI_NEW 1
245#define CONFIG_DOS_PARTITION 1
246#define CONFIG_SYS_USB_OHCI_CPU_INIT 1
247#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000
248#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9261"
249#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
250#define CONFIG_USB_STORAGE 1
251
252#define CONFIG_SYS_LOAD_ADDR 0x22000000
253
254#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
255#define CONFIG_SYS_MEMTEST_END 0x23e00000
256
257#undef CONFIG_SYS_USE_DATAFLASH_CS0
258#undef CONFIG_SYS_USE_NANDFLASH
259#define CONFIG_SYS_USE_FLASH 1
260
261#ifdef CONFIG_SYS_USE_DATAFLASH_CS0
262
263
264#define CONFIG_ENV_IS_IN_DATAFLASH 1
265#define CONFIG_SYS_MONITOR_BASE \
266 (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + 0x8400)
267#define CONFIG_ENV_OFFSET 0x4200
268#define CONFIG_ENV_ADDR \
269 (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 + CONFIG_ENV_OFFSET)
270#define CONFIG_ENV_SIZE 0x4200
271#define CONFIG_BOOTCOMMAND "cp.b 0xC0042000 0x22000000 0x210000; bootm"
272#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
273 "root=/dev/mtdblock0 " \
274 "mtdparts=atmel_nand:-(root) " \
275 "rw rootfstype=jffs2"
276
277#elif defined(CONFIG_SYS_USE_NANDFLASH)
278
279
280#define CONFIG_ENV_IS_IN_NAND 1
281#define CONFIG_ENV_OFFSET 0x60000
282#define CONFIG_ENV_OFFSET_REDUND 0x80000
283#define CONFIG_ENV_SIZE 0x20000
284#define CONFIG_BOOTCOMMAND "nand read 0x22000000 0xA0000 0x200000; bootm"
285#define CONFIG_BOOTARGS "console=ttyS0,115200 " \
286 "root=/dev/mtdblock5 " \
287 "mtdparts=atmel_nand:128k(bootstrap)ro," \
288 "256k(uboot)ro,128k(env1)ro," \
289 "128k(env2)ro,2M(linux),-(root) " \
290 "rw rootfstype=jffs2"
291
292#elif defined (CONFIG_SYS_USE_FLASH)
293
294#define CONFIG_ENV_IS_IN_FLASH 1
295#define CONFIG_ENV_OFFSET 0x40000
296#define CONFIG_ENV_SECT_SIZE 0x10000
297#define CONFIG_ENV_SIZE 0x10000
298#define CONFIG_ENV_OVERWRITE 1
299
300
301#define CONFIG_SYS_JFFS2_FIRST_BANK 0
302#define CONFIG_SYS_JFFS2_NUM_BANKS 1
303
304
305#define CONFIG_SYS_JFFS2_FIRST_SECTOR 11
306
307#define CONFIG_BOOTCOMMAND "run flashboot"
308
309#define MTDIDS_DEFAULT "nor0=physmap-flash.0,nand0=nand"
310#define MTDPARTS_DEFAULT \
311 "mtdparts=physmap-flash.0:" \
312 "256k(u-boot)ro," \
313 "64k(u-boot-env)ro," \
314 "1408k(kernel)," \
315 "-(rootfs);" \
316 "nand:-(nand)"
317
318#define CONFIG_CON_ROT "fbcon=rotate:3 "
319#define CONFIG_BOOTARGS "root=/dev/mtdblock4 rootfstype=jffs2 " CONFIG_CON_ROT
320
321#define CONFIG_EXTRA_ENV_SETTINGS \
322 "mtdids=" MTDIDS_DEFAULT "\0" \
323 "mtdparts=" MTDPARTS_DEFAULT "\0" \
324 "partition=nand0,0\0" \
325 "ramargs=setenv bootargs $(bootargs) $(mtdparts)\0" \
326 "nfsargs=setenv bootargs root=/dev/nfs rw " \
327 CONFIG_CON_ROT \
328 "nfsroot=$(serverip):$(rootpath) $(mtdparts)\0" \
329 "addip=setenv bootargs $(bootargs) " \
330 "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)"\
331 ":$(hostname):eth0:off\0" \
332 "ramboot=tftpboot 0x22000000 vmImage;" \
333 "run ramargs;run addip;bootm 22000000\0" \
334 "nfsboot=tftpboot 0x22000000 vmImage;" \
335 "run nfsargs;run addip;bootm 22000000\0" \
336 "flashboot=run ramargs;run addip;bootm 0x10050000\0" \
337 ""
338#else
339#error "Undefined memory device"
340#endif
341
342#define CONFIG_BAUDRATE 115200
343
344#define CONFIG_SYS_PROMPT "pm9261> "
345#define CONFIG_SYS_CBSIZE 256
346#define CONFIG_SYS_MAXARGS 16
347#define CONFIG_SYS_PBSIZE \
348 (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
349#define CONFIG_SYS_LONGHELP 1
350#define CONFIG_CMDLINE_EDITING 1
351
352
353
354
355#define CONFIG_SYS_MALLOC_LEN \
356 ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)
357
358#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
359#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
360 GENERATED_GBL_DATA_SIZE)
361
362#endif
363